arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts

   1 /*
   2  * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "imx51-digi-connectcore-som.dtsi"
  13
  14 / {
  15         model = "Digi ConnectCore CC(W)-MX51 JSK";
  16         compatible = "digi,connectcore-ccxmx51-jsk",
  17                      "digi,connectcore-ccxmx51-som", "fsl,imx51";
  18
  19         chosen {
  20                 stdout-path = &uart1;
  21         };
  22 };
  23
  24 &esdhc1 {
  25         status = "okay";
  26 };
  27
  28 &owire {
  29         pinctrl-names = "default";
  30         pinctrl-0 = <&pinctrl_owire>;
  31         status = "okay";
  32 };
  33
  34 &pmic {
  35         fsl,mc13xxx-uses-rtc;
  36
  37         regulators {
  38                 vcoincell_reg: vcoincell {
  39                         regulator-min-microvolt = <3000000>;
  40                         regulator-max-microvolt = <3000000>;
  41                         regulator-always-on;
  42                 };
  43         };
  44 };
  45
  46 &uart1 {
  47         pinctrl-names = "default";
  48         pinctrl-0 = <&pinctrl_uart1>;
  49         status = "okay";
  50 };
  51
  52 &uart2 {
  53         pinctrl-names = "default";
  54         pinctrl-0 = <&pinctrl_uart2>;
  55         status = "okay";
  56 };
  57
  58 &uart3 {
  59         pinctrl-names = "default";
  60         pinctrl-0 = <&pinctrl_uart3>;
  61         status = "okay";
  62 };
  63
  64 &usbotg {
  65         dr_mode = "otg";
  66         status = "okay";
  67 };
  68
  69 &usbh1 {
  70         pinctrl-names = "default";
  71         pinctrl-0 = <&pinctrl_usbh1>;
  72         dr_mode = "host";
  73         phy_type = "ulpi";
  74         disable-over-current;
  75         status = "okay";
  76 };
  77
  78 &iomuxc {
  79         imx51-digi-connectcore-jsk {
  80                 pinctrl_owire: owiregrp {
  81                         fsl,pins = <
  82                                 MX51_PAD_OWIRE_LINE__OWIRE_LINE         0x40000000
  83                         >;
  84                 };
  85
  86                 pinctrl_uart1: uart1grp {
  87                         fsl,pins = <
  88                                 MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
  89                                 MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
  90                         >;
  91                 };
  92
  93                 pinctrl_uart2: uart2grp {
  94                         fsl,pins = <
  95                                 MX51_PAD_UART2_RXD__UART2_RXD           0x1c5
  96                                 MX51_PAD_UART2_TXD__UART2_TXD           0x1c5
  97                         >;
  98                 };
  99
 100                 pinctrl_uart3: uart3grp {
 101                         fsl,pins = <
 102                                 MX51_PAD_UART3_RXD__UART3_RXD           0x1c5
 103                                 MX51_PAD_UART3_TXD__UART3_TXD           0x1c5
 104                         >;
 105                 };
 106
 107                 pinctrl_usbh1: usbh1grp {
 108                         fsl,pins = <
 109                                 MX51_PAD_USBH1_DATA0__USBH1_DATA0       0x1e5
 110                                 MX51_PAD_USBH1_DATA1__USBH1_DATA1       0x1e5
 111                                 MX51_PAD_USBH1_DATA2__USBH1_DATA2       0x1e5
 112                                 MX51_PAD_USBH1_DATA3__USBH1_DATA3       0x1e5
 113                                 MX51_PAD_USBH1_DATA4__USBH1_DATA4       0x1e5
 114                                 MX51_PAD_USBH1_DATA5__USBH1_DATA5       0x1e5
 115                                 MX51_PAD_USBH1_DATA6__USBH1_DATA6       0x1e5
 116                                 MX51_PAD_USBH1_DATA7__USBH1_DATA7       0x1e5
 117                                 MX51_PAD_USBH1_CLK__USBH1_CLK           0x1e5
 118                                 MX51_PAD_USBH1_DIR__USBH1_DIR           0x1e5
 119                                 MX51_PAD_USBH1_NXT__USBH1_NXT           0x1e5
 120                                 MX51_PAD_USBH1_STP__USBH1_STP           0x1e5
 121                         >;
 122                 };
 123         };
 124 };