arch/arm/boot/dts/imx6q-ba16.dtsi

   1 /*
   2  * Support for imx6 based Advantech DMS-BA16 Qseven module
   3  *
   4  * Copyright 2015 Timesys Corporation.
   5  * Copyright 2015 General Electric Company
   6  *
   7  * This file is dual-licensed: you can use it either under the terms
   8  * of the GPL or the X11 license, at your option. Note that this dual
   9  * licensing only applies to this file, and not this project as a
  10  * whole.
  11  *
  12  *  a) This file is free software; you can redistribute it and/or
  13  *     modify it under the terms of the GNU General Public License
  14  *     version 2 as published by the Free Software Foundation.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 #include "imx6q.dtsi"
  46 #include <dt-bindings/gpio/gpio.h>
  47
  48 / {
  49         memory@10000000 {
  50                 reg = <0x10000000 0x40000000>;
  51         };
  52
  53         backlight_lvds: backlight {
  54                 compatible = "pwm-backlight";
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&pinctrl_display>;
  57                 pwms = <&pwm1 0 5000000>;
  58                 brightness-levels = <  0   1   2   3   4   5   6   7   8   9
  59                                       10  11  12  13  14  15  16  17  18  19
  60                                       20  21  22  23  24  25  26  27  28  29
  61                                       30  31  32  33  34  35  36  37  38  39
  62                                       40  41  42  43  44  45  46  47  48  49
  63                                       50  51  52  53  54  55  56  57  58  59
  64                                       60  61  62  63  64  65  66  67  68  69
  65                                       70  71  72  73  74  75  76  77  78  79
  66                                       80  81  82  83  84  85  86  87  88  89
  67                                       90  91  92  93  94  95  96  97  98  99
  68                                      100 101 102 103 104 105 106 107 108 109
  69                                      110 111 112 113 114 115 116 117 118 119
  70                                      120 121 122 123 124 125 126 127 128 129
  71                                      130 131 132 133 134 135 136 137 138 139
  72                                      140 141 142 143 144 145 146 147 148 149
  73                                      150 151 152 153 154 155 156 157 158 159
  74                                      160 161 162 163 164 165 166 167 168 169
  75                                      170 171 172 173 174 175 176 177 178 179
  76                                      180 181 182 183 184 185 186 187 188 189
  77                                      190 191 192 193 194 195 196 197 198 199
  78                                      200 201 202 203 204 205 206 207 208 209
  79                                      210 211 212 213 214 215 216 217 218 219
  80                                      220 221 222 223 224 225 226 227 228 229
  81                                      230 231 232 233 234 235 236 237 238 239
  82                                      240 241 242 243 244 245 246 247 248 249
  83                                      250 251 252 253 254 255>;
  84                 default-brightness-level = <255>;
  85                 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  86         };
  87
  88         reg_1p8v: regulator-1p8v {
  89                 compatible = "regulator-fixed";
  90                 regulator-name = "1P8V";
  91                 regulator-min-microvolt = <1800000>;
  92                 regulator-max-microvolt = <1800000>;
  93                 regulator-always-on;
  94         };
  95
  96         reg_3p3v: regulator-3p3v {
  97                 compatible = "regulator-fixed";
  98                 regulator-name = "3P3V";
  99                 regulator-min-microvolt = <3300000>;
 100                 regulator-max-microvolt = <3300000>;
 101                 regulator-always-on;
 102         };
 103
 104         reg_lvds: regulator-lvds {
 105                 compatible = "regulator-fixed";
 106                 regulator-name = "lvds_ppen";
 107                 regulator-min-microvolt = <3300000>;
 108                 regulator-max-microvolt = <3300000>;
 109                 regulator-boot-on;
 110                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 111                 enable-active-high;
 112         };
 113
 114         reg_usb_h1_vbus: regulator-usbh1vbus {
 115                 compatible = "regulator-fixed";
 116                 regulator-name = "usb_h1_vbus";
 117                 regulator-min-microvolt = <5000000>;
 118                 regulator-max-microvolt = <5000000>;
 119         };
 120
 121         reg_usb_otg_vbus: regulator-usbotgvbus {
 122                 compatible = "regulator-fixed";
 123                 regulator-name = "usb_otg_vbus";
 124                 regulator-min-microvolt = <5000000>;
 125                 regulator-max-microvolt = <5000000>;
 126         };
 127 };
 128
 129 &audmux {
 130         pinctrl-names = "default";
 131         pinctrl-0 = <&pinctrl_audmux>;
 132         status = "okay";
 133 };
 134
 135 &ecspi1 {
 136         cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
 137         pinctrl-names = "default";
 138         pinctrl-0 = <&pinctrl_ecspi1>;
 139         status = "okay";
 140
 141         flash: n25q032@0 {
 142                 compatible = "jedec,spi-nor";
 143                 #address-cells = <1>;
 144                 #size-cells = <1>;
 145                 spi-max-frequency = <20000000>;
 146                 reg = <0>;
 147
 148                 partition@0 {
 149                         label = "U-Boot";
 150                         reg = <0x0 0xc0000>;
 151                 };
 152
 153                 partition@c0000 {
 154                         label = "env";
 155                         reg = <0xc0000 0x10000>;
 156                 };
 157
 158                 partition@d0000 {
 159                         label = "spare";
 160                         reg = <0xd0000 0x320000>;
 161                 };
 162
 163                 partition@3f0000 {
 164                         label = "mfg";
 165                         reg = <0x3f0000 0x10000>;
 166                 };
 167         };
 168 };
 169
 170 &fec {
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&pinctrl_enet>;
 173         phy-mode = "rgmii";
 174         status = "okay";
 175 };
 176
 177 &hdmi {
 178         ddc-i2c-bus = <&i2c2>;
 179         status = "okay";
 180 };
 181
 182 &i2c1 {
 183         clock-frequency = <100000>;
 184         pinctrl-names = "default";
 185         pinctrl-0 = <&pinctrl_i2c1>;
 186         status = "okay";
 187 };
 188
 189 &i2c2 {
 190         clock-frequency = <100000>;
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&pinctrl_i2c2>;
 193         status = "okay";
 194 };
 195
 196 &i2c3 {
 197         clock-frequency = <100000>;
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&pinctrl_i2c3>;
 200         status = "okay";
 201
 202         pmic@58 {
 203                 compatible = "dlg,da9063";
 204                 reg = <0x58>;
 205                 pinctrl-names = "default";
 206                 pinctrl-0 = <&pinctrl_pmic>;
 207                 interrupt-parent = <&gpio7>;
 208                 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
 209
 210                 onkey {
 211                         compatible = "dlg,da9063-onkey";
 212                 };
 213
 214                 regulators {
 215                         vdd_bcore1: bcore1 {
 216                                 regulator-min-microvolt = <1420000>;
 217                                 regulator-max-microvolt = <1420000>;
 218                                 regulator-always-on;
 219                                 regulator-boot-on;
 220                         };
 221
 222                         vdd_bcore2: bcore2 {
 223                                 regulator-min-microvolt = <1420000>;
 224                                 regulator-max-microvolt = <1420000>;
 225                                 regulator-always-on;
 226                                 regulator-boot-on;
 227                         };
 228
 229                         vdd_bpro: bpro {
 230                                 regulator-min-microvolt = <1500000>;
 231                                 regulator-max-microvolt = <1500000>;
 232                                 regulator-always-on;
 233                                 regulator-boot-on;
 234                         };
 235
 236                         vdd_bmem: bmem {
 237                                 regulator-min-microvolt = <1800000>;
 238                                 regulator-max-microvolt = <1800000>;
 239                                 regulator-always-on;
 240                                 regulator-boot-on;
 241                         };
 242
 243                         vdd_bio: bio {
 244                                 regulator-min-microvolt = <1800000>;
 245                                 regulator-max-microvolt = <1800000>;
 246                                 regulator-always-on;
 247                                 regulator-boot-on;
 248                         };
 249
 250                         vdd_bperi: bperi {
 251                                 regulator-min-microvolt = <3300000>;
 252                                 regulator-max-microvolt = <3300000>;
 253                                 regulator-always-on;
 254                                 regulator-boot-on;
 255                         };
 256
 257                         vdd_ldo1: ldo1 {
 258                                 regulator-min-microvolt = <600000>;
 259                                 regulator-max-microvolt = <1860000>;
 260                         };
 261
 262                         vdd_ldo2: ldo2 {
 263                                 regulator-min-microvolt = <600000>;
 264                                 regulator-max-microvolt = <1860000>;
 265                         };
 266
 267                         vdd_ldo3: ldo3 {
 268                                 regulator-min-microvolt = <900000>;
 269                                 regulator-max-microvolt = <3440000>;
 270                         };
 271
 272                         vdd_ldo4: ldo4 {
 273                                 regulator-min-microvolt = <900000>;
 274                                 regulator-max-microvolt = <3440000>;
 275                         };
 276
 277                         vdd_ldo5: ldo5 {
 278                                 regulator-min-microvolt = <900000>;
 279                                 regulator-max-microvolt = <3600000>;
 280                         };
 281
 282                         vdd_ldo6: ldo6 {
 283                                 regulator-min-microvolt = <900000>;
 284                                 regulator-max-microvolt = <3600000>;
 285                         };
 286
 287                         vdd_ldo7: ldo7 {
 288                                 regulator-min-microvolt = <900000>;
 289                                 regulator-max-microvolt = <3600000>;
 290                         };
 291
 292                         vdd_ldo8: ldo8 {
 293                                 regulator-min-microvolt = <900000>;
 294                                 regulator-max-microvolt = <3600000>;
 295                         };
 296
 297                         vdd_ldo9: ldo9 {
 298                                 regulator-min-microvolt = <950000>;
 299                                 regulator-max-microvolt = <3600000>;
 300                         };
 301
 302                         vdd_ldo10: ldo10 {
 303                                 regulator-min-microvolt = <900000>;
 304                                 regulator-max-microvolt = <3600000>;
 305                         };
 306
 307                         vdd_ldo11: ldo11 {
 308                                 regulator-min-microvolt = <900000>;
 309                                 regulator-max-microvolt = <3600000>;
 310                                 regulator-always-on;
 311                                 regulator-boot-on;
 312                         };
 313                 };
 314         };
 315
 316         rtc@32 {
 317                 compatible = "epson,rx8010";
 318                 pinctrl-names = "default";
 319                 pinctrl-0 = <&pinctrl_rtc>;
 320                 reg = <0x32>;
 321                 interrupt-parent = <&gpio4>;
 322                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
 323         };
 324 };
 325
 326 &pcie {
 327         pinctrl-names = "default";
 328         pinctrl-0 = <&pinctrl_pcie>;
 329         reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
 330         fsl,tx-swing-full = <103>;
 331         fsl,tx-swing-low = <103>;
 332         status = "okay";
 333 };
 334
 335 &pwm1 {
 336         pinctrl-names = "default";
 337         pinctrl-0 = <&pinctrl_pwm1>;
 338         status = "okay";
 339 };
 340
 341 &pwm2 {
 342         pinctrl-names = "default";
 343         pinctrl-0 = <&pinctrl_pwm2>;
 344         status = "disabled";
 345 };
 346
 347 &sata {
 348         status = "okay";
 349 };
 350
 351 &ssi1 {
 352         status = "okay";
 353 };
 354
 355 &uart3 {
 356         pinctrl-names = "default";
 357         pinctrl-0 = <&pinctrl_uart3>;
 358         uart-has-rtscts;
 359         status = "okay";
 360 };
 361
 362 &uart4 {
 363         pinctrl-names = "default";
 364         pinctrl-0 = <&pinctrl_uart4>;
 365         status = "okay";
 366 };
 367
 368 &usbh1 {
 369         pinctrl-names = "default";
 370         pinctrl-0 = <&pinctrl_usbhub>;
 371         vbus-supply = <&reg_usb_h1_vbus>;
 372         reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
 373         status = "okay";
 374 };
 375
 376 &usbotg {
 377         vbus-supply = <&reg_usb_otg_vbus>;
 378         pinctrl-names = "default";
 379         pinctrl-0 = <&pinctrl_usbotg>;
 380         disable-over-current;
 381         status = "okay";
 382 };
 383
 384 &usdhc2 {
 385         pinctrl-names = "default";
 386         pinctrl-0 = <&pinctrl_usdhc2>;
 387         cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 388         no-1-8-v;
 389         keep-power-in-suspend;
 390         wakeup-source;
 391         status = "okay";
 392 };
 393
 394 &usdhc3 {
 395         pinctrl-names = "default";
 396         pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
 397         bus-width = <8>;
 398         vmmc-supply = <&vdd_bperi>;
 399         non-removable;
 400         keep-power-in-suspend;
 401         status = "okay";
 402 };
 403
 404 &wdog1 {
 405         pinctrl-names = "default";
 406         pinctrl-0 = <&pinctrl_wdog>;
 407         fsl,ext-reset-output;
 408 };
 409
 410 &iomuxc {
 411         pinctrl-names = "default";
 412         pinctrl-0 = <&pinctrl_hog>;
 413
 414         pinctrl_audmux: audmuxgrp {
 415                 fsl,pins = <
 416                         MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
 417                         MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x130b0
 418                         MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
 419                         MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
 420                 >;
 421         };
 422
 423         pinctrl_display: dispgrp {
 424                 fsl,pins = <
 425                         /* BLEN_OUT */
 426                         MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x1b0b0
 427                         /* LVDS_PPEN_OUT */
 428                         MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x1b0b0
 429                 >;
 430         };
 431
 432         pinctrl_ecspi1: ecspi1grp {
 433                 fsl,pins = <
 434                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
 435                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
 436                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
 437                         /* SPI1 CS */
 438                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30  0x1b0b0
 439                 >;
 440         };
 441
 442         pinctrl_ecspi5: ecspi5grp {
 443                 fsl,pins = <
 444                         MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO        0x1b0b0
 445                         MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI         0x1b0b0
 446                         MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK         0x1b0b0
 447                         MX6QDL_PAD_SD1_DAT1__GPIO1_IO17         0x1b0b0
 448                 >;
 449         };
 450
 451         pinctrl_enet: enetgrp {
 452                 fsl,pins = <
 453                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x100b0
 454                         MX6QDL_PAD_ENET_MDC__ENET_MDC         0x100b0
 455                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x10030
 456                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x10030
 457                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x10030
 458                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x10030
 459                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x10030
 460                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
 461                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x100b0
 462                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
 463                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
 464                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
 465                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
 466                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
 467                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
 468                         /* FEC Reset */
 469                         MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28     0x1b0b0
 470                         /* AR8033 Interrupt */
 471                         MX6QDL_PAD_GPIO_19__GPIO4_IO05        0x1b0b0
 472                 >;
 473         };
 474
 475         pinctrl_hog: hoggrp {
 476                 fsl,pins = <
 477                         /* GPIO 0-7 */
 478                         MX6QDL_PAD_NANDF_D0__GPIO2_IO00  0x1b0b0
 479                         MX6QDL_PAD_NANDF_D1__GPIO2_IO01  0x1b0b0
 480                         MX6QDL_PAD_NANDF_D2__GPIO2_IO02  0x1b0b0
 481                         MX6QDL_PAD_NANDF_D3__GPIO2_IO03  0x1b0b0
 482                         MX6QDL_PAD_NANDF_D4__GPIO2_IO04  0x1b0b0
 483                         MX6QDL_PAD_NANDF_D5__GPIO2_IO05  0x1b0b0
 484                         MX6QDL_PAD_NANDF_D6__GPIO2_IO06  0x1b0b0
 485                         MX6QDL_PAD_NANDF_D7__GPIO2_IO07  0x1b0b0
 486                         /* SUS_S3_OUT to CPLD */
 487                         MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
 488                 >;
 489         };
 490
 491         pinctrl_i2c1: i2c1grp {
 492                 fsl,pins = <
 493                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA  0x4001b8b1
 494                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL  0x4001b8b1
 495                 >;
 496         };
 497
 498         pinctrl_i2c2: i2c2grp {
 499                 fsl,pins = <
 500                         MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
 501                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
 502                 >;
 503         };
 504
 505         pinctrl_i2c3: i2c3grp {
 506                 fsl,pins = <
 507                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1
 508                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1
 509                 >;
 510         };
 511
 512         pinctrl_pcie: pciegrp {
 513                 fsl,pins = <
 514                         /* PCIe Reset */
 515                         MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x1b0b0
 516                         /* PCIe Wake */
 517                         MX6QDL_PAD_GPIO_5__GPIO1_IO05   0x1b0b0
 518                 >;
 519         };
 520
 521         pinctrl_pmic: pmicgrp {
 522                 fsl,pins = <
 523                         /* PMIC Interrupt */
 524                         MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b0b0
 525                 >;
 526         };
 527
 528         pinctrl_pwm1: pwm1grp {
 529                 fsl,pins = <
 530                         MX6QDL_PAD_SD1_DAT3__PWM1_OUT   0x1b0b1
 531                 >;
 532         };
 533
 534         pinctrl_pwm2: pwm2grp {
 535                 fsl,pins = <
 536                         MX6QDL_PAD_GPIO_1__PWM2_OUT     0x1b0b1
 537                 >;
 538         };
 539
 540         pinctrl_rtc: rtcgrp {
 541                 fsl,pins = <
 542                         /* RTC_INT */
 543                         MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
 544                 >;
 545         };
 546
 547         pinctrl_uart3: uart3grp {
 548                 fsl,pins = <
 549                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
 550                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
 551                         MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b1
 552                         MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
 553                 >;
 554         };
 555
 556         pinctrl_uart4: uart4grp {
 557                 fsl,pins = <
 558                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
 559                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
 560                 >;
 561         };
 562
 563         pinctrl_usbhub: usbhubgrp {
 564                 fsl,pins = <
 565                         /* HUB_RESET */
 566                         MX6QDL_PAD_GPIO_16__GPIO7_IO11  0x1b0b0
 567                 >;
 568         };
 569
 570         pinctrl_usbotg: usbotggrp {
 571                 fsl,pins = <
 572                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
 573                 >;
 574         };
 575
 576         pinctrl_usdhc2: usdhc2grp {
 577                 fsl,pins = <
 578                         MX6QDL_PAD_SD2_CMD__SD2_CMD     0x17059
 579                         MX6QDL_PAD_SD2_CLK__SD2_CLK     0x10059
 580                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0  0x17059
 581                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1  0x17059
 582                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2  0x17059
 583                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3  0x17059
 584                         /* uSDHC2 CD */
 585                         MX6QDL_PAD_GPIO_4__GPIO1_IO04   0x1b0b0
 586                 >;
 587         };
 588
 589         pinctrl_usdhc3: usdhc3grp {
 590                 fsl,pins = <
 591                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 592                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 593                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 594                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 595                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 596                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 597                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4  0x17059
 598                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5  0x17059
 599                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6  0x17059
 600                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7  0x17059
 601                 >;
 602         };
 603
 604         pinctrl_usdhc3_reset: usdhc3grp-reset {
 605                 fsl,pins = <
 606                         MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9
 607                 >;
 608         };
 609
 610         pinctrl_usdhc4: usdhc4grp {
 611                 fsl,pins = <
 612                         MX6QDL_PAD_SD4_CMD__SD4_CMD     0x17059
 613                         MX6QDL_PAD_SD4_CLK__SD4_CLK     0x17059
 614                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0  0x17059
 615                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1  0x17059
 616                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2  0x17059
 617                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3  0x17059
 618                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4  0x17059
 619                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5  0x17059
 620                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6  0x17059
 621                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7  0x17059
 622                         /* uSDHC4 CD */
 623                         MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
 624                         /* uSDHC4 SDIO PWR */
 625                         MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
 626                         /* uSDHC4 SDIO WP */
 627                         MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
 628                         /* uSDHC4 SDIO LED */
 629                         MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
 630                 >;
 631         };
 632
 633         pinctrl_wdog: wdoggrp {
 634                 fsl,pins = <
 635                         MX6QDL_PAD_GPIO_9__WDOG1_B      0x1b0b0
 636                 >;
 637         };
 638 };