2 * Copyright 2013 Gateworks Corporation
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include <dt-bindings/gpio/gpio.h>
15 /* these are used by bootloader for disabling nodes */
27 bootargs = "console=ttymxc1,115200";
31 compatible = "pwm-backlight";
32 pwms = <&pwm4 0 5000000>;
33 brightness-levels = <0 4 8 16 32 64 128 255>;
34 default-brightness-level = <7>;
38 compatible = "gpio-leds";
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_gpio_leds>;
44 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
46 linux,default-trigger = "heartbeat";
51 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
52 default-state = "off";
57 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
58 default-state = "off";
63 reg = <0x10000000 0x20000000>;
67 compatible = "pps-gpio";
68 pinctrl-names = "default";
69 pinctrl-0 = <&pinctrl_pps>;
70 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
75 compatible = "simple-bus";
79 reg_1p0v: regulator@0 {
80 compatible = "regulator-fixed";
82 regulator-name = "1P0V";
83 regulator-min-microvolt = <1000000>;
84 regulator-max-microvolt = <1000000>;
88 /* remove this fixed regulator once ltc3676__sw2 driver available */
89 reg_1p8v: regulator@1 {
90 compatible = "regulator-fixed";
92 regulator-name = "1P8V";
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
98 reg_3p3v: regulator@2 {
99 compatible = "regulator-fixed";
101 regulator-name = "3P3V";
102 regulator-min-microvolt = <3300000>;
103 regulator-max-microvolt = <3300000>;
107 reg_5p0v: regulator@3 {
108 compatible = "regulator-fixed";
110 regulator-name = "5P0V";
111 regulator-min-microvolt = <5000000>;
112 regulator-max-microvolt = <5000000>;
116 reg_usb_otg_vbus: regulator@4 {
117 compatible = "regulator-fixed";
119 regulator-name = "usb_otg_vbus";
120 regulator-min-microvolt = <5000000>;
121 regulator-max-microvolt = <5000000>;
122 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
128 compatible = "fsl,imx6q-ventana-sgtl5000",
129 "fsl,imx-audio-sgtl5000";
130 model = "sgtl5000-audio";
131 ssi-controller = <&ssi1>;
132 audio-codec = <&codec>;
134 "MIC_IN", "Mic Jack",
135 "Mic Jack", "Mic Bias",
136 "Headphone Jack", "HP_OUT";
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_audmux>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_flexcan1>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_enet>;
158 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
163 pinctrl-names = "default";
164 pinctrl-0 = <&pinctrl_gpmi_nand>;
169 ddc-i2c-bus = <&i2c3>;
174 clock-frequency = <100000>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_i2c1>;
180 compatible = "atmel,24c02";
186 compatible = "atmel,24c02";
192 compatible = "atmel,24c02";
198 compatible = "atmel,24c02";
204 compatible = "nxp,pca9555";
211 compatible = "dallas,ds1672";
217 clock-frequency = <100000>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_i2c2>;
224 clock-frequency = <100000>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_i2c3>;
230 compatible = "fsl,sgtl5000";
232 clocks = <&clks 201>;
233 VDDA-supply = <®_1p8v>;
234 VDDIO-supply = <®_3p3v>;
237 touchscreen: egalax_ts@04 {
238 compatible = "eeti,egalax_ts";
240 interrupt-parent = <&gpio7>;
242 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
250 fsl,data-mapping = "spwg";
251 fsl,data-width = <18>;
255 native-mode = <&timing0>;
256 timing0: hsd100pxn1 {
257 clock-frequency = <65000000>;
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_pcie>;
274 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&pinctrl_pwm4>;
285 fsl,mode = "i2s-slave";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_uart1>;
296 pinctrl-names = "default";
297 pinctrl-0 = <&pinctrl_uart2>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_uart5>;
308 vbus-supply = <®_usb_otg_vbus>;
309 pinctrl-names = "default";
310 pinctrl-0 = <&pinctrl_usbotg>;
311 disable-over-current;
320 pinctrl-names = "default";
321 pinctrl-0 = <&pinctrl_usdhc3>;
322 cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
323 vmmc-supply = <®_3p3v>;
329 pinctrl_audmux: audmuxgrp {
331 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
332 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
333 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
334 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
335 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
339 pinctrl_enet: enetgrp {
341 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
342 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
343 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
344 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
345 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
346 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
347 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
348 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
349 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
350 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
351 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
352 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
353 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
354 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
355 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
356 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
357 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
361 pinctrl_flexcan1: flexcan1grp {
363 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
364 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
365 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */
369 pinctrl_gpio_leds: gpioledsgrp {
371 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
372 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
373 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
377 pinctrl_gpmi_nand: gpminandgrp {
379 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
380 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
381 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
382 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
383 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
384 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
385 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
386 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
387 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
388 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
389 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
390 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
391 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
392 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
393 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
394 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
398 pinctrl_i2c1: i2c1grp {
400 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
401 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
405 pinctrl_i2c2: i2c2grp {
407 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
408 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
412 pinctrl_i2c3: i2c3grp {
414 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
415 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
419 pinctrl_pcie: pciegrp {
421 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE_RST# */
425 pinctrl_pps: ppsgrp {
427 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
431 pinctrl_pwm4: pwm4grp {
433 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
437 pinctrl_uart1: uart1grp {
439 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
440 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
444 pinctrl_uart2: uart2grp {
446 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
447 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
451 pinctrl_uart5: uart5grp {
453 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
454 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
458 pinctrl_usbotg: usbotggrp {
460 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
461 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
465 pinctrl_usdhc3: usdhc3grp {
467 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
468 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
469 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
470 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
471 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
472 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
473 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */