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ARM: dts: imx6sll: Enable SNVS poweroff according to board design
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1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright 2016 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP.
5 *
6 */
7
8 /dts-v1/;
9
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "imx6sll.dtsi"
13
14 / {
15 model = "Freescale i.MX6SLL EVK Board";
16 compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
17
18 chosen {
19 stdout-path = &uart1;
20 };
21
22 memory@80000000 {
23 device_type = "memory";
24 reg = <0x80000000 0x80000000>;
25 };
26
27 backlight_display: backlight-display {
28 compatible = "pwm-backlight";
29 pwms = <&pwm1 0 5000000>;
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <6>;
32 status = "okay";
33 };
34
35 leds {
36 compatible = "gpio-leds";
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_led>;
39
40 user {
41 label = "debug";
42 gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
43 linux,default-trigger = "heartbeat";
44 };
45 };
46
47 reg_usb_otg1_vbus: regulator-otg1-vbus {
48 compatible = "regulator-fixed";
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_usb_otg1_vbus>;
51 regulator-name = "usb_otg1_vbus";
52 regulator-min-microvolt = <5000000>;
53 regulator-max-microvolt = <5000000>;
54 gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
55 enable-active-high;
56 };
57
58 reg_usb_otg2_vbus: regulator-otg2-vbus {
59 compatible = "regulator-fixed";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_usb_otg2_vbus>;
62 regulator-name = "usb_otg2_vbus";
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
65 gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
66 enable-active-high;
67 };
68
69 reg_aud3v: regulator-aud3v {
70 compatible = "regulator-fixed";
71 regulator-name = "wm8962-supply-3v15";
72 regulator-min-microvolt = <3150000>;
73 regulator-max-microvolt = <3150000>;
74 regulator-boot-on;
75 };
76
77 reg_aud4v: regulator-aud4v {
78 compatible = "regulator-fixed";
79 regulator-name = "wm8962-supply-4v2";
80 regulator-min-microvolt = <4325000>;
81 regulator-max-microvolt = <4325000>;
82 regulator-boot-on;
83 };
84
85 reg_lcd_3v3: regulator-lcd-3v3 {
86 compatible = "regulator-fixed";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
89 regulator-name = "lcd-3v3";
90 gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
91 enable-active-high;
92 };
93
94 reg_lcd_5v: regulator-lcd-5v {
95 compatible = "regulator-fixed";
96 regulator-name = "lcd-5v0";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 };
100
101 reg_sd1_vmmc: regulator-sd1-vmmc {
102 compatible = "regulator-fixed";
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_reg_sd1_vmmc>;
105 regulator-name = "SD1_SPWR";
106 regulator-min-microvolt = <3000000>;
107 regulator-max-microvolt = <3000000>;
108 gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
109 enable-active-high;
110 };
111
112 reg_sd3_vmmc: regulator-sd3-vmmc {
113 compatible = "regulator-fixed";
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_reg_sd3_vmmc>;
116 regulator-name = "SD3_WIFI";
117 regulator-min-microvolt = <3000000>;
118 regulator-max-microvolt = <3000000>;
119 gpio = <&gpio4 4 GPIO_ACTIVE_HIGH>;
120 enable-active-high;
121 };
122
123 panel {
124 compatible = "sii,43wvf1g";
125 backlight = <&backlight_display>;
126 dvdd-supply = <&reg_lcd_3v3>;
127 avdd-supply = <&reg_lcd_5v>;
128
129 port {
130 panel_in: endpoint {
131 remote-endpoint = <&display_out>;
132 };
133 };
134 };
135 };
136
137 &cpu0 {
138 arm-supply = <&sw1a_reg>;
139 soc-supply = <&sw1c_reg>;
140 };
141
142 &i2c1 {
143 clock-frequency = <100000>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&pinctrl_i2c1>;
146 status = "okay";
147
148 pfuze100: pmic@8 {
149 compatible = "fsl,pfuze100";
150 reg = <0x08>;
151
152 regulators {
153 sw1a_reg: sw1ab {
154 regulator-min-microvolt = <300000>;
155 regulator-max-microvolt = <1875000>;
156 regulator-boot-on;
157 regulator-always-on;
158 regulator-ramp-delay = <6250>;
159 };
160
161 sw1c_reg: sw1c {
162 regulator-min-microvolt = <300000>;
163 regulator-max-microvolt = <1875000>;
164 regulator-boot-on;
165 regulator-always-on;
166 regulator-ramp-delay = <6250>;
167 };
168
169 sw2_reg: sw2 {
170 regulator-min-microvolt = <800000>;
171 regulator-max-microvolt = <3300000>;
172 regulator-boot-on;
173 regulator-always-on;
174 };
175
176 sw3a_reg: sw3a {
177 regulator-min-microvolt = <400000>;
178 regulator-max-microvolt = <1975000>;
179 regulator-boot-on;
180 regulator-always-on;
181 };
182
183 sw3b_reg: sw3b {
184 regulator-min-microvolt = <400000>;
185 regulator-max-microvolt = <1975000>;
186 regulator-boot-on;
187 regulator-always-on;
188 };
189
190 sw4_reg: sw4 {
191 regulator-min-microvolt = <800000>;
192 regulator-max-microvolt = <3300000>;
193 regulator-always-on;
194 };
195
196 swbst_reg: swbst {
197 regulator-min-microvolt = <5000000>;
198 regulator-max-microvolt = <5150000>;
199 };
200
201 snvs_reg: vsnvs {
202 regulator-min-microvolt = <1000000>;
203 regulator-max-microvolt = <3000000>;
204 regulator-boot-on;
205 regulator-always-on;
206 };
207
208 vref_reg: vrefddr {
209 regulator-boot-on;
210 regulator-always-on;
211 };
212
213 vgen1_reg: vgen1 {
214 regulator-min-microvolt = <800000>;
215 regulator-max-microvolt = <1550000>;
216 regulator-always-on;
217 };
218
219 vgen2_reg: vgen2 {
220 regulator-min-microvolt = <800000>;
221 regulator-max-microvolt = <1550000>;
222 };
223
224 vgen3_reg: vgen3 {
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <3300000>;
227 };
228
229 vgen4_reg: vgen4 {
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <3300000>;
232 regulator-always-on;
233 };
234
235 vgen5_reg: vgen5 {
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <3300000>;
238 regulator-always-on;
239 };
240
241 vgen6_reg: vgen6 {
242 regulator-min-microvolt = <1800000>;
243 regulator-max-microvolt = <3300000>;
244 regulator-always-on;
245 };
246 };
247 };
248 };
249
250 &lcdif {
251 pinctrl-names = "default";
252 pinctrl-0 = <&pinctrl_lcd>;
253 status = "okay";
254
255 port {
256 display_out: endpoint {
257 remote-endpoint = <&panel_in>;
258 };
259 };
260 };
261
262 &pwm1 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_pwm1>;
265 status = "okay";
266 };
267
268 &reg_3p0 {
269 vin-supply = <&sw2_reg>;
270 };
271
272 &snvs_poweroff {
273 status = "okay";
274 };
275
276 &snvs_pwrkey {
277 status = "okay";
278 };
279
280 &uart1 {
281 pinctrl-names = "default";
282 pinctrl-0 = <&pinctrl_uart1>;
283 status = "okay";
284 };
285
286 &usdhc1 {
287 pinctrl-names = "default", "state_100mhz", "state_200mhz";
288 pinctrl-0 = <&pinctrl_usdhc1>;
289 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
290 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
291 cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
292 wp-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
293 keep-power-in-suspend;
294 wakeup-source;
295 vmmc-supply = <&reg_sd1_vmmc>;
296 status = "okay";
297 };
298
299 &usbotg1 {
300 vbus-supply = <&reg_usb_otg1_vbus>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_usbotg1>;
303 disable-over-current;
304 srp-disable;
305 hnp-disable;
306 adp-disable;
307 status = "okay";
308 };
309
310 &usbotg2 {
311 vbus-supply = <&reg_usb_otg2_vbus>;
312 dr_mode = "host";
313 disable-over-current;
314 status = "okay";
315 };
316
317 &usdhc3 {
318 pinctrl-names = "default", "state_100mhz", "state_200mhz";
319 pinctrl-0 = <&pinctrl_usdhc3>;
320 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
321 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
322 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
323 keep-power-in-suspend;
324 wakeup-source;
325 vmmc-supply = <&reg_sd3_vmmc>;
326 status = "okay";
327 };
328
329 &wdog1 {
330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_wdog1>;
332 fsl,ext-reset-output;
333 };
334
335 &iomuxc {
336 pinctrl_reg_sd3_vmmc: sd3vmmcgrp {
337 fsl,pins = <
338 MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059
339 >;
340 };
341
342 pinctrl_usb_otg1_vbus: vbus1grp {
343 fsl,pins = <
344 MX6SLL_PAD_KEY_COL4__GPIO4_IO00 0x17059
345 >;
346 };
347
348 pinctrl_usb_otg2_vbus: vbus2grp {
349 fsl,pins = <
350 MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
351 >;
352 };
353
354 pinctrl_reg_lcd_3v3: reglcd3v3grp {
355 fsl,pins = <
356 MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 0x17059
357 >;
358 };
359
360 pinctrl_reg_sd1_vmmc: sd1vmmcgrp {
361 fsl,pins = <
362 MX6SLL_PAD_KEY_COL3__GPIO3_IO30 0x17059
363 >;
364 };
365
366 pinctrl_uart1: uart1grp {
367 fsl,pins = <
368 MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
369 MX6SLL_PAD_UART1_RXD__UART1_DCE_RX 0x1b0b1
370 >;
371 };
372
373 pinctrl_usdhc1: usdhc1grp {
374 fsl,pins = <
375 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x17059
376 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x13059
377 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x17059
378 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x17059
379 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x17059
380 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x17059
381 >;
382 };
383
384 pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
385 fsl,pins = <
386 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170b9
387 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130b9
388 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170b9
389 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170b9
390 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170b9
391 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170b9
392 >;
393 };
394
395 pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
396 fsl,pins = <
397 MX6SLL_PAD_SD1_CMD__SD1_CMD 0x170f9
398 MX6SLL_PAD_SD1_CLK__SD1_CLK 0x130f9
399 MX6SLL_PAD_SD1_DATA0__SD1_DATA0 0x170f9
400 MX6SLL_PAD_SD1_DATA1__SD1_DATA1 0x170f9
401 MX6SLL_PAD_SD1_DATA2__SD1_DATA2 0x170f9
402 MX6SLL_PAD_SD1_DATA3__SD1_DATA3 0x170f9
403 >;
404 };
405
406 pinctrl_usbotg1: usbotg1grp {
407 fsl,pins = <
408 MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
409 >;
410 };
411
412 pinctrl_usdhc3: usdhc3grp {
413 fsl,pins = <
414 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x17061
415 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x13061
416 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x17061
417 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x17061
418 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x17061
419 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x17061
420 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
421 >;
422 };
423
424 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
425 fsl,pins = <
426 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170a1
427 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130a1
428 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170a1
429 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170a1
430 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170a1
431 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170a1
432 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
433 >;
434 };
435
436 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
437 fsl,pins = <
438 MX6SLL_PAD_SD3_CMD__SD3_CMD 0x170e9
439 MX6SLL_PAD_SD3_CLK__SD3_CLK 0x130f9
440 MX6SLL_PAD_SD3_DATA0__SD3_DATA0 0x170e9
441 MX6SLL_PAD_SD3_DATA1__SD3_DATA1 0x170e9
442 MX6SLL_PAD_SD3_DATA2__SD3_DATA2 0x170e9
443 MX6SLL_PAD_SD3_DATA3__SD3_DATA3 0x170e9
444 MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
445 >;
446 };
447
448 pinctrl_i2c1: i2c1grp {
449 fsl,pins = <
450 MX6SLL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
451 MX6SLL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
452 >;
453 };
454
455 pinctrl_lcd: lcdgrp {
456 fsl,pins = <
457 MX6SLL_PAD_LCD_DATA00__LCD_DATA00 0x79
458 MX6SLL_PAD_LCD_DATA01__LCD_DATA01 0x79
459 MX6SLL_PAD_LCD_DATA02__LCD_DATA02 0x79
460 MX6SLL_PAD_LCD_DATA03__LCD_DATA03 0x79
461 MX6SLL_PAD_LCD_DATA04__LCD_DATA04 0x79
462 MX6SLL_PAD_LCD_DATA05__LCD_DATA05 0x79
463 MX6SLL_PAD_LCD_DATA06__LCD_DATA06 0x79
464 MX6SLL_PAD_LCD_DATA07__LCD_DATA07 0x79
465 MX6SLL_PAD_LCD_DATA08__LCD_DATA08 0x79
466 MX6SLL_PAD_LCD_DATA09__LCD_DATA09 0x79
467 MX6SLL_PAD_LCD_DATA10__LCD_DATA10 0x79
468 MX6SLL_PAD_LCD_DATA11__LCD_DATA11 0x79
469 MX6SLL_PAD_LCD_DATA12__LCD_DATA12 0x79
470 MX6SLL_PAD_LCD_DATA13__LCD_DATA13 0x79
471 MX6SLL_PAD_LCD_DATA14__LCD_DATA14 0x79
472 MX6SLL_PAD_LCD_DATA15__LCD_DATA15 0x79
473 MX6SLL_PAD_LCD_DATA16__LCD_DATA16 0x79
474 MX6SLL_PAD_LCD_DATA17__LCD_DATA17 0x79
475 MX6SLL_PAD_LCD_DATA18__LCD_DATA18 0x79
476 MX6SLL_PAD_LCD_DATA19__LCD_DATA19 0x79
477 MX6SLL_PAD_LCD_DATA20__LCD_DATA20 0x79
478 MX6SLL_PAD_LCD_DATA21__LCD_DATA21 0x79
479 MX6SLL_PAD_LCD_DATA22__LCD_DATA22 0x79
480 MX6SLL_PAD_LCD_DATA23__LCD_DATA23 0x79
481 MX6SLL_PAD_LCD_CLK__LCD_CLK 0x79
482 MX6SLL_PAD_LCD_ENABLE__LCD_ENABLE 0x79
483 MX6SLL_PAD_LCD_HSYNC__LCD_HSYNC 0x79
484 MX6SLL_PAD_LCD_VSYNC__LCD_VSYNC 0x79
485 MX6SLL_PAD_LCD_RESET__LCD_RESET 0x79
486 >;
487 };
488
489 pinctrl_led: ledgrp {
490 fsl,pins = <
491 MX6SLL_PAD_EPDC_VCOM1__GPIO2_IO04 0x17059
492 >;
493 };
494
495 pinctrl_pwm1: pmw1grp {
496 fsl,pins = <
497 MX6SLL_PAD_PWM1__PWM1_OUT 0x110b0
498 >;
499 };
500
501 pinctrl_wdog1: wdog1grp {
502 fsl,pins = <
503 MX6SLL_PAD_WDOG_B__WDOG1_B 0x170b0
504 >;
505 };
506 };