arch/arm/boot/dts/kirkwood.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /include/ "skeleton.dtsi"
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5
   6 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
   7
   8 / {
   9         compatible = "marvell,kirkwood";
  10         interrupt-parent = <&intc>;
  11
  12         cpus {
  13                 #address-cells = <1>;
  14                 #size-cells = <0>;
  15
  16                 cpu@0 {
  17                         device_type = "cpu";
  18                         compatible = "marvell,feroceon";
  19                         reg = <0>;
  20                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  21                         clock-names = "cpu_clk", "ddrclk", "powersave";
  22                 };
  23         };
  24
  25         aliases {
  26                gpio0 = &gpio0;
  27                gpio1 = &gpio1;
  28                i2c0 = &i2c0;
  29         };
  30
  31         mbus@f1000000 {
  32                 compatible = "marvell,kirkwood-mbus", "simple-bus";
  33                 #address-cells = <2>;
  34                 #size-cells = <1>;
  35                 /* If a board file needs to change this ranges it must replace it completely */
  36                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000     /* internal-regs */
  37                           MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000      /* nand flash */
  38                           MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000      /* crypto sram */
  39                           >;
  40                 controller = <&mbusc>;
  41                 pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
  42                 pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */
  43
  44                 nand: nand@12f {
  45                         #address-cells = <1>;
  46                         #size-cells = <1>;
  47                         cle = <0>;
  48                         ale = <1>;
  49                         bank-width = <1>;
  50                         compatible = "marvell,orion-nand";
  51                         reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
  52                         chip-delay = <25>;
  53                         /* set partition map and/or chip-delay in board dts */
  54                         clocks = <&gate_clk 7>;
  55                         pinctrl-0 = <&pmx_nand>;
  56                         pinctrl-names = "default";
  57                         status = "disabled";
  58                 };
  59
  60                 crypto_sram: sa-sram@301 {
  61                         compatible = "mmio-sram";
  62                         reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>;
  63                         clocks = <&gate_clk 17>;
  64                         #address-cells = <1>;
  65                         #size-cells = <1>;
  66                 };
  67         };
  68
  69         ocp@f1000000 {
  70                 compatible = "simple-bus";
  71                 ranges = <0x00000000 0xf1000000 0x0100000>;
  72                 #address-cells = <1>;
  73                 #size-cells = <1>;
  74
  75                 pinctrl: pin-controller@10000 {
  76                         /* set compatible property in SoC file */
  77                         reg = <0x10000 0x20>;
  78
  79                         pmx_ge1: pmx-ge1 {
  80                                 marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
  81                                                "mpp24", "mpp25", "mpp26", "mpp27",
  82                                                "mpp30", "mpp31", "mpp32", "mpp33";
  83                                 marvell,function = "ge1";
  84                         };
  85
  86                         pmx_nand: pmx-nand {
  87                                 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
  88                                                "mpp4", "mpp5", "mpp18", "mpp19";
  89                                 marvell,function = "nand";
  90                         };
  91
  92                         /*
  93                          * Default SPI0 pinctrl setting with CSn on mpp0,
  94                          * overwrite marvell,pins on board level if required.
  95                          */
  96                         pmx_spi: pmx-spi {
  97                                 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
  98                                 marvell,function = "spi";
  99                         };
 100
 101                         pmx_twsi0: pmx-twsi0 {
 102                                 marvell,pins = "mpp8", "mpp9";
 103                                 marvell,function = "twsi0";
 104                         };
 105
 106                         /*
 107                          * Default UART pinctrl setting without RTS/CTS,
 108                          * overwrite marvell,pins on board level if required.
 109                          */
 110                         pmx_uart0: pmx-uart0 {
 111                                 marvell,pins = "mpp10", "mpp11";
 112                                 marvell,function = "uart0";
 113                         };
 114
 115                         pmx_uart1: pmx-uart1 {
 116                                 marvell,pins = "mpp13", "mpp14";
 117                                 marvell,function = "uart1";
 118                         };
 119                 };
 120
 121                 core_clk: core-clocks@10030 {
 122                         compatible = "marvell,kirkwood-core-clock";
 123                         reg = <0x10030 0x4>;
 124                         #clock-cells = <1>;
 125                 };
 126
 127                 spi0: spi@10600 {
 128                         compatible = "marvell,orion-spi";
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         cell-index = <0>;
 132                         interrupts = <23>;
 133                         reg = <0x10600 0x28>;
 134                         clocks = <&gate_clk 7>;
 135                         pinctrl-0 = <&pmx_spi>;
 136                         pinctrl-names = "default";
 137                         status = "disabled";
 138                 };
 139
 140                 gpio0: gpio@10100 {
 141                         compatible = "marvell,orion-gpio";
 142                         #gpio-cells = <2>;
 143                         gpio-controller;
 144                         reg = <0x10100 0x40>;
 145                         ngpios = <32>;
 146                         interrupt-controller;
 147                         #interrupt-cells = <2>;
 148                         interrupts = <35>, <36>, <37>, <38>;
 149                         clocks = <&gate_clk 7>;
 150                 };
 151
 152                 gpio1: gpio@10140 {
 153                         compatible = "marvell,orion-gpio";
 154                         #gpio-cells = <2>;
 155                         gpio-controller;
 156                         reg = <0x10140 0x40>;
 157                         ngpios = <18>;
 158                         interrupt-controller;
 159                         #interrupt-cells = <2>;
 160                         interrupts = <39>, <40>, <41>;
 161                         clocks = <&gate_clk 7>;
 162                 };
 163
 164                 i2c0: i2c@11000 {
 165                         compatible = "marvell,mv64xxx-i2c";
 166                         reg = <0x11000 0x20>;
 167                         #address-cells = <1>;
 168                         #size-cells = <0>;
 169                         interrupts = <29>;
 170                         clock-frequency = <100000>;
 171                         clocks = <&gate_clk 7>;
 172                         pinctrl-0 = <&pmx_twsi0>;
 173                         pinctrl-names = "default";
 174                         status = "disabled";
 175                 };
 176
 177                 uart0: serial@12000 {
 178                         compatible = "ns16550a";
 179                         reg = <0x12000 0x100>;
 180                         reg-shift = <2>;
 181                         interrupts = <33>;
 182                         clocks = <&gate_clk 7>;
 183                         pinctrl-0 = <&pmx_uart0>;
 184                         pinctrl-names = "default";
 185                         status = "disabled";
 186                 };
 187
 188                 uart1: serial@12100 {
 189                         compatible = "ns16550a";
 190                         reg = <0x12100 0x100>;
 191                         reg-shift = <2>;
 192                         interrupts = <34>;
 193                         clocks = <&gate_clk 7>;
 194                         pinctrl-0 = <&pmx_uart1>;
 195                         pinctrl-names = "default";
 196                         status = "disabled";
 197                 };
 198
 199                 mbusc: mbus-controller@20000 {
 200                         compatible = "marvell,mbus-controller";
 201                         reg = <0x20000 0x80>, <0x1500 0x20>;
 202                 };
 203
 204                 sysc: system-controller@20000 {
 205                         compatible = "marvell,orion-system-controller";
 206                         reg = <0x20000 0x120>;
 207                 };
 208
 209                 bridge_intc: bridge-interrupt-ctrl@20110 {
 210                         compatible = "marvell,orion-bridge-intc";
 211                         interrupt-controller;
 212                         #interrupt-cells = <1>;
 213                         reg = <0x20110 0x8>;
 214                         interrupts = <1>;
 215                         marvell,#interrupts = <6>;
 216                 };
 217
 218                 gate_clk: clock-gating-control@2011c {
 219                         compatible = "marvell,kirkwood-gating-clock";
 220                         reg = <0x2011c 0x4>;
 221                         clocks = <&core_clk 0>;
 222                         #clock-cells = <1>;
 223                 };
 224
 225                 l2: l2-cache@20128 {
 226                         compatible = "marvell,kirkwood-cache";
 227                         reg = <0x20128 0x4>;
 228                 };
 229
 230                 intc: main-interrupt-ctrl@20200 {
 231                         compatible = "marvell,orion-intc";
 232                         interrupt-controller;
 233                         #interrupt-cells = <1>;
 234                         reg = <0x20200 0x10>, <0x20210 0x10>;
 235                 };
 236
 237                 timer: timer@20300 {
 238                         compatible = "marvell,orion-timer";
 239                         reg = <0x20300 0x20>;
 240                         interrupt-parent = <&bridge_intc>;
 241                         interrupts = <1>, <2>;
 242                         clocks = <&core_clk 0>;
 243                 };
 244
 245                 wdt: watchdog-timer@20300 {
 246                         compatible = "marvell,orion-wdt";
 247                         reg = <0x20300 0x28>, <0x20108 0x4>;
 248                         interrupt-parent = <&bridge_intc>;
 249                         interrupts = <3>;
 250                         clocks = <&gate_clk 7>;
 251                         status = "okay";
 252                 };
 253
 254                 cesa: crypto@30000 {
 255                         compatible = "marvell,kirkwood-crypto";
 256                         reg = <0x30000 0x10000>;
 257                         reg-names = "regs";
 258                         interrupts = <22>;
 259                         clocks = <&gate_clk 17>;
 260                         marvell,crypto-srams = <&crypto_sram>;
 261                         marvell,crypto-sram-size = <0x800>;
 262                         status = "okay";
 263                 };
 264
 265                 usb0: ehci@50000 {
 266                         compatible = "marvell,orion-ehci";
 267                         reg = <0x50000 0x1000>;
 268                         interrupts = <19>;
 269                         clocks = <&gate_clk 3>;
 270                         status = "okay";
 271                 };
 272
 273                 dma0: xor@60800 {
 274                         compatible = "marvell,orion-xor";
 275                         reg = <0x60800 0x100
 276                                0x60A00 0x100>;
 277                         status = "okay";
 278                         clocks = <&gate_clk 8>;
 279
 280                         xor00 {
 281                               interrupts = <5>;
 282                               dmacap,memcpy;
 283                               dmacap,xor;
 284                         };
 285                         xor01 {
 286                               interrupts = <6>;
 287                               dmacap,memcpy;
 288                               dmacap,xor;
 289                               dmacap,memset;
 290                         };
 291                 };
 292
 293                 dma1: xor@60900 {
 294                         compatible = "marvell,orion-xor";
 295                         reg = <0x60900 0x100
 296                                0x60B00 0x100>;
 297                         status = "okay";
 298                         clocks = <&gate_clk 16>;
 299
 300                         xor00 {
 301                               interrupts = <7>;
 302                               dmacap,memcpy;
 303                               dmacap,xor;
 304                         };
 305                         xor01 {
 306                               interrupts = <8>;
 307                               dmacap,memcpy;
 308                               dmacap,xor;
 309                               dmacap,memset;
 310                         };
 311                 };
 312
 313                 eth0: ethernet-controller@72000 {
 314                         compatible = "marvell,kirkwood-eth";
 315                         #address-cells = <1>;
 316                         #size-cells = <0>;
 317                         reg = <0x72000 0x4000>;
 318                         clocks = <&gate_clk 0>;
 319                         marvell,tx-checksum-limit = <1600>;
 320                         status = "disabled";
 321
 322                         eth0port: ethernet0-port@0 {
 323                                 compatible = "marvell,kirkwood-eth-port";
 324                                 reg = <0>;
 325                                 interrupts = <11>;
 326                                 /* overwrite MAC address in bootloader */
 327                                 local-mac-address = [00 00 00 00 00 00];
 328                                 /* set phy-handle property in board file */
 329                         };
 330                 };
 331
 332                 mdio: mdio-bus@72004 {
 333                         compatible = "marvell,orion-mdio";
 334                         #address-cells = <1>;
 335                         #size-cells = <0>;
 336                         reg = <0x72004 0x84>;
 337                         interrupts = <46>;
 338                         clocks = <&gate_clk 0>;
 339                         status = "disabled";
 340
 341                         /* add phy nodes in board file */
 342                 };
 343
 344                 eth1: ethernet-controller@76000 {
 345                         compatible = "marvell,kirkwood-eth";
 346                         #address-cells = <1>;
 347                         #size-cells = <0>;
 348                         reg = <0x76000 0x4000>;
 349                         clocks = <&gate_clk 19>;
 350                         marvell,tx-checksum-limit = <1600>;
 351                         pinctrl-0 = <&pmx_ge1>;
 352                         pinctrl-names = "default";
 353                         status = "disabled";
 354
 355                         eth1port: ethernet1-port@0 {
 356                                 compatible = "marvell,kirkwood-eth-port";
 357                                 reg = <0>;
 358                                 interrupts = <15>;
 359                                 /* overwrite MAC address in bootloader */
 360                                 local-mac-address = [00 00 00 00 00 00];
 361                                 /* set phy-handle property in board file */
 362                         };
 363                 };
 364
 365                 sata_phy0: sata-phy@82000 {
 366                         compatible = "marvell,mvebu-sata-phy";
 367                         reg = <0x82000 0x0334>;
 368                         clocks = <&gate_clk 14>;
 369                         clock-names = "sata";
 370                         #phy-cells = <0>;
 371                         status = "ok";
 372                 };
 373
 374                 sata_phy1: sata-phy@84000 {
 375                         compatible = "marvell,mvebu-sata-phy";
 376                         reg = <0x84000 0x0334>;
 377                         clocks = <&gate_clk 15>;
 378                         clock-names = "sata";
 379                         #phy-cells = <0>;
 380                         status = "ok";
 381                 };
 382
 383                 audio0: audio-controller@a0000 {
 384                         compatible = "marvell,kirkwood-audio";
 385                         #sound-dai-cells = <0>;
 386                         reg = <0xa0000 0x2210>;
 387                         interrupts = <24>;
 388                         clocks = <&gate_clk 9>;
 389                         clock-names = "internal";
 390                         status = "disabled";
 391                 };
 392         };
 393 };