arch/arm/boot/dts/kirkwood.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 / {
   4         compatible = "marvell,kirkwood";
   5         interrupt-parent = <&intc>;
   6
   7         cpus {
   8                 #address-cells = <1>;
   9                 #size-cells = <0>;
  10
  11                 cpu@0 {
  12                         device_type = "cpu";
  13                         compatible = "marvell,feroceon";
  14                         clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  15                         clock-names = "cpu_clk", "ddrclk", "powersave";
  16                 };
  17         };
  18
  19         aliases {
  20                gpio0 = &gpio0;
  21                gpio1 = &gpio1;
  22         };
  23
  24         ocp@f1000000 {
  25                 compatible = "simple-bus";
  26                 ranges = <0x00000000 0xf1000000 0x0100000
  27                           0xe0000000 0xe0000000 0x8100000 /* PCIE */
  28                           0xf4000000 0xf4000000 0x0000400
  29                           0xf5000000 0xf5000000 0x0000400>;
  30                 #address-cells = <1>;
  31                 #size-cells = <1>;
  32
  33                 timer: timer@20300 {
  34                         compatible = "marvell,orion-timer";
  35                         reg = <0x20300 0x20>;
  36                         interrupt-parent = <&bridge_intc>;
  37                         interrupts = <1>, <2>;
  38                         clocks = <&core_clk 0>;
  39                 };
  40
  41                 intc: main-interrupt-ctrl@20200 {
  42                         compatible = "marvell,orion-intc";
  43                         interrupt-controller;
  44                         #interrupt-cells = <1>;
  45                         reg = <0x20200 0x10>, <0x20210 0x10>;
  46                 };
  47
  48                 bridge_intc: bridge-interrupt-ctrl@20110 {
  49                         compatible = "marvell,orion-bridge-intc";
  50                         interrupt-controller;
  51                         #interrupt-cells = <1>;
  52                         reg = <0x20110 0x8>;
  53                         interrupts = <1>;
  54                         marvell,#interrupts = <6>;
  55                 };
  56
  57                 core_clk: core-clocks@10030 {
  58                         compatible = "marvell,kirkwood-core-clock";
  59                         reg = <0x10030 0x4>;
  60                         #clock-cells = <1>;
  61                 };
  62
  63                 gpio0: gpio@10100 {
  64                         compatible = "marvell,orion-gpio";
  65                         #gpio-cells = <2>;
  66                         gpio-controller;
  67                         reg = <0x10100 0x40>;
  68                         ngpios = <32>;
  69                         interrupt-controller;
  70                         #interrupt-cells = <2>;
  71                         interrupts = <35>, <36>, <37>, <38>;
  72                         clocks = <&gate_clk 7>;
  73                 };
  74
  75                 gpio1: gpio@10140 {
  76                         compatible = "marvell,orion-gpio";
  77                         #gpio-cells = <2>;
  78                         gpio-controller;
  79                         reg = <0x10140 0x40>;
  80                         ngpios = <18>;
  81                         interrupt-controller;
  82                         #interrupt-cells = <2>;
  83                         interrupts = <39>, <40>, <41>;
  84                         clocks = <&gate_clk 7>;
  85                 };
  86
  87                 serial@12000 {
  88                         compatible = "ns16550a";
  89                         reg = <0x12000 0x100>;
  90                         reg-shift = <2>;
  91                         interrupts = <33>;
  92                         clocks = <&gate_clk 7>;
  93                         status = "disabled";
  94                 };
  95
  96                 serial@12100 {
  97                         compatible = "ns16550a";
  98                         reg = <0x12100 0x100>;
  99                         reg-shift = <2>;
 100                         interrupts = <34>;
 101                         clocks = <&gate_clk 7>;
 102                         status = "disabled";
 103                 };
 104
 105                 spi@10600 {
 106                         compatible = "marvell,orion-spi";
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109                         cell-index = <0>;
 110                         interrupts = <23>;
 111                         reg = <0x10600 0x28>;
 112                         clocks = <&gate_clk 7>;
 113                         status = "disabled";
 114                 };
 115
 116                 gate_clk: clock-gating-control@2011c {
 117                         compatible = "marvell,kirkwood-gating-clock";
 118                         reg = <0x2011c 0x4>;
 119                         clocks = <&core_clk 0>;
 120                         #clock-cells = <1>;
 121                 };
 122
 123                 wdt: watchdog-timer@20300 {
 124                         compatible = "marvell,orion-wdt";
 125                         reg = <0x20300 0x28>;
 126                         interrupt-parent = <&bridge_intc>;
 127                         interrupts = <3>;
 128                         clocks = <&gate_clk 7>;
 129                         status = "okay";
 130                 };
 131
 132                 xor@60800 {
 133                         compatible = "marvell,orion-xor";
 134                         reg = <0x60800 0x100
 135                                0x60A00 0x100>;
 136                         status = "okay";
 137                         clocks = <&gate_clk 8>;
 138
 139                         xor00 {
 140                               interrupts = <5>;
 141                               dmacap,memcpy;
 142                               dmacap,xor;
 143                         };
 144                         xor01 {
 145                               interrupts = <6>;
 146                               dmacap,memcpy;
 147                               dmacap,xor;
 148                               dmacap,memset;
 149                         };
 150                 };
 151
 152                 xor@60900 {
 153                         compatible = "marvell,orion-xor";
 154                         reg = <0x60900 0x100
 155                                0xd0B00 0x100>;
 156                         status = "okay";
 157                         clocks = <&gate_clk 16>;
 158
 159                         xor00 {
 160                               interrupts = <7>;
 161                               dmacap,memcpy;
 162                               dmacap,xor;
 163                         };
 164                         xor01 {
 165                               interrupts = <8>;
 166                               dmacap,memcpy;
 167                               dmacap,xor;
 168                               dmacap,memset;
 169                         };
 170                 };
 171
 172                 ehci@50000 {
 173                         compatible = "marvell,orion-ehci";
 174                         reg = <0x50000 0x1000>;
 175                         interrupts = <19>;
 176                         clocks = <&gate_clk 3>;
 177                         status = "okay";
 178                 };
 179
 180                 nand@3000000 {
 181                         #address-cells = <1>;
 182                         #size-cells = <1>;
 183                         cle = <0>;
 184                         ale = <1>;
 185                         bank-width = <1>;
 186                         compatible = "marvell,orion-nand";
 187                         reg = <0xf4000000 0x400>;
 188                         chip-delay = <25>;
 189                         /* set partition map and/or chip-delay in board dts */
 190                         clocks = <&gate_clk 7>;
 191                         status = "disabled";
 192                 };
 193
 194                 i2c@11000 {
 195                         compatible = "marvell,mv64xxx-i2c";
 196                         reg = <0x11000 0x20>;
 197                         #address-cells = <1>;
 198                         #size-cells = <0>;
 199                         interrupts = <29>;
 200                         clock-frequency = <100000>;
 201                         clocks = <&gate_clk 7>;
 202                         status = "disabled";
 203                 };
 204
 205                 crypto@30000 {
 206                         compatible = "marvell,orion-crypto";
 207                         reg = <0x30000 0x10000>,
 208                               <0xf5000000 0x800>;
 209                         reg-names = "regs", "sram";
 210                         interrupts = <22>;
 211                         clocks = <&gate_clk 17>;
 212                         status = "okay";
 213                 };
 214
 215                 mdio: mdio-bus@72004 {
 216                         compatible = "marvell,orion-mdio";
 217                         #address-cells = <1>;
 218                         #size-cells = <0>;
 219                         reg = <0x72004 0x84>;
 220                         interrupts = <46>;
 221                         clocks = <&gate_clk 0>;
 222                         status = "disabled";
 223
 224                         /* add phy nodes in board file */
 225                 };
 226
 227                 eth0: ethernet-controller@72000 {
 228                         compatible = "marvell,kirkwood-eth";
 229                         #address-cells = <1>;
 230                         #size-cells = <0>;
 231                         reg = <0x72000 0x4000>;
 232                         clocks = <&gate_clk 0>;
 233                         marvell,tx-checksum-limit = <1600>;
 234                         status = "disabled";
 235
 236                         ethernet0-port@0 {
 237                                 device_type = "network";
 238                                 compatible = "marvell,kirkwood-eth-port";
 239                                 reg = <0>;
 240                                 interrupts = <11>;
 241                                 /* overwrite MAC address in bootloader */
 242                                 local-mac-address = [00 00 00 00 00 00];
 243                                 /* set phy-handle property in board file */
 244                         };
 245                 };
 246
 247                 eth1: ethernet-controller@76000 {
 248                         compatible = "marvell,kirkwood-eth";
 249                         #address-cells = <1>;
 250                         #size-cells = <0>;
 251                         reg = <0x76000 0x4000>;
 252                         clocks = <&gate_clk 19>;
 253                         marvell,tx-checksum-limit = <1600>;
 254                         status = "disabled";
 255
 256                         ethernet1-port@0 {
 257                                 device_type = "network";
 258                                 compatible = "marvell,kirkwood-eth-port";
 259                                 reg = <0>;
 260                                 interrupts = <15>;
 261                                 /* overwrite MAC address in bootloader */
 262                                 local-mac-address = [00 00 00 00 00 00];
 263                                 /* set phy-handle property in board file */
 264                         };
 265                 };
 266         };
 267 };