arch/arm/boot/dts/lpc4350-hitex-eval.dts

   1 /*
   2  * Hitex LPC4350 Evaluation Board
   3  *
   4  * Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com>
   5  *
   6  * This code is released using a dual license strategy: BSD/GPL
   7  * You can choose the licence that better fits your requirements.
   8  *
   9  * Released under the terms of 3-clause BSD License
  10  * Released under the terms of GNU General Public License Version 2.0
  11  *
  12  */
  13 /dts-v1/;
  14
  15 #include "lpc18xx.dtsi"
  16 #include "lpc4350.dtsi"
  17
  18 #include "dt-bindings/input/input.h"
  19 #include "dt-bindings/gpio/gpio.h"
  20
  21 / {
  22         model = "Hitex LPC4350 Evaluation Board";
  23         compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
  24
  25         aliases {
  26                 serial0 = &uart0;
  27                 serial1 = &uart1;
  28                 serial2 = &uart2;
  29                 serial3 = &uart3;
  30         };
  31
  32         chosen {
  33                 stdout-path = &uart0;
  34         };
  35
  36         memory@28000000 {
  37                 device_type = "memory";
  38                 reg = <0x28000000 0x800000>; /* 8 MB */
  39         };
  40
  41         pca_buttons {
  42                 compatible = "gpio-keys-polled";
  43                 #address-cells = <1>;
  44                 #size-cells = <0>;
  45                 poll-interval = <100>;
  46                 autorepeat;
  47
  48                 button0 {
  49                         label = "joy:right";
  50                         linux,code = <KEY_RIGHT>;
  51                         gpios = <&pca_gpio 8 GPIO_ACTIVE_LOW>;
  52                 };
  53
  54                 button1 {
  55                         label = "joy:up";
  56                         linux,code = <KEY_UP>;
  57                         gpios = <&pca_gpio 9 GPIO_ACTIVE_LOW>;
  58                 };
  59
  60
  61                 button2 {
  62                         label = "joy:enter";
  63                         linux,code = <KEY_ENTER>;
  64                         gpios = <&pca_gpio 10 GPIO_ACTIVE_LOW>;
  65                 };
  66
  67                 button3 {
  68                         label = "joy:left";
  69                         linux,code = <KEY_LEFT>;
  70                         gpios = <&pca_gpio 11 GPIO_ACTIVE_LOW>;
  71                 };
  72
  73                 button4 {
  74                         label = "joy:down";
  75                         linux,code = <KEY_DOWN>;
  76                         gpios = <&pca_gpio 12 GPIO_ACTIVE_LOW>;
  77                 };
  78
  79                 button5 {
  80                         label = "user:sw3";
  81                         linux,code = <KEY_F1>;
  82                         gpios = <&pca_gpio 13 GPIO_ACTIVE_LOW>;
  83                 };
  84
  85                 button6 {
  86                         label = "user:sw4";
  87                         linux,code = <KEY_F2>;
  88                         gpios = <&pca_gpio 14 GPIO_ACTIVE_LOW>;
  89                 };
  90
  91                 button7 {
  92                         label = "user:sw5";
  93                         linux,code = <KEY_F3>;
  94                         gpios = <&pca_gpio 15 GPIO_ACTIVE_LOW>;
  95                 };
  96         };
  97
  98         pca_leds {
  99                 compatible = "gpio-leds";
 100
 101                 led0 {
 102                         label = "ext:led0";
 103                         gpios = <&pca_gpio 0 GPIO_ACTIVE_LOW>;
 104                         linux,default-trigger = "heartbeat";
 105                 };
 106
 107                 led1 {
 108                         label = "ext:led1";
 109                         gpios = <&pca_gpio 1 GPIO_ACTIVE_LOW>;
 110                 };
 111
 112                 led2 {
 113                         label = "ext:led2";
 114                         gpios = <&pca_gpio 2 GPIO_ACTIVE_LOW>;
 115                 };
 116
 117                 led3 {
 118                         label = "ext:led3";
 119                         gpios = <&pca_gpio 3 GPIO_ACTIVE_LOW>;
 120                 };
 121         };
 122
 123         vcc: vcc_fixed {
 124                 compatible = "regulator-fixed";
 125                 regulator-name = "3v3io";
 126                 regulator-min-microvolt = <3300000>;
 127                 regulator-max-microvolt = <3300000>;
 128         };
 129 };
 130
 131 &pinctrl {
 132         adc1_pins: adc1-pins {
 133                 adc1_pins_cfg {
 134                         pins = "pf_9";
 135                         function = "adc";
 136                         input-disable;
 137                         bias-disable;
 138                 };
 139         };
 140
 141         emc_pins: emc-pins {
 142                 emc_addr0_23_cfg {
 143                         pins =  "p2_9",  "p2_10", "p2_11", "p2_12",
 144                                 "p2_13", "p1_0",  "p1_1",  "p1_2",
 145                                 "p2_8",  "p2_7",  "p2_6",  "p2_2",
 146                                 "p2_1",  "p2_0",  "p6_8",  "p6_7",
 147                                 "pd_16", "pd_15", "pe_0",  "pe_1",
 148                                 "pe_2",  "pe_3",  "pe_4",  "pa_4";
 149                         function = "emc";
 150                         slew-rate = <1>;
 151                         bias-disable;
 152                         input-enable;
 153                         input-schmitt-disable;
 154                 };
 155
 156                 emc_data0_15_cfg {
 157                         pins =  "p1_7",  "p1_8",  "p1_9",  "p1_10",
 158                                 "p1_11", "p1_12", "p1_13", "p1_14",
 159                                 "p5_4",  "p5_5",  "p5_6",  "p5_7",
 160                                 "p5_0",  "p5_1",  "p5_2",  "p5_3";
 161                         function = "emc";
 162                         slew-rate = <1>;
 163                         bias-disable;
 164                         input-enable;
 165                         input-schmitt-disable;
 166                 };
 167
 168                 emc_we_oe_cfg {
 169                         pins = "p1_6", "p1_3";
 170                         function = "emc";
 171                         slew-rate = <1>;
 172                         bias-disable;
 173                         input-enable;
 174                         input-schmitt-disable;
 175                 };
 176
 177                 emc_bls0_3_cfg {
 178                         pins = "p1_4", "p6_6", "pd_13", "pd_10";
 179                         function = "emc";
 180                         slew-rate = <1>;
 181                         bias-disable;
 182                         input-enable;
 183                         input-schmitt-disable;
 184                 };
 185
 186                 emc_cs0_cs2_cfg {
 187                         pins = "p1_5", "pd_12";
 188                         function = "emc";
 189                         slew-rate = <1>;
 190                         bias-disable;
 191                         input-enable;
 192                         input-schmitt-disable;
 193                 };
 194
 195                 emc_sdram_dqm0_3_cfg {
 196                         pins = "p6_12", "p6_10", "pd_0", "pe_13";
 197                         function = "emc";
 198                         slew-rate = <1>;
 199                         bias-disable;
 200                         input-enable;
 201                         input-schmitt-disable;
 202                 };
 203
 204                 emc_sdram_ras_cas_cfg {
 205                         pins = "p6_5", "p6_4";
 206                         function = "emc";
 207                         slew-rate = <1>;
 208                         bias-disable;
 209                         input-enable;
 210                         input-schmitt-disable;
 211                 };
 212
 213                 emc_sdram_dycs0_cfg {
 214                         pins = "p6_9";
 215                         function = "emc";
 216                         slew-rate = <1>;
 217                         bias-disable;
 218                         input-enable;
 219                         input-schmitt-disable;
 220                 };
 221
 222                 emc_sdram_cke_cfg {
 223                         pins = "p6_11";
 224                         function = "emc";
 225                         slew-rate = <1>;
 226                         bias-disable;
 227                         input-enable;
 228                         input-schmitt-disable;
 229                 };
 230
 231                 emc_sdram_clock_cfg {
 232                         pins = "clk0", "clk1", "clk2", "clk3";
 233                         function = "emc";
 234                         slew-rate = <1>;
 235                         bias-disable;
 236                         input-enable;
 237                         input-schmitt-disable;
 238                 };
 239         };
 240
 241         enet_mii_pins: enet-mii-pins {
 242                 enet_mii_rxd0_3_cfg {
 243                         pins = "p1_15", "p0_0", "p9_3", "p9_2";
 244                         function = "enet";
 245                         bias-disable;
 246                         input-enable;
 247                 };
 248
 249                 enet_mii_txd0_3_cfg {
 250                         pins = "p1_18", "p1_20", "p9_4", "p9_5";
 251                         function = "enet";
 252                         bias-disable;
 253                 };
 254
 255                 enet_mii_crs_col_cfg {
 256                         pins = "p9_0", "p9_6";
 257                         function = "enet";
 258                         bias-disable;
 259                         input-enable;
 260                 };
 261
 262                 enet_mii_rx_clk_dv_er_cfg {
 263                         pins = "pc_0", "p1_16", "p9_1";
 264                         function = "enet";
 265                         bias-disable;
 266                         input-enable;
 267                 };
 268
 269                 enet_mii_tx_clk_en_cfg {
 270                         pins = "p1_19", "p0_1";
 271                         function = "enet";
 272                         bias-disable;
 273                         input-enable;
 274                 };
 275
 276                 enet_mdio_cfg {
 277                         pins = "p1_17";
 278                         function = "enet";
 279                         bias-disable;
 280                         input-enable;
 281                 };
 282
 283                 enet_mdc_cfg {
 284                         pins = "pc_1";
 285                         function = "enet";
 286                         bias-disable;
 287                 };
 288         };
 289
 290         i2c0_pins: i2c0-pins {
 291                 i2c0_pins_cfg {
 292                         pins = "i2c0_scl", "i2c0_sda";
 293                         function = "i2c0";
 294                         input-enable;
 295                 };
 296         };
 297
 298         spifi_pins: spifi-pins {
 299                 spifi_clk_cfg {
 300                         pins = "p3_3";
 301                         function = "spifi";
 302                         slew-rate = <1>;
 303                         bias-disable;
 304                         input-enable;
 305                         input-schmitt-disable;
 306                 };
 307
 308                 spifi_mosi_miso_sio2_3_cfg {
 309                         pins = "p3_7", "p3_6", "p3_5", "p3_4";
 310                         function = "spifi";
 311                         slew-rate = <1>;
 312                         bias-disable;
 313                         input-enable;
 314                         input-schmitt-disable;
 315                 };
 316
 317                 spifi_cs_cfg {
 318                         pins = "p3_8";
 319                         function = "spifi";
 320                         slew-rate = <1>;
 321                         bias-disable;
 322                         input-enable;
 323                         input-schmitt-disable;
 324                 };
 325         };
 326
 327         uart0_pins: uart0-pins {
 328                 uart0_rx_cfg {
 329                         pins = "pf_11";
 330                         function = "uart0";
 331                         input-schmitt-disable;
 332                         bias-disable;
 333                         input-enable;
 334                 };
 335
 336                 uart0_tx_cfg {
 337                         pins = "pf_10";
 338                         function = "uart0";
 339                         bias-pull-down;
 340                 };
 341         };
 342 };
 343
 344 &adc1 {
 345         status = "okay";
 346         vref-supply = <&vcc>;
 347         pinctrl-names = "default";
 348         pinctrl-0 = <&adc1_pins>;
 349 };
 350
 351 &emc {
 352         status = "okay";
 353         pinctrl-names = "default";
 354         pinctrl-0 = <&emc_pins>;
 355
 356         cs0 {
 357                 #address-cells = <2>;
 358                 #size-cells = <1>;
 359                 ranges;
 360
 361                 mpmc,cs = <0>;
 362                 mpmc,memory-width = <16>;
 363                 mpmc,byte-lane-low;
 364                 mpmc,write-enable-delay = <0>;
 365                 mpmc,output-enable-delay = <0>;
 366                 mpmc,read-access-delay = <70>;
 367                 mpmc,page-mode-read-delay = <70>;
 368
 369                 flash@0,0 {
 370                         compatible = "sst,sst39vf320", "cfi-flash";
 371                         reg = <0 0 0x400000>;
 372                         bank-width = <2>;
 373                         #address-cells = <1>;
 374                         #size-cells = <1>;
 375
 376                         partition@0 {
 377                                 label = "bootloader";
 378                                 reg = <0x000000 0x040000>; /* 256 KiB */
 379                         };
 380
 381                         partition@1 {
 382                                 label = "kernel";
 383                                 reg = <0x040000 0x2C0000>; /* 2.75 MiB */
 384                         };
 385
 386                         partition@2 {
 387                                 label = "rootfs";
 388                                 reg = <0x300000 0x100000>; /* 1 MiB */
 389                         };
 390                 };
 391         };
 392
 393         cs2 {
 394                 #address-cells = <2>;
 395                 #size-cells = <1>;
 396                 ranges;
 397
 398                 mpmc,cs = <2>;
 399                 mpmc,memory-width = <16>;
 400                 mpmc,byte-lane-low;
 401                 mpmc,write-enable-delay = <0>;
 402                 mpmc,output-enable-delay = <30>;
 403                 mpmc,read-access-delay = <90>;
 404                 mpmc,page-mode-read-delay = <55>;
 405                 mpmc,write-access-delay = <55>;
 406                 mpmc,turn-round-delay = <55>;
 407
 408                 ext_sram: sram@2,0 {
 409                         compatible = "mmio-sram";
 410                         reg = <2 0 0x80000>; /* 512 KiB SRAM on IS62WV25616 */
 411                 };
 412         };
 413 };
 414
 415 &enet_tx_clk {
 416         clock-frequency = <25000000>;
 417 };
 418
 419 &i2c0 {
 420         status = "okay";
 421         pinctrl-names = "default";
 422         pinctrl-0 = <&i2c0_pins>;
 423         clock-frequency = <400000>;
 424
 425         /* NXP SE97BTP with temperature sensor + eeprom */
 426         sensor@18 {
 427                 compatible = "nxp,se97", "jedec,jc-42.4-temp";
 428                 reg = <0x18>;
 429         };
 430
 431         eeprom@50 {
 432                 compatible = "nxp,24c02";
 433                 reg = <0x50>;
 434         };
 435
 436         pca_gpio: gpio@24 {
 437                 compatible = "nxp,pca9673";
 438                 reg = <0x24>;
 439                 gpio-controller;
 440                 #gpio-cells = <2>;
 441         };
 442 };
 443
 444 &mac {
 445         status = "okay";
 446         phy-mode = "mii";
 447         pinctrl-names = "default";
 448         pinctrl-0 = <&enet_mii_pins>;
 449 };
 450
 451 &spifi {
 452         status = "okay";
 453         pinctrl-names = "default";
 454         pinctrl-0 = <&spifi_pins>;
 455
 456         flash {
 457                 compatible = "jedec,spi-nor";
 458                 spi-rx-bus-width = <4>;
 459                 #address-cells = <1>;
 460                 #size-cells = <1>;
 461
 462                 partition@0 {
 463                         label = "bootloader";
 464                         reg = <0x000000 0x040000>; /* 256 KiB */
 465                 };
 466
 467                 partition@1 {
 468                         label = "kernel";
 469                         reg = <0x040000 0x2c0000>; /* 2.75 MiB */
 470                 };
 471
 472                 partition@2 {
 473                         label = "rootfs";
 474                         reg = <0x300000 0x500000>; /* 5 MiB */
 475                 };
 476         };
 477 };
 478
 479 &uart0 {
 480         status = "okay";
 481         pinctrl-names = "default";
 482         pinctrl-0 = <&uart0_pins>;
 483 };