arch/arm/boot/dts/mt2701-evb.dts

   1 /*
   2  * Copyright (c) 2015 MediaTek Inc.
   3  * Author: Erin Lo <erin.lo@mediatek.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 /dts-v1/;
  16 #include "mt2701.dtsi"
  17
  18 / {
  19         model = "MediaTek MT2701 evaluation board";
  20         compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
  21
  22         memory {
  23                 reg = <0 0x80000000 0 0x40000000>;
  24         };
  25
  26         sound:sound {
  27                 compatible = "mediatek,mt2701-cs42448-machine";
  28                 mediatek,platform = <&afe>;
  29                 /* CS42448 Machine name */
  30                 audio-routing =
  31                 "Line Out Jack", "AOUT1L",
  32                 "Line Out Jack", "AOUT1R",
  33                 "Line Out Jack", "AOUT2L",
  34                 "Line Out Jack", "AOUT2R",
  35                 "Line Out Jack", "AOUT3L",
  36                 "Line Out Jack", "AOUT3R",
  37                 "Line Out Jack", "AOUT4L",
  38                 "Line Out Jack", "AOUT4R",
  39                 "AIN1L", "AMIC",
  40                 "AIN1R", "AMIC",
  41                 "AIN2L", "Tuner In",
  42                 "AIN2R", "Tuner In",
  43                 "AIN3L", "Satellite Tuner In",
  44                 "AIN3R", "Satellite Tuner In",
  45                 "AIN3L", "AUX In",
  46                 "AIN3R", "AUX In";
  47                 mediatek,audio-codec = <&cs42448>;
  48                 mediatek,audio-codec-bt-mrg = <&bt_sco_codec>;
  49                 pinctrl-names = "default";
  50                 pinctrl-0 = <&aud_pins_default>;
  51                 i2s1-in-sel-gpio1 = <&pio 53 0>;
  52                 i2s1-in-sel-gpio2 = <&pio 54 0>;
  53                 status = "okay";
  54         };
  55
  56         bt_sco_codec:bt_sco_codec {
  57                 compatible = "linux,bt-sco";
  58         };
  59
  60         backlight_lcd: backlight_lcd {
  61                 compatible = "pwm-backlight";
  62                 pwms = <&bls 0 100000>;
  63                 brightness-levels = <
  64                           0  16  32  48  64  80  96 112
  65                         128 144 160 176 192 208 224 240
  66                         255
  67                 >;
  68                 default-brightness-level = <9>;
  69         };
  70 };
  71
  72 &auxadc {
  73         status = "okay";
  74 };
  75
  76 &bls {
  77         status = "okay";
  78         pinctrl-names = "default";
  79         pinctrl-0 = <&pwm_bls_gpio>;
  80 };
  81
  82 &i2c0 {
  83         pinctrl-names = "default";
  84         pinctrl-0 = <&i2c0_pins_a>;
  85         status = "okay";
  86 };
  87
  88 &i2c1 {
  89         pinctrl-names = "default";
  90         pinctrl-0 = <&i2c1_pins_a>;
  91         status = "okay";
  92 };
  93
  94 &i2c2 {
  95         pinctrl-names = "default";
  96         pinctrl-0 = <&i2c2_pins_a>;
  97         status = "okay";
  98         cs42448: cs42448@48 {
  99                 compatible = "cirrus,cs42448";
 100                 reg = <0x48>;
 101                 clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>;
 102                 clock-names = "mclk";
 103         };
 104 };
 105
 106 &pio {
 107         i2c0_pins_a: i2c0@0 {
 108                 pins1 {
 109                         pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>,
 110                                  <MT2701_PIN_76_SCL0__FUNC_SCL0>;
 111                         bias-disable;
 112                 };
 113         };
 114
 115         i2c1_pins_a: i2c1@0 {
 116                 pins1 {
 117                         pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>,
 118                                  <MT2701_PIN_58_SCL1__FUNC_SCL1>;
 119                         bias-disable;
 120                 };
 121         };
 122
 123         i2c2_pins_a: i2c2@0 {
 124                 pins1 {
 125                         pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>,
 126                                  <MT2701_PIN_78_SCL2__FUNC_SCL2>;
 127                         bias-disable;
 128                 };
 129         };
 130
 131         pwm_bls_gpio: pwm_bls_gpio {
 132                 pins_cmd_dat {
 133                         pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>;
 134                 };
 135         };
 136
 137         spi_pins_a: spi0@0 {
 138                 pins_spi {
 139                         pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>,
 140                                  <MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>,
 141                                  <MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>,
 142                                  <MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>;
 143                         bias-disable;
 144                 };
 145         };
 146
 147         aud_pins_default: audiodefault {
 148                 pins_cmd_dat {
 149                         pinmux = <MT2701_PIN_49_I2S0_DATA__FUNC_I2S0_DATA>,
 150                                  <MT2701_PIN_72_I2S0_DATA_IN__FUNC_I2S0_DATA_IN>,
 151                                  <MT2701_PIN_73_I2S0_LRCK__FUNC_I2S0_LRCK>,
 152                                  <MT2701_PIN_74_I2S0_BCK__FUNC_I2S0_BCK>,
 153                                  <MT2701_PIN_126_I2S0_MCLK__FUNC_I2S0_MCLK>,
 154                                  <MT2701_PIN_33_I2S1_DATA__FUNC_I2S1_DATA>,
 155                                  <MT2701_PIN_34_I2S1_DATA_IN__FUNC_I2S1_DATA_IN>,
 156                                  <MT2701_PIN_35_I2S1_BCK__FUNC_I2S1_BCK>,
 157                                  <MT2701_PIN_36_I2S1_LRCK__FUNC_I2S1_LRCK>,
 158                                  <MT2701_PIN_37_I2S1_MCLK__FUNC_I2S1_MCLK>,
 159                                  <MT2701_PIN_203_PWM0__FUNC_I2S2_DATA>,
 160                                  <MT2701_PIN_204_PWM1__FUNC_I2S3_DATA>,
 161                                  <MT2701_PIN_53_SPI0_CSN__FUNC_GPIO53>,
 162                                  <MT2701_PIN_54_SPI0_CK__FUNC_GPIO54>,
 163                                  <MT2701_PIN_18_PCM_CLK__FUNC_MRG_CLK>,
 164                                  <MT2701_PIN_19_PCM_SYNC__FUNC_MRG_SYNC>,
 165                                  <MT2701_PIN_20_PCM_RX__FUNC_MRG_TX>,
 166                                  <MT2701_PIN_21_PCM_TX__FUNC_MRG_RX>;
 167                         drive-strength = <MTK_DRIVE_12mA>;
 168                         bias-pull-down;
 169                 };
 170         };
 171
 172         spi_pins_b: spi1@0 {
 173                 pins_spi {
 174                         pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>,
 175                                  <MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>,
 176                                  <MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>,
 177                                  <MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>;
 178                         bias-disable;
 179                 };
 180         };
 181
 182         spi_pins_c: spi2@0 {
 183                 pins_spi {
 184                         pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>,
 185                                  <MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>,
 186                                  <MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>,
 187                                  <MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>;
 188                         bias-disable;
 189                 };
 190         };
 191 };
 192
 193 &spi0 {
 194         pinctrl-names = "default";
 195         pinctrl-0 = <&spi_pins_a>;
 196         status = "disabled";
 197 };
 198
 199 &spi1 {
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&spi_pins_b>;
 202         status = "disabled";
 203 };
 204
 205 &spi2 {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&spi_pins_c>;
 208         status = "disabled";
 209 };
 210
 211 &nor_flash {
 212         pinctrl-names = "default";
 213         pinctrl-0 = <&nor_pins_default>;
 214         status = "okay";
 215         flash@0 {
 216                 compatible = "jedec,spi-nor";
 217                 reg = <0>;
 218         };
 219 };
 220
 221 &pio {
 222         nor_pins_default: nor {
 223                 pins1 {
 224                         pinmux = <MT2701_PIN_240_EXT_XCS__FUNC_EXT_XCS>,
 225                                  <MT2701_PIN_241_EXT_SCK__FUNC_EXT_SCK>,
 226                                  <MT2701_PIN_239_EXT_SDIO0__FUNC_EXT_SDIO0>,
 227                                  <MT2701_PIN_238_EXT_SDIO1__FUNC_EXT_SDIO1>,
 228                                  <MT2701_PIN_237_EXT_SDIO2__FUNC_EXT_SDIO2>,
 229                                  <MT2701_PIN_236_EXT_SDIO3__FUNC_EXT_SDIO3>;
 230                         drive-strength = <MTK_DRIVE_4mA>;
 231                         bias-pull-up;
 232                 };
 233         };
 234 };
 235
 236 &uart0 {
 237         status = "okay";
 238 };