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ARM: dts: omap: Add missing #phy-cells to usb-nop-xceiv
[mirror_ubuntu-bionic-kernel.git] / arch / arm / boot / dts / omap3-cm-t3x.dtsi
1 /*
2 * Common support for CompuLab CM-T3x CoMs
3 */
4
5 / {
6
7 memory@80000000 {
8 device_type = "memory";
9 reg = <0x80000000 0x10000000>; /* 256 MB */
10 };
11
12 leds {
13 compatible = "gpio-leds";
14 pinctrl-names = "default";
15 pinctrl-0 = <&green_led_pins>;
16 ledb {
17 label = "cm-t3x:green";
18 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
19 linux,default-trigger = "heartbeat";
20 };
21 };
22
23 /* HS USB Port 1 Power */
24 hsusb1_power: hsusb1_power_reg {
25 compatible = "regulator-fixed";
26 regulator-name = "hsusb1_vbus";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 startup-delay-us = <70000>;
30 };
31
32 /* HS USB Port 2 Power */
33 hsusb2_power: hsusb2_power_reg {
34 compatible = "regulator-fixed";
35 regulator-name = "hsusb2_vbus";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 startup-delay-us = <70000>;
39 };
40
41 /* HS USB Host PHY on PORT 1 */
42 hsusb1_phy: hsusb1_phy {
43 compatible = "usb-nop-xceiv";
44 vcc-supply = <&hsusb1_power>;
45 #phy-cells = <0>;
46 };
47
48 /* HS USB Host PHY on PORT 2 */
49 hsusb2_phy: hsusb2_phy {
50 compatible = "usb-nop-xceiv";
51 vcc-supply = <&hsusb2_power>;
52 #phy-cells = <0>;
53 };
54
55 ads7846reg: ads7846-reg {
56 compatible = "regulator-fixed";
57 regulator-name = "ads7846-reg";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 };
61
62 tv0: connector {
63 compatible = "svideo-connector";
64 label = "tv";
65
66 port {
67 tv_connector_in: endpoint {
68 remote-endpoint = <&venc_out>;
69 };
70 };
71 };
72 };
73
74 &omap3_pmx_core {
75
76 uart3_pins: pinmux_uart3_pins {
77 pinctrl-single,pins = <
78 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
79 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
80 >;
81 };
82
83 mmc1_pins: pinmux_mmc1_pins {
84 pinctrl-single,pins = <
85 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
86 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
87 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
88 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
89 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
90 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
91 >;
92 };
93
94 green_led_pins: pinmux_green_led_pins {
95 pinctrl-single,pins = <
96 OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4) /* sys_clkout2.gpio_186 */
97 >;
98 };
99
100 dss_dpi_pins_common: pinmux_dss_dpi_pins_common {
101 pinctrl-single,pins = <
102 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
103 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
104 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
105 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
106
107 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
108 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
109 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
110 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
111 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
112 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
113 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
114 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
115 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
116 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
117 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
118 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
119 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
120 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
121 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
122 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
123 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
124 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
125 >;
126 };
127
128 dss_dpi_pins_cm_t35x: pinmux_dss_dpi_pins_cm_t35x {
129 pinctrl-single,pins = <
130 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
131 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
132 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
133 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
134 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
135 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
136 >;
137 };
138
139 ads7846_pins: pinmux_ads7846_pins {
140 pinctrl-single,pins = <
141 OMAP3_CORE1_IOPAD(0x20ba, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
142 >;
143 };
144
145 mcspi1_pins: pinmux_mcspi1_pins {
146 pinctrl-single,pins = <
147 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk */
148 OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo */
149 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi */
150 OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0 */
151 >;
152 };
153
154 i2c1_pins: pinmux_i2c1_pins {
155 pinctrl-single,pins = <
156 OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
157 OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
158 >;
159 };
160
161 mcbsp2_pins: pinmux_mcbsp2_pins {
162 pinctrl-single,pins = <
163 OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
164 OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
165 OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
166 OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
167 >;
168 };
169 };
170
171 &uart3 {
172 pinctrl-names = "default";
173 pinctrl-0 = <&uart3_pins>;
174 };
175
176 &mmc1 {
177 pinctrl-names = "default";
178 pinctrl-0 = <&mmc1_pins>;
179 bus-width = <4>;
180 };
181
182 &mmc3 {
183 status = "disabled";
184 };
185
186 &i2c1 {
187 pinctrl-names = "default";
188 pinctrl-0 = <&i2c1_pins>;
189
190 clock-frequency = <400000>;
191
192 at24@50 {
193 compatible = "atmel,24c02";
194 pagesize = <16>;
195 reg = <0x50>;
196 };
197 };
198
199 &i2c3 {
200 clock-frequency = <400000>;
201 };
202
203 &usbhshost {
204 port1-mode = "ehci-phy";
205 port2-mode = "ehci-phy";
206 };
207
208 &usbhsehci {
209 phys = <&hsusb1_phy &hsusb2_phy>;
210 };
211
212 &mcspi1 {
213 pinctrl-names = "default";
214 pinctrl-0 = <&mcspi1_pins>;
215
216 /* touch controller */
217 ads7846@0 {
218 pinctrl-names = "default";
219 pinctrl-0 = <&ads7846_pins>;
220
221 compatible = "ti,ads7846";
222 vcc-supply = <&ads7846reg>;
223
224 reg = <0>; /* CS0 */
225 spi-max-frequency = <1500000>;
226
227 interrupt-parent = <&gpio2>;
228 interrupts = <25 0>; /* gpio_57 */
229 pendown-gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
230
231 ti,x-min = /bits/ 16 <0x0>;
232 ti,x-max = /bits/ 16 <0x0fff>;
233 ti,y-min = /bits/ 16 <0x0>;
234 ti,y-max = /bits/ 16 <0x0fff>;
235
236 ti,x-plate-ohms = /bits/ 16 <180>;
237 ti,pressure-max = /bits/ 16 <255>;
238
239 ti,debounce-max = /bits/ 16 <30>;
240 ti,debounce-tol = /bits/ 16 <10>;
241 ti,debounce-rep = /bits/ 16 <1>;
242
243 wakeup-source;
244 };
245 };
246
247 &venc {
248 status = "ok";
249
250 port {
251 venc_out: endpoint {
252 remote-endpoint = <&tv_connector_in>;
253 ti,channels = <2>;
254 };
255 };
256 };
257
258 &mcbsp2 {
259 status = "ok";
260
261 pinctrl-names = "default";
262 pinctrl-0 = <&mcbsp2_pins>;
263 };
264
265 &gpmc {
266 ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
267
268 nand@0,0 {
269 compatible = "ti,omap2-nand";
270 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
271 interrupt-parent = <&gpmc>;
272 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
273 <1 IRQ_TYPE_NONE>; /* termcount */
274 nand-bus-width = <8>;
275 gpmc,device-width = <1>;
276 ti,nand-ecc-opt = "sw";
277
278 gpmc,cs-on-ns = <0>;
279 gpmc,cs-rd-off-ns = <120>;
280 gpmc,cs-wr-off-ns = <120>;
281
282 gpmc,adv-on-ns = <0>;
283 gpmc,adv-rd-off-ns = <120>;
284 gpmc,adv-wr-off-ns = <120>;
285
286 gpmc,we-on-ns = <6>;
287 gpmc,we-off-ns = <90>;
288
289 gpmc,oe-on-ns = <6>;
290 gpmc,oe-off-ns = <90>;
291
292 gpmc,page-burst-access-ns = <6>;
293 gpmc,access-ns = <72>;
294 gpmc,cycle2cycle-delay-ns = <60>;
295
296 gpmc,rd-cycle-ns = <120>;
297 gpmc,wr-cycle-ns = <120>;
298 gpmc,wr-access-ns = <186>;
299 gpmc,wr-data-mux-bus-ns = <90>;
300
301 #address-cells = <1>;
302 #size-cells = <1>;
303
304 partition@0 {
305 label = "xloader";
306 reg = <0 0x80000>;
307 };
308 partition@0x80000 {
309 label = "uboot";
310 reg = <0x80000 0x1e0000>;
311 };
312 partition@0x260000 {
313 label = "uboot environment";
314 reg = <0x260000 0x40000>;
315 };
316 partition@0x2a0000 {
317 label = "linux";
318 reg = <0x2a0000 0x400000>;
319 };
320 partition@0x6a0000 {
321 label = "rootfs";
322 reg = <0x6a0000 0x1f880000>;
323 };
324 };
325 };