arch/arm/boot/dts/omap3-igep0020-rev-f.dts

   1 /*
   2  * Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
   3  *
   4  * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
   5  * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include "omap3-igep0020-common.dtsi"
  13
  14 / {
  15         model = "IGEPv2 Rev. F (TI OMAP AM/DM37x)";
  16         compatible = "isee,omap3-igep0020-rev-f", "ti,omap36xx", "ti,omap3";
  17
  18         /* Regulator to trigger the WL_EN signal of the Wifi module */
  19         lbep5clwmc_wlen: regulator-lbep5clwmc-wlen {
  20                 compatible = "regulator-fixed";
  21                 regulator-name = "regulator-lbep5clwmc-wlen";
  22                 regulator-min-microvolt = <3300000>;
  23                 regulator-max-microvolt = <3300000>;
  24                 gpio = <&gpio5 11 GPIO_ACTIVE_HIGH>;            /* gpio_139 - WL_EN */
  25                 enable-active-high;
  26         };
  27 };
  28
  29 &omap3_pmx_core {
  30         lbep5clwmc_pins: pinmux_lbep5clwmc_pins {
  31                 pinctrl-single,pins = <
  32                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT | MUX_MODE4)        /* mcspi1_cs3.gpio_177 - W_IRQ */
  33                         OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE4)       /* sdmmc2_dat5.gpio_137 - BT_EN */
  34                         OMAP3_CORE1_IOPAD(0x216a, PIN_OUTPUT | MUX_MODE4)       /* sdmmc2_dat7.gpio_139 - WL_EN */
  35                 >;
  36         };
  37 };
  38
  39 &mmc2 {
  40         pinctrl-names = "default";
  41         pinctrl-0 = <&mmc2_pins &lbep5clwmc_pins>;
  42         vmmc-supply = <&lbep5clwmc_wlen>;
  43         bus-width = <4>;
  44         non-removable;
  45
  46         #address-cells = <1>;
  47         #size-cells = <0>;
  48         wlcore: wlcore@2 {
  49                 compatible = "ti,wl1835";
  50                 reg = <2>;
  51                 interrupt-parent = <&gpio6>;
  52                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 177 */
  53         };
  54 };