arch/arm/boot/dts/omap3-lilly-a83x.dtsi

   1 /*
   2  * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include "omap36xx.dtsi"
  11
  12 / {
  13         model = "INCOstartec LILLY-A83X module (DM3730)";
  14         compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
  15
  16         chosen {
  17                         bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
  18         };
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x8000000>;   /* 128 MB */
  23         };
  24
  25         leds {
  26                 compatible = "gpio-leds";
  27
  28                 led1 {
  29                         label = "lilly-a83x::led1";
  30                         gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
  31                         linux,default-trigger = "default-on";
  32                 };
  33
  34         };
  35
  36         sound {
  37                 compatible = "ti,omap-twl4030";
  38                 ti,model = "lilly-a83x";
  39
  40                 ti,mcbsp = <&mcbsp2>;
  41         };
  42
  43         reg_vcc3: vcc3 {
  44                 compatible = "regulator-fixed";
  45                 regulator-name = "VCC3";
  46                 regulator-min-microvolt = <3300000>;
  47                 regulator-max-microvolt = <3300000>;
  48                 regulator-always-on;
  49         };
  50
  51         hsusb1_phy: hsusb1_phy {
  52                 compatible = "usb-nop-xceiv";
  53                 vcc-supply = <&reg_vcc3>;
  54                 #phy-cells = <0>;
  55         };
  56 };
  57
  58 &omap3_pmx_wkup {
  59         pinctrl-names = "default";
  60
  61         lan9221_pins: pinmux_lan9221_pins {
  62                 pinctrl-single,pins = <
  63                         OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_129 */
  64                 >;
  65         };
  66
  67         tsc2048_pins: pinmux_tsc2048_pins {
  68                 pinctrl-single,pins = <
  69                         OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4)   /* sys_boot6.gpio_8 */
  70                 >;
  71         };
  72
  73         mmc1cd_pins: pinmux_mmc1cd_pins {
  74                 pinctrl-single,pins = <
  75                         OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4)   /* reserved.gpio_126 */
  76                 >;
  77         };
  78 };
  79
  80 &omap3_pmx_core {
  81         pinctrl-names = "default";
  82
  83         uart1_pins: pinmux_uart1_pins {
  84                 pinctrl-single,pins = <
  85                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)   /* uart1_tx.uart1_tx */
  86                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)   /* uart1_rts.uart1_rts */
  87                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)    /* uart1_cts.uart1_cts */
  88                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)    /* uart1_rx.uart1_rx */
  89                 >;
  90         };
  91
  92         uart2_pins: pinmux_uart2_pins {
  93                 pinctrl-single,pins = <
  94                         OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)   /* mcbsp3_clkx.uart2_tx */
  95                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)    /* mcbsp3_fsx.uart2_rx */
  96                 >;
  97         };
  98
  99         uart3_pins: pinmux_uart3_pins {
 100                 pinctrl-single,pins = <
 101                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)    /* uart3_rx_irrx.uart3_rx_irrx */
 102                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)   /* uart3_tx_irtx.uart3_tx_irtx */
 103                 >;
 104         };
 105
 106         i2c1_pins: pinmux_i2c1_pins {
 107                 pinctrl-single,pins = <
 108                         OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_scl.i2c1_scl */
 109                         OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c1_sda.i2c1_sda */
 110                 >;
 111         };
 112
 113         i2c2_pins: pinmux_i2c2_pins {
 114                 pinctrl-single,pins = <
 115                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)   /* i2c2_scl.i2c2_scl */
 116                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)   /* i2c2_sda.i2c2_sda */
 117                 >;
 118         };
 119
 120         i2c3_pins: pinmux_i2c3_pins {
 121                 pinctrl-single,pins = <
 122                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)   /* i2c3_scl.i2c3_scl */
 123                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)   /* i2c3_sda.i2c3_sda */
 124                 >;
 125         };
 126
 127         hsusb1_pins: pinmux_hsusb1_pins {
 128                 pinctrl-single,pins = <
 129
 130                         /* GPIO 182 controls USB-Hub reset. But USB-Phy its
 131                          * reset can't be controlled. So we clamp this GPIO to
 132                          * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
 133                          */
 134
 135                         OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4)   /* mcspi2_cs1.gpio_182 */
 136                 >;
 137         };
 138
 139         hsusb_otg_pins: pinmux_hsusb_otg_pins {
 140                 pinctrl-single,pins = <
 141                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)   /* hsusb0_clk.hsusb0_clk */
 142                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)  /* hsusb0_stp.hsusb0_stp */
 143                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)   /* hsusb0_dir.hsusb0_dir */
 144                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)   /* hsusb0_nxt.hsusb0_nxt */
 145                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)   /* hsusb0_data0.hsusb0_data0 */
 146                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)   /* hsusb0_data1.hsusb0_data1 */
 147                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)   /* hsusb0_data2.hsusb0_data2 */
 148                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)   /* hsusb0_data3.hsusb0_data3 */
 149                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)   /* hsusb0_data4.hsusb0_data4 */
 150                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)   /* hsusb0_data5.hsusb0_data5 */
 151                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)   /* hsusb0_data6.hsusb0_data6 */
 152                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)   /* hsusb0_data7.hsusb0_data7 */
 153                 >;
 154         };
 155
 156         mmc1_pins: pinmux_mmc1_pins {
 157                 pinctrl-single,pins = <
 158                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_clk.sdmmc1_clk */
 159                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_cmd.sdmmc1_cmd */
 160                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat0.sdmmc1_dat0 */
 161                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat1.sdmmc1_dat1 */
 162                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat2.sdmmc1_dat2 */
 163                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)   /* sdmmc1_dat3.sdmmc1_dat3 */
 164                 >;
 165         };
 166
 167         spi2_pins: pinmux_spi2_pins {
 168                 pinctrl-single,pins = <
 169                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_clk.mcspi2_clk */
 170                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_simo.mcspi2_simo */
 171                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0)   /* mcspi2_somi.mcspi2_somi */
 172                         OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0)   /* mcspi2_cs0.mcspi2_cs0 */
 173                 >;
 174         };
 175 };
 176
 177 &omap3_pmx_core2 {
 178         pinctrl-names = "default";
 179
 180         hsusb1_2_pins: pinmux_hsusb1_2_pins {
 181                 pinctrl-single,pins = <
 182                         OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)  /* etk_clk.hsusb1_stp */
 183                         OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3)   /* etk_ctl.hsusb1_clk */
 184                         OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3)   /* etk_d0.hsusb1_data0 */
 185                         OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3)   /* etk_d1.hsusb1_data1 */
 186                         OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3)   /* etk_d2.hsusb1_data2 */
 187                         OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3)   /* etk_d3.hsusb1_data7 */
 188                         OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3)   /* etk_d4.hsusb1_data4 */
 189                         OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3)   /* etk_d5.hsusb1_data5 */
 190                         OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3)   /* etk_d6.hsusb1_data6 */
 191                         OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3)   /* etk_d7.hsusb1_data3 */
 192                         OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3)   /* etk_d8.hsusb1_dir */
 193                         OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3)   /* etk_d9.hsusb1_nxt */
 194                 >;
 195         };
 196
 197         gpio1_pins: pinmux_gpio1_pins {
 198                 pinctrl-single,pins = <
 199                         OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4)   /* etk_d15.gpio_29 */
 200                 >;
 201         };
 202
 203 };
 204
 205 &gpio1 {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&gpio1_pins>;
 208 };
 209
 210 &gpio6 {
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&hsusb1_pins>;
 213 };
 214
 215 &i2c1 {
 216         clock-frequency = <2600000>;
 217         pinctrl-names = "default";
 218         pinctrl-0 = <&i2c1_pins>;
 219
 220         twl: twl@48 {
 221                 reg = <0x48>;
 222                 interrupts = <7>;   /* SYS_NIRQ cascaded to intc */
 223                 interrupt-parent = <&intc>;
 224
 225                 twl_audio: audio {
 226                         compatible = "ti,twl4030-audio";
 227                         codec {
 228                         };
 229                 };
 230         };
 231 };
 232
 233 #include "twl4030.dtsi"
 234 #include "twl4030_omap3.dtsi"
 235
 236 &twl {
 237         vmmc1: regulator-vmmc1 {
 238                 regulator-always-on;
 239         };
 240
 241         vdd1: regulator-vdd1 {
 242                 regulator-always-on;
 243         };
 244
 245         vdd2: regulator-vdd2 {
 246                 regulator-always-on;
 247         };
 248 };
 249
 250 &i2c2 {
 251         clock-frequency = <2600000>;
 252         pinctrl-names = "default";
 253         pinctrl-0 = <&i2c2_pins>;
 254 };
 255
 256 &i2c3 {
 257         clock-frequency = <2600000>;
 258         pinctrl-names = "default";
 259         pinctrl-0 = <&i2c3_pins>;
 260                 gpiom1: gpio@20 {
 261                         compatible = "microchip,mcp23017";
 262                         gpio-controller;
 263                         #gpio-cells = <2>;
 264                         reg = <0x20>;
 265                 };
 266 };
 267
 268 &uart1 {
 269         pinctrl-names = "default";
 270         pinctrl-0 = <&uart1_pins>;
 271 };
 272
 273 &uart2 {
 274         pinctrl-names = "default";
 275         pinctrl-0 = <&uart2_pins>;
 276 };
 277
 278 &uart3 {
 279         pinctrl-names = "default";
 280         pinctrl-0 = <&uart3_pins>;
 281 };
 282
 283 &uart4 {
 284         status = "disabled";
 285 };
 286
 287 &mmc1 {
 288         cd-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
 289         cd-inverted;
 290         vmmc-supply = <&vmmc1>;
 291         bus-width = <4>;
 292         pinctrl-names = "default";
 293         pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
 294         cap-sdio-irq;
 295         cap-sd-highspeed;
 296         cap-mmc-highspeed;
 297 };
 298
 299 &mmc2 {
 300         status = "disabled";
 301 };
 302
 303 &mmc3 {
 304         status = "disabled";
 305 };
 306
 307 &mcspi2 {
 308         status = "okay";
 309         pinctrl-names = "default";
 310         pinctrl-0 = <&spi2_pins>;
 311
 312         tsc2046@0 {
 313                 reg = <0>;   /* CS0 */
 314                 compatible = "ti,tsc2046";
 315                 interrupt-parent = <&gpio1>;
 316                 interrupts = <8 0>;   /* boot6 / gpio_8 */
 317                 spi-max-frequency = <1000000>;
 318                 pendown-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
 319                 vcc-supply = <&reg_vcc3>;
 320                 pinctrl-names = "default";
 321                 pinctrl-0 = <&tsc2048_pins>;
 322
 323                 ti,x-min = /bits/ 16 <300>;
 324                 ti,x-max = /bits/ 16 <3000>;
 325                 ti,y-min = /bits/ 16 <600>;
 326                 ti,y-max = /bits/ 16 <3600>;
 327                 ti,x-plate-ohms = /bits/ 16 <80>;
 328                 ti,pressure-max = /bits/ 16 <255>;
 329                 ti,swap-xy;
 330
 331                 wakeup-source;
 332         };
 333 };
 334
 335 &usbhsehci {
 336         phys = <&hsusb1_phy>;
 337 };
 338
 339 &usbhshost {
 340         pinctrl-names = "default";
 341         pinctrl-0 = <&hsusb1_2_pins>;
 342         num-ports = <2>;
 343         port1-mode = "ehci-phy";
 344 };
 345
 346 &usb_otg_hs {
 347         pinctrl-names = "default";
 348         pinctrl-0 = <&hsusb_otg_pins>;
 349         interface-type = <0>;
 350         usb-phy = <&usb2_phy>;
 351         phys = <&usb2_phy>;
 352         phy-names = "usb2-phy";
 353         mode = <3>;
 354         power = <50>;
 355 };
 356
 357 &mcbsp2 {
 358         status = "okay";
 359 };
 360
 361 &gpmc {
 362         ranges = <0 0 0x30000000 0x1000000>,
 363                 <7 0 0x15000000 0x01000000>;
 364
 365         nand@0,0 {
 366                 compatible = "ti,omap2-nand";
 367                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 368                 interrupt-parent = <&gpmc>;
 369                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 370                              <1 IRQ_TYPE_NONE>; /* termcount */
 371                 nand-bus-width = <16>;
 372                 ti,nand-ecc-opt = "bch8";
 373                 /* no elm on omap3 */
 374
 375                 gpmc,mux-add-data = <0>;
 376                 gpmc,device-width = <2>;
 377                 gpmc,wait-pin = <0>;
 378                 gpmc,wait-monitoring-ns = <0>;
 379                 gpmc,burst-length= <4>;
 380                 gpmc,cs-on-ns = <0>;
 381                 gpmc,cs-rd-off-ns = <100>;
 382                 gpmc,cs-wr-off-ns = <100>;
 383                 gpmc,adv-on-ns = <0>;
 384                 gpmc,adv-rd-off-ns = <100>;
 385                 gpmc,adv-wr-off-ns = <100>;
 386                 gpmc,oe-on-ns = <5>;
 387                 gpmc,oe-off-ns = <75>;
 388                 gpmc,we-on-ns = <5>;
 389                 gpmc,we-off-ns = <75>;
 390                 gpmc,rd-cycle-ns = <100>;
 391                 gpmc,wr-cycle-ns = <100>;
 392                 gpmc,access-ns = <60>;
 393                 gpmc,page-burst-access-ns = <5>;
 394                 gpmc,bus-turnaround-ns = <0>;
 395                 gpmc,cycle2cycle-samecsen;
 396                 gpmc,cycle2cycle-delay-ns = <50>;
 397                 gpmc,wr-data-mux-bus-ns = <75>;
 398                 gpmc,wr-access-ns = <155>;
 399
 400                 #address-cells = <1>;
 401                 #size-cells = <1>;
 402
 403                 partition@0 {
 404                         label = "MLO";
 405                         reg = <0 0x80000>;
 406                 };
 407
 408                 partition@80000 {
 409                         label = "u-boot";
 410                         reg = <0x80000 0x1e0000>;
 411                 };
 412
 413                 partition@260000 {
 414                         label = "u-boot-environment";
 415                         reg = <0x260000 0x20000>;
 416                 };
 417
 418                 partition@280000 {
 419                         label = "kernel";
 420                         reg = <0x280000 0x500000>;
 421                 };
 422
 423                 partition@780000 {
 424                         label = "filesystem";
 425                         reg = <0x780000 0xf880000>;
 426                 };
 427         };
 428
 429         ethernet@7,0 {
 430                 compatible = "smsc,lan9221", "smsc,lan9115";
 431                 bank-width = <2>;
 432                 gpmc,mux-add-data = <2>;
 433                 gpmc,cs-on-ns = <10>;
 434                 gpmc,cs-rd-off-ns = <60>;
 435                 gpmc,cs-wr-off-ns = <60>;
 436                 gpmc,adv-on-ns = <0>;
 437                 gpmc,adv-rd-off-ns = <10>;
 438                 gpmc,adv-wr-off-ns = <10>;
 439                 gpmc,oe-on-ns = <10>;
 440                 gpmc,oe-off-ns = <60>;
 441                 gpmc,we-on-ns = <10>;
 442                 gpmc,we-off-ns = <60>;
 443                 gpmc,rd-cycle-ns = <100>;
 444                 gpmc,wr-cycle-ns = <100>;
 445                 gpmc,access-ns = <50>;
 446                 gpmc,page-burst-access-ns = <5>;
 447                 gpmc,bus-turnaround-ns = <0>;
 448                 gpmc,cycle2cycle-delay-ns = <75>;
 449                 gpmc,wr-data-mux-bus-ns = <15>;
 450                 gpmc,wr-access-ns = <75>;
 451                 gpmc,cycle2cycle-samecsen;
 452                 gpmc,cycle2cycle-diffcsen;
 453                 vddvario-supply = <&reg_vcc3>;
 454                 vdd33a-supply = <&reg_vcc3>;
 455                 reg-io-width = <4>;
 456                 interrupt-parent = <&gpio5>;
 457                 interrupts = <1 0x2>;
 458                 reg = <7 0 0xff>;
 459                 pinctrl-names = "default";
 460                 pinctrl-0 = <&lan9221_pins>;
 461                 phy-mode = "mii";
 462         };
 463 };