arch/arm/boot/dts/omap3-n950-n9.dtsi

   1 /*
   2  * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
   3  *
   4  * Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include "omap36xx.dtsi"
  12
  13 / {
  14         cpus {
  15                 cpu@0 {
  16                         cpu0-supply = <&vcc>;
  17                         operating-points = <
  18                                 /* kHz    uV */
  19                                 300000  1012500
  20                                 600000  1200000
  21                                 800000  1325000
  22                                 1000000 1375000
  23                         >;
  24                 };
  25         };
  26
  27         memory@80000000 {
  28                 device_type = "memory";
  29                 reg = <0x80000000 0x40000000>; /* 1 GB */
  30         };
  31
  32         vemmc: fixedregulator0 {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "VEMMC";
  35                 regulator-min-microvolt = <2900000>;
  36                 regulator-max-microvolt = <2900000>;
  37                 gpio = <&gpio5 29 GPIO_ACTIVE_HIGH>; /* gpio line 157 */
  38                 startup-delay-us = <150>;
  39                 enable-active-high;
  40         };
  41
  42         vwlan_fixed: fixedregulator2 {
  43                 compatible = "regulator-fixed";
  44                 regulator-name = "VWLAN";
  45                 gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; /* gpio 35 */
  46                 enable-active-high;
  47                 regulator-boot-off;
  48         };
  49
  50         leds {
  51                 compatible = "gpio-leds";
  52
  53                 heartbeat {
  54                         label = "debug::sleep";
  55                         gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;  /* gpio92 */
  56                         linux,default-trigger = "default-on";
  57                         pinctrl-names = "default";
  58                         pinctrl-0 = <&debug_leds>;
  59                 };
  60         };
  61 };
  62
  63 &omap3_pmx_core {
  64         accelerator_pins: pinmux_accelerator_pins {
  65                 pinctrl-single,pins = <
  66                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4)        /* mcspi2_somi.gpio_180 -> LIS302 INT1 */
  67                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4)        /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */
  68                 >;
  69         };
  70
  71         debug_leds: pinmux_debug_led_pins {
  72                 pinctrl-single,pins = <
  73                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4)       /* dss_data22.gpio_92 */
  74                 >;
  75         };
  76
  77         mmc2_pins: pinmux_mmc2_pins {
  78                 pinctrl-single,pins = <
  79                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
  80                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
  81                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
  82                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
  83                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
  84                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
  85                 >;
  86         };
  87
  88         wlan_pins: pinmux_wlan_pins {
  89                 pinctrl-single,pins = <
  90                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE4) /* gpio 35 - wlan enable */
  91                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4) /* gpio 42 - wlan irq */
  92                 >;
  93         };
  94
  95         ssi_pins: pinmux_ssi_pins {
  96                 pinctrl-single,pins = <
  97                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)            /* ssi1_dat_tx */
  98                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)            /* ssi1_flag_tx */
  99                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1)      /* ssi1_rdy_tx */
 100                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)        /* ssi1_wake_tx (cawake) */
 101                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)             /* ssi1_dat_rx */
 102                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)             /* ssi1_flag_rx */
 103                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)            /* ssi1_rdy_rx */
 104                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)            /* ssi1_wake */
 105                 >;
 106         };
 107
 108         ssi_pins_idle: pinmux_ssi_pins_idle {
 109                 pinctrl-single,pins = <
 110                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE7)            /* ssi1_dat_tx */
 111                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE7)            /* ssi1_flag_tx */
 112                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN | MUX_MODE7)    /* ssi1_rdy_tx */
 113                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)        /* ssi1_wake_tx (cawake) */
 114                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE7)             /* ssi1_dat_rx */
 115                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE7)             /* ssi1_flag_rx */
 116                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE4)            /* ssi1_rdy_rx */
 117                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE7)            /* ssi1_wake */
 118                 >;
 119         };
 120
 121         modem_pins1: pinmux_modem_core1_pins {
 122                 pinctrl-single,pins = <
 123                         OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT | MUX_MODE4)        /* gpio_34 (ape_rst_rq) */
 124                         OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE4)            /* gpio_88 (cmt_rst_rq) */
 125                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE4)            /* gpio_93 (cmt_apeslpx) */
 126                 >;
 127         };
 128 };
 129
 130 &omap3_pmx_core2 {
 131         modem_pins2: pinmux_modem_core2_pins {
 132                 pinctrl-single,pins = <
 133                         OMAP3630_CORE2_IOPAD(0x25ec, PIN_OUTPUT | MUX_MODE4)         /* gpio_23 (cmt_en) */
 134                 >;
 135         };
 136 };
 137
 138 &i2c1 {
 139         clock-frequency = <2900000>;
 140
 141         twl: twl@48 {
 142                 reg = <0x48>;
 143                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 144                 interrupt-parent = <&intc>;
 145         };
 146 };
 147
 148 /include/ "twl4030.dtsi"
 149
 150 &twl {
 151         compatible = "ti,twl5031";
 152
 153         twl_power: power {
 154                 compatible = "ti,twl4030-power";
 155                 ti,use_poweroff;
 156         };
 157 };
 158
 159 &twl_gpio {
 160         ti,pullups      = <0x000001>; /* BIT(0) */
 161         ti,pulldowns    = <0x008106>; /* BIT(1) | BIT(2) | BIT(8) | BIT(15) */
 162 };
 163
 164 &vdac {
 165         regulator-name = "vdac";
 166         regulator-min-microvolt = <1800000>;
 167         regulator-max-microvolt = <1800000>;
 168 };
 169
 170 &vpll1 {
 171         regulator-name = "vpll1";
 172         regulator-min-microvolt = <1800000>;
 173         regulator-max-microvolt = <1800000>;
 174 };
 175
 176 &vpll2 {
 177         regulator-name = "vpll2";
 178         regulator-min-microvolt = <1800000>;
 179         regulator-max-microvolt = <1800000>;
 180 };
 181
 182 &vaux1 {
 183         regulator-name = "vaux1";
 184         regulator-min-microvolt = <2800000>;
 185         regulator-max-microvolt = <2800000>;
 186 };
 187
 188 /* CSI-2 receiver */
 189 &vaux2 {
 190         regulator-name = "vaux2";
 191         regulator-min-microvolt = <1800000>;
 192         regulator-max-microvolt = <1800000>;
 193 };
 194
 195 /* Cameras */
 196 &vaux3 {
 197         regulator-name = "vaux3";
 198         regulator-min-microvolt = <2800000>;
 199         regulator-max-microvolt = <2800000>;
 200 };
 201
 202 &vaux4 {
 203         regulator-name = "vaux4";
 204         regulator-min-microvolt = <2800000>;
 205         regulator-max-microvolt = <2800000>;
 206 };
 207
 208 &vmmc1 {
 209         regulator-name = "vmmc1";
 210         regulator-min-microvolt = <1850000>;
 211         regulator-max-microvolt = <3150000>;
 212 };
 213
 214 &vmmc2 {
 215         regulator-name = "vmmc2";
 216         regulator-min-microvolt = <3000000>;
 217         regulator-max-microvolt = <3000000>;
 218 };
 219
 220 &vintana1 {
 221         regulator-name = "vintana1";
 222         regulator-min-microvolt = <1500000>;
 223         regulator-max-microvolt = <1500000>;
 224 };
 225
 226 &vintana2 {
 227         regulator-name = "vintana2";
 228         regulator-min-microvolt = <2750000>;
 229         regulator-max-microvolt = <2750000>;
 230 };
 231
 232 &vintdig {
 233         regulator-name = "vintdig";
 234         regulator-min-microvolt = <1500000>;
 235         regulator-max-microvolt = <1500000>;
 236 };
 237
 238 &vsim {
 239         regulator-name = "vsim";
 240         regulator-min-microvolt = <1800000>;
 241         regulator-max-microvolt = <1800000>;
 242 };
 243
 244 &vio {
 245         regulator-name = "vio";
 246         regulator-min-microvolt = <1800000>;
 247         regulator-max-microvolt = <1800000>;
 248 };
 249
 250 &i2c2 {
 251         clock-frequency = <400000>;
 252 };
 253
 254 &i2c3 {
 255         clock-frequency = <400000>;
 256
 257         lis302: lis302@1d {
 258                 compatible = "st,lis3lv02d";
 259                 reg = <0x1d>;
 260
 261                 Vdd-supply = <&vaux1>;
 262                 Vdd_IO-supply = <&vio>;
 263
 264                 pinctrl-names = "default";
 265                 pinctrl-0 = <&accelerator_pins>;
 266
 267                 interrupts-extended = <&gpio6 20 IRQ_TYPE_EDGE_FALLING>, <&gpio6 21 IRQ_TYPE_EDGE_FALLING>; /* 180, 181 */
 268
 269                 /* click flags */
 270                 st,click-single-x;
 271                 st,click-single-y;
 272                 st,click-single-z;
 273
 274                 /* Limits are 0.5g * value */
 275                 st,click-threshold-x = <8>;
 276                 st,click-threshold-y = <8>;
 277                 st,click-threshold-z = <10>;
 278
 279                 /* Click must be longer than time limit */
 280                 st,click-time-limit = <9>;
 281
 282                 /* Kind of debounce filter */
 283                 st,click-latency = <50>;
 284
 285                 st,wakeup-x-hi;
 286                 st,wakeup-y-hi;
 287                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 288
 289                 st,wakeup2-z-hi;
 290                 st,wakeup2-threshold = <(1000/18)>; /* millig-value / 18 to get HW values */
 291
 292                 st,highpass-cutoff-hz = <2>;
 293
 294                 /* Interrupt line 1 for thresholds */
 295                 st,irq1-ff-wu-1;
 296                 st,irq1-ff-wu-2;
 297                 /* Interrupt line 2 for click detection */
 298                 st,irq2-click;
 299
 300                 st,wu-duration-1 = <8>;
 301                 st,wu-duration-2 = <8>;
 302         };
 303 };
 304
 305 &mmc1 {
 306         status = "disabled";
 307 };
 308
 309 &mmc2 {
 310         pinctrl-names = "default";
 311         pinctrl-0 = <&mmc2_pins>;
 312         vmmc-supply = <&vemmc>;
 313         bus-width = <4>;
 314         ti,non-removable;
 315 };
 316
 317 &mmc3 {
 318         status = "disabled";
 319 };
 320
 321 &usb_otg_hs {
 322         interface-type = <0>;
 323         usb-phy = <&usb2_phy>;
 324         phys = <&usb2_phy>;
 325         phy-names = "usb2-phy";
 326         mode = <3>;
 327         power = <50>;
 328 };
 329
 330 &gpmc {
 331         ranges = <0 0 0x04000000 0x1000000>;    /* CS0: 16MB for OneNAND */
 332
 333         onenand@0,0 {
 334                 #address-cells = <1>;
 335                 #size-cells = <1>;
 336                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 337
 338                 gpmc,sync-read;
 339                 gpmc,sync-write;
 340                 gpmc,burst-length = <16>;
 341                 gpmc,burst-read;
 342                 gpmc,burst-wrap;
 343                 gpmc,burst-write;
 344                 gpmc,device-width = <2>;
 345                 gpmc,mux-add-data = <2>;
 346                 gpmc,cs-on-ns = <0>;
 347                 gpmc,cs-rd-off-ns = <87>;
 348                 gpmc,cs-wr-off-ns = <87>;
 349                 gpmc,adv-on-ns = <0>;
 350                 gpmc,adv-rd-off-ns = <10>;
 351                 gpmc,adv-wr-off-ns = <10>;
 352                 gpmc,oe-on-ns = <15>;
 353                 gpmc,oe-off-ns = <87>;
 354                 gpmc,we-on-ns = <0>;
 355                 gpmc,we-off-ns = <87>;
 356                 gpmc,rd-cycle-ns = <112>;
 357                 gpmc,wr-cycle-ns = <112>;
 358                 gpmc,access-ns = <81>;
 359                 gpmc,page-burst-access-ns = <15>;
 360                 gpmc,bus-turnaround-ns = <0>;
 361                 gpmc,cycle2cycle-delay-ns = <0>;
 362                 gpmc,wait-monitoring-ns = <0>;
 363                 gpmc,clk-activation-ns = <5>;
 364                 gpmc,wr-data-mux-bus-ns = <30>;
 365                 gpmc,wr-access-ns = <81>;
 366                 gpmc,sync-clk-ps = <15000>;
 367
 368                 /*
 369                  * MTD partition table corresponding to Nokia's MeeGo 1.2
 370                  * Harmattan release.
 371                  */
 372                 partition@0 {
 373                         label = "bootloader";
 374                         reg = <0x00000000 0x00100000>;
 375                 };
 376                 partition@1 {
 377                         label = "config";
 378                         reg = <0x00100000 0x002c0000>;
 379                 };
 380                 partition@2 {
 381                         label = "kernel";
 382                         reg = <0x003c0000 0x01000000>;
 383                 };
 384                 partition@3 {
 385                         label = "log";
 386                         reg = <0x013c0000 0x00200000>;
 387                 };
 388                 partition@4 {
 389                         label = "var";
 390                         reg = <0x015c0000 0x1ca40000>;
 391                 };
 392                 partition@5 {
 393                         label = "moslo";
 394                         reg = <0x1e000000 0x02000000>;
 395                 };
 396                 partition@6 {
 397                         label = "omap2-onenand";
 398                         reg = <0x00000000 0x20000000>;
 399                 };
 400         };
 401 };
 402
 403 &ssi_port1 {
 404         pinctrl-names = "default", "idle";
 405         pinctrl-0 = <&ssi_pins>;
 406         pinctrl-1 = <&ssi_pins_idle>;
 407
 408         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
 409
 410         modem: hsi-client {
 411                 pinctrl-names = "default";
 412                 pinctrl-0 = <&modem_pins1 &modem_pins2>;
 413
 414                 hsi-channel-ids = <0>, <1>, <2>, <3>;
 415                 hsi-channel-names = "mcsaab-control",
 416                                     "speech-control",
 417                                     "speech-data",
 418                                     "mcsaab-data";
 419                 hsi-speed-kbps = <96000>;
 420                 hsi-mode = "frame";
 421                 hsi-flow = "synchronized";
 422                 hsi-arb-mode = "round-robin";
 423
 424                 interrupts-extended = <&gpio2 2 IRQ_TYPE_EDGE_RISING>; /* gpio 34 */
 425
 426                 gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>, /* gpio 93 */
 427                         <&gpio3 24 GPIO_ACTIVE_HIGH>, /* gpio 88 */
 428                         <&gpio1 23 GPIO_ACTIVE_HIGH>; /* gpio 23 */
 429                 gpio-names = "cmt_apeslpx",
 430                              "cmt_rst_rq",
 431                              "cmt_en";
 432         };
 433 };
 434
 435 &ssi_port2 {
 436         status = "disabled";
 437 };