2 * Copyright (C) 2011 Picochip, Jamie Iles
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 model = "Picochip picoXcell PC3X3";
15 compatible = "picochip,pc3x3";
24 compatible = "arm,arm1176jz-s";
26 cpu-clock = <&arm_clk>, "cpu";
27 d-cache-line-size = <32>;
28 d-cache-size = <32768>;
29 i-cache-line-size = <32>;
30 i-cache-size = <32768>;
39 clkgate: clkgate@800a0048 {
43 compatible = "picochip,pc3x3-clk-gate";
46 compatible = "picochip,pc3x3-gated-clk";
47 clock-outputs = "bus";
48 picochip,clk-disable-bit = <0>;
49 clock-frequency = <200000000>;
50 ref-clock = <&ref_clk>, "ref";
54 compatible = "picochip,pc3x3-gated-clk";
55 clock-outputs = "bus";
56 picochip,clk-disable-bit = <1>;
57 clock-frequency = <200000000>;
58 ref-clock = <&ref_clk>, "ref";
62 compatible = "picochip,pc3x3-gated-clk";
63 clock-outputs = "bus";
64 picochip,clk-disable-bit = <2>;
65 clock-frequency = <200000000>;
66 ref-clock = <&ref_clk>, "ref";
70 compatible = "picochip,pc3x3-gated-clk";
71 clock-outputs = "bus";
72 picochip,clk-disable-bit = <3>;
73 clock-frequency = <200000000>;
74 ref-clock = <&ref_clk>, "ref";
78 compatible = "picochip,pc3x3-gated-clk";
79 clock-outputs = "bus";
80 picochip,clk-disable-bit = <4>;
81 clock-frequency = <200000000>;
82 ref-clock = <&ref_clk>, "ref";
86 compatible = "picochip,pc3x3-gated-clk";
87 clock-outputs = "bus";
88 picochip,clk-disable-bit = <5>;
89 clock-frequency = <200000000>;
90 ref-clock = <&ref_clk>, "ref";
94 compatible = "picochip,pc3x3-gated-clk";
95 clock-outputs = "bus";
96 picochip,clk-disable-bit = <6>;
97 clock-frequency = <200000000>;
98 ref-clock = <&ref_clk>, "ref";
102 compatible = "picochip,pc3x3-gated-clk";
103 clock-outputs = "bus";
104 picochip,clk-disable-bit = <7>;
105 clock-frequency = <200000000>;
106 ref-clock = <&ref_clk>, "ref";
110 compatible = "picochip,pc3x3-gated-clk";
111 clock-outputs = "bus";
112 picochip,clk-disable-bit = <8>;
113 clock-frequency = <200000000>;
114 ref-clock = <&ref_clk>, "ref";
118 compatible = "picochip,pc3x3-gated-clk";
119 clock-outputs = "bus";
120 picochip,clk-disable-bit = <9>;
121 clock-frequency = <200000000>;
122 ref-clock = <&ref_clk>, "ref";
127 compatible = "picochip,pc3x3-pll";
128 reg = <0x800a0050 0x8>;
129 picochip,min-freq = <140000000>;
130 picochip,max-freq = <700000000>;
131 ref-clock = <&ref_clk>, "ref";
132 clock-outputs = "cpu";
136 compatible = "fixed-clock";
137 clock-outputs = "bus", "pclk";
138 clock-frequency = <200000000>;
139 ref-clock = <&ref_clk>, "ref";
144 compatible = "simple-bus";
145 #address-cells = <1>;
147 ranges = <0 0x80000000 0x400000>;
150 compatible = "cadence,gem";
151 reg = <0x30000 0x10000>;
152 interrupt-parent = <&vic0>;
157 compatible = "snps,dw-dmac";
158 reg = <0x40000 0x10000>;
159 interrupt-parent = <&vic0>;
164 compatible = "snps,dw-dmac";
165 reg = <0x50000 0x10000>;
166 interrupt-parent = <&vic0>;
170 vic0: interrupt-controller@60000 {
171 compatible = "arm,pl192-vic";
172 interrupt-controller;
173 reg = <0x60000 0x1000>;
174 #interrupt-cells = <1>;
177 vic1: interrupt-controller@64000 {
178 compatible = "arm,pl192-vic";
179 interrupt-controller;
180 reg = <0x64000 0x1000>;
181 #interrupt-cells = <1>;
184 fuse: picoxcell-fuse@80000 {
185 compatible = "picoxcell,fuse-pc3x3";
186 reg = <0x80000 0x10000>;
189 ssi: picoxcell-spi@90000 {
190 compatible = "picoxcell,spi";
191 reg = <0x90000 0x10000>;
192 interrupt-parent = <&vic0>;
196 ipsec: spacc@100000 {
197 compatible = "picochip,spacc-ipsec";
198 reg = <0x100000 0x10000>;
199 interrupt-parent = <&vic0>;
201 ref-clock = <&ipsec_clk>, "ref";
205 compatible = "picochip,spacc-srtp";
206 reg = <0x140000 0x10000>;
207 interrupt-parent = <&vic0>;
211 l2_engine: spacc@180000 {
212 compatible = "picochip,spacc-l2";
213 reg = <0x180000 0x10000>;
214 interrupt-parent = <&vic0>;
216 ref-clock = <&l2_clk>, "ref";
220 compatible = "simple-bus";
221 #address-cells = <1>;
223 ranges = <0 0x200000 0x80000>;
226 compatible = "picochip,pc3x2-rtc";
227 clock-freq = <200000000>;
229 interrupt-parent = <&vic0>;
233 timer0: timer@10000 {
234 compatible = "picochip,pc3x2-timer";
235 interrupt-parent = <&vic0>;
237 clock-freq = <200000000>;
238 reg = <0x10000 0x14>;
241 timer1: timer@10014 {
242 compatible = "picochip,pc3x2-timer";
243 interrupt-parent = <&vic0>;
245 clock-freq = <200000000>;
246 reg = <0x10014 0x14>;
250 compatible = "snps,dw-apb-gpio";
251 reg = <0x20000 0x1000>;
252 #address-cells = <1>;
256 banka: gpio-controller@0 {
257 compatible = "snps,dw-apb-gpio-bank";
260 gpio-generic,nr-gpio = <8>;
262 regoffset-dat = <0x50>;
263 regoffset-set = <0x00>;
264 regoffset-dirout = <0x04>;
267 bankb: gpio-controller@1 {
268 compatible = "snps,dw-apb-gpio-bank";
271 gpio-generic,nr-gpio = <16>;
273 regoffset-dat = <0x54>;
274 regoffset-set = <0x0c>;
275 regoffset-dirout = <0x10>;
278 bankd: gpio-controller@2 {
279 compatible = "snps,dw-apb-gpio-bank";
282 gpio-generic,nr-gpio = <30>;
284 regoffset-dat = <0x5c>;
285 regoffset-set = <0x24>;
286 regoffset-dirout = <0x28>;
291 compatible = "snps,dw-apb-uart";
292 reg = <0x30000 0x1000>;
293 interrupt-parent = <&vic1>;
295 clock-frequency = <3686400>;
301 compatible = "snps,dw-apb-uart";
302 reg = <0x40000 0x1000>;
303 interrupt-parent = <&vic1>;
305 clock-frequency = <3686400>;
310 wdog: watchdog@50000 {
311 compatible = "snps,dw-apb-wdg";
312 reg = <0x50000 0x10000>;
313 interrupt-parent = <&vic0>;
315 bus-clock = <&pclk>, "bus";
318 timer2: timer@60000 {
319 compatible = "picochip,pc3x2-timer";
320 interrupt-parent = <&vic0>;
322 clock-freq = <200000000>;
323 reg = <0x60000 0x14>;
326 timer3: timer@60014 {
327 compatible = "picochip,pc3x2-timer";
328 interrupt-parent = <&vic0>;
330 clock-freq = <200000000>;
331 reg = <0x60014 0x14>;
337 #address-cells = <1>;
339 compatible = "simple-bus";
343 compatible = "simple-bus";
344 #address-cells = <2>;
346 ranges = <0 0 0x40000000 0x08000000
347 1 0 0x48000000 0x08000000
348 2 0 0x50000000 0x08000000
349 3 0 0x58000000 0x08000000>;
353 compatible = "picochip,axi2pico-pc3x3";
354 reg = <0xc0000000 0x10000>;
355 interrupt-parent = <&vic0>;
356 interrupts = <13 14 15 16 17 18 19 20 21>;
360 compatible = "picochip,otp-pc3x3";
361 reg = <0xffff8000 0x8000>;