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Merge tag 'xtensa-20190715' of git://github.com/jcmvbkbc/linux-xtensa
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / r8a7744.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the r8a7744 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7744-sysc.h>
12
13 / {
14 compatible = "renesas,r8a7744";
15 #address-cells = <2>;
16 #size-cells = <2>;
17
18 /*
19 * The external audio clocks are configured as 0 Hz fixed frequency
20 * clocks by default.
21 * Boards that provide audio clocks should override them.
22 */
23 audio_clk_a: audio_clk_a {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
27 };
28
29 audio_clk_b: audio_clk_b {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
33 };
34
35 audio_clk_c: audio_clk_c {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
39 };
40
41 /* External CAN clock */
42 can_clk: can {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 /* This value must be overridden by the board. */
46 clock-frequency = <0>;
47 };
48
49 cpus {
50 #address-cells = <1>;
51 #size-cells = <0>;
52 enable-method = "renesas,apmu";
53
54 cpu0: cpu@0 {
55 device_type = "cpu";
56 compatible = "arm,cortex-a15";
57 reg = <0>;
58 clock-frequency = <1500000000>;
59 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
60 clock-latency = <300000>; /* 300 us */
61 power-domains = <&sysc R8A7744_PD_CA15_CPU0>;
62 next-level-cache = <&L2_CA15>;
63
64 /* kHz - uV - OPPs unknown yet */
65 operating-points = <1500000 1000000>,
66 <1312500 1000000>,
67 <1125000 1000000>,
68 < 937500 1000000>,
69 < 750000 1000000>,
70 < 375000 1000000>;
71 };
72
73 cpu1: cpu@1 {
74 device_type = "cpu";
75 compatible = "arm,cortex-a15";
76 reg = <1>;
77 clock-frequency = <1500000000>;
78 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>;
79 clock-latency = <300000>; /* 300 us */
80 power-domains = <&sysc R8A7744_PD_CA15_CPU1>;
81 next-level-cache = <&L2_CA15>;
82
83 /* kHz - uV - OPPs unknown yet */
84 operating-points = <1500000 1000000>,
85 <1312500 1000000>,
86 <1125000 1000000>,
87 < 937500 1000000>,
88 < 750000 1000000>,
89 < 375000 1000000>;
90 };
91
92 L2_CA15: cache-controller-0 {
93 compatible = "cache";
94 cache-unified;
95 cache-level = <2>;
96 power-domains = <&sysc R8A7744_PD_CA15_SCU>;
97 };
98 };
99
100 /* External root clock */
101 extal_clk: extal {
102 compatible = "fixed-clock";
103 #clock-cells = <0>;
104 /* This value must be overridden by the board. */
105 clock-frequency = <0>;
106 };
107
108 /* External PCIe clock - can be overridden by the board */
109 pcie_bus_clk: pcie_bus {
110 compatible = "fixed-clock";
111 #clock-cells = <0>;
112 clock-frequency = <0>;
113 };
114
115 pmu {
116 compatible = "arm,cortex-a15-pmu";
117 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
118 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
119 interrupt-affinity = <&cpu0>, <&cpu1>;
120 };
121
122 /* External SCIF clock */
123 scif_clk: scif {
124 compatible = "fixed-clock";
125 #clock-cells = <0>;
126 /* This value must be overridden by the board. */
127 clock-frequency = <0>;
128 };
129
130 soc {
131 compatible = "simple-bus";
132 interrupt-parent = <&gic>;
133
134 #address-cells = <2>;
135 #size-cells = <2>;
136 ranges;
137
138 rwdt: watchdog@e6020000 {
139 compatible = "renesas,r8a7744-wdt",
140 "renesas,rcar-gen2-wdt";
141 reg = <0 0xe6020000 0 0x0c>;
142 clocks = <&cpg CPG_MOD 402>;
143 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
144 resets = <&cpg 402>;
145 status = "disabled";
146 };
147
148 gpio0: gpio@e6050000 {
149 compatible = "renesas,gpio-r8a7744",
150 "renesas,rcar-gen2-gpio";
151 reg = <0 0xe6050000 0 0x50>;
152 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
153 #gpio-cells = <2>;
154 gpio-controller;
155 gpio-ranges = <&pfc 0 0 32>;
156 #interrupt-cells = <2>;
157 interrupt-controller;
158 clocks = <&cpg CPG_MOD 912>;
159 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
160 resets = <&cpg 912>;
161 };
162
163 gpio1: gpio@e6051000 {
164 compatible = "renesas,gpio-r8a7744",
165 "renesas,rcar-gen2-gpio";
166 reg = <0 0xe6051000 0 0x50>;
167 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
168 #gpio-cells = <2>;
169 gpio-controller;
170 gpio-ranges = <&pfc 0 32 26>;
171 #interrupt-cells = <2>;
172 interrupt-controller;
173 clocks = <&cpg CPG_MOD 911>;
174 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
175 resets = <&cpg 911>;
176 };
177
178 gpio2: gpio@e6052000 {
179 compatible = "renesas,gpio-r8a7744",
180 "renesas,rcar-gen2-gpio";
181 reg = <0 0xe6052000 0 0x50>;
182 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
183 #gpio-cells = <2>;
184 gpio-controller;
185 gpio-ranges = <&pfc 0 64 32>;
186 #interrupt-cells = <2>;
187 interrupt-controller;
188 clocks = <&cpg CPG_MOD 910>;
189 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
190 resets = <&cpg 910>;
191 };
192
193 gpio3: gpio@e6053000 {
194 compatible = "renesas,gpio-r8a7744",
195 "renesas,rcar-gen2-gpio";
196 reg = <0 0xe6053000 0 0x50>;
197 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
198 #gpio-cells = <2>;
199 gpio-controller;
200 gpio-ranges = <&pfc 0 96 32>;
201 #interrupt-cells = <2>;
202 interrupt-controller;
203 clocks = <&cpg CPG_MOD 909>;
204 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
205 resets = <&cpg 909>;
206 };
207
208 gpio4: gpio@e6054000 {
209 compatible = "renesas,gpio-r8a7744",
210 "renesas,rcar-gen2-gpio";
211 reg = <0 0xe6054000 0 0x50>;
212 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
213 #gpio-cells = <2>;
214 gpio-controller;
215 gpio-ranges = <&pfc 0 128 32>;
216 #interrupt-cells = <2>;
217 interrupt-controller;
218 clocks = <&cpg CPG_MOD 908>;
219 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
220 resets = <&cpg 908>;
221 };
222
223 gpio5: gpio@e6055000 {
224 compatible = "renesas,gpio-r8a7744",
225 "renesas,rcar-gen2-gpio";
226 reg = <0 0xe6055000 0 0x50>;
227 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
228 #gpio-cells = <2>;
229 gpio-controller;
230 gpio-ranges = <&pfc 0 160 32>;
231 #interrupt-cells = <2>;
232 interrupt-controller;
233 clocks = <&cpg CPG_MOD 907>;
234 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
235 resets = <&cpg 907>;
236 };
237
238 gpio6: gpio@e6055400 {
239 compatible = "renesas,gpio-r8a7744",
240 "renesas,rcar-gen2-gpio";
241 reg = <0 0xe6055400 0 0x50>;
242 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
243 #gpio-cells = <2>;
244 gpio-controller;
245 gpio-ranges = <&pfc 0 192 32>;
246 #interrupt-cells = <2>;
247 interrupt-controller;
248 clocks = <&cpg CPG_MOD 905>;
249 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
250 resets = <&cpg 905>;
251 };
252
253 gpio7: gpio@e6055800 {
254 compatible = "renesas,gpio-r8a7744",
255 "renesas,rcar-gen2-gpio";
256 reg = <0 0xe6055800 0 0x50>;
257 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
258 #gpio-cells = <2>;
259 gpio-controller;
260 gpio-ranges = <&pfc 0 224 26>;
261 #interrupt-cells = <2>;
262 interrupt-controller;
263 clocks = <&cpg CPG_MOD 904>;
264 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
265 resets = <&cpg 904>;
266 };
267
268 pfc: pin-controller@e6060000 {
269 compatible = "renesas,pfc-r8a7744";
270 reg = <0 0xe6060000 0 0x250>;
271 };
272
273 tpu: pwm@e60f0000 {
274 compatible = "renesas,tpu-r8a7744", "renesas,tpu";
275 reg = <0 0xe60f0000 0 0x148>;
276 clocks = <&cpg CPG_MOD 304>;
277 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
278 resets = <&cpg 304>;
279 #pwm-cells = <3>;
280 status = "disabled";
281 };
282
283 cpg: clock-controller@e6150000 {
284 compatible = "renesas,r8a7744-cpg-mssr";
285 reg = <0 0xe6150000 0 0x1000>;
286 clocks = <&extal_clk>, <&usb_extal_clk>;
287 clock-names = "extal", "usb_extal";
288 #clock-cells = <2>;
289 #power-domain-cells = <0>;
290 #reset-cells = <1>;
291 };
292
293 apmu@e6152000 {
294 compatible = "renesas,r8a7744-apmu", "renesas,apmu";
295 reg = <0 0xe6152000 0 0x188>;
296 cpus = <&cpu0 &cpu1>;
297 };
298
299 rst: reset-controller@e6160000 {
300 compatible = "renesas,r8a7744-rst";
301 reg = <0 0xe6160000 0 0x100>;
302 };
303
304 sysc: system-controller@e6180000 {
305 compatible = "renesas,r8a7744-sysc";
306 reg = <0 0xe6180000 0 0x200>;
307 #power-domain-cells = <1>;
308 };
309
310 irqc: interrupt-controller@e61c0000 {
311 compatible = "renesas,irqc-r8a7744", "renesas,irqc";
312 #interrupt-cells = <2>;
313 interrupt-controller;
314 reg = <0 0xe61c0000 0 0x200>;
315 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
316 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
318 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
319 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
320 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
321 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
322 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
323 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
324 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
325 clocks = <&cpg CPG_MOD 407>;
326 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
327 resets = <&cpg 407>;
328 };
329
330 thermal: thermal@e61f0000 {
331 compatible = "renesas,thermal-r8a7744",
332 "renesas,rcar-gen2-thermal";
333 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
334 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
335 clocks = <&cpg CPG_MOD 522>;
336 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
337 resets = <&cpg 522>;
338 #thermal-sensor-cells = <0>;
339 };
340
341 ipmmu_sy0: mmu@e6280000 {
342 compatible = "renesas,ipmmu-r8a7744",
343 "renesas,ipmmu-vmsa";
344 reg = <0 0xe6280000 0 0x1000>;
345 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
347 #iommu-cells = <1>;
348 status = "disabled";
349 };
350
351 ipmmu_sy1: mmu@e6290000 {
352 compatible = "renesas,ipmmu-r8a7744",
353 "renesas,ipmmu-vmsa";
354 reg = <0 0xe6290000 0 0x1000>;
355 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
356 #iommu-cells = <1>;
357 status = "disabled";
358 };
359
360 ipmmu_ds: mmu@e6740000 {
361 compatible = "renesas,ipmmu-r8a7744",
362 "renesas,ipmmu-vmsa";
363 reg = <0 0xe6740000 0 0x1000>;
364 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
366 #iommu-cells = <1>;
367 status = "disabled";
368 };
369
370 ipmmu_mp: mmu@ec680000 {
371 compatible = "renesas,ipmmu-r8a7744",
372 "renesas,ipmmu-vmsa";
373 reg = <0 0xec680000 0 0x1000>;
374 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
375 #iommu-cells = <1>;
376 status = "disabled";
377 };
378
379 ipmmu_mx: mmu@fe951000 {
380 compatible = "renesas,ipmmu-r8a7744",
381 "renesas,ipmmu-vmsa";
382 reg = <0 0xfe951000 0 0x1000>;
383 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
385 #iommu-cells = <1>;
386 status = "disabled";
387 };
388
389 ipmmu_gp: mmu@e62a0000 {
390 compatible = "renesas,ipmmu-r8a7744",
391 "renesas,ipmmu-vmsa";
392 reg = <0 0xe62a0000 0 0x1000>;
393 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
394 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
395 #iommu-cells = <1>;
396 status = "disabled";
397 };
398
399 icram0: sram@e63a0000 {
400 compatible = "mmio-sram";
401 reg = <0 0xe63a0000 0 0x12000>;
402 };
403
404 icram1: sram@e63c0000 {
405 compatible = "mmio-sram";
406 reg = <0 0xe63c0000 0 0x1000>;
407 #address-cells = <1>;
408 #size-cells = <1>;
409 ranges = <0 0 0xe63c0000 0x1000>;
410
411 smp-sram@0 {
412 compatible = "renesas,smp-sram";
413 reg = <0 0x100>;
414 };
415 };
416
417 icram2: sram@e6300000 {
418 compatible = "mmio-sram";
419 reg = <0 0xe6300000 0 0x40000>;
420 };
421
422 /* The memory map in the User's Manual maps the cores to
423 * bus numbers
424 */
425 i2c0: i2c@e6508000 {
426 #address-cells = <1>;
427 #size-cells = <0>;
428 compatible = "renesas,i2c-r8a7744",
429 "renesas,rcar-gen2-i2c";
430 reg = <0 0xe6508000 0 0x40>;
431 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
432 clocks = <&cpg CPG_MOD 931>;
433 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
434 resets = <&cpg 931>;
435 i2c-scl-internal-delay-ns = <6>;
436 status = "disabled";
437 };
438
439 i2c1: i2c@e6518000 {
440 #address-cells = <1>;
441 #size-cells = <0>;
442 compatible = "renesas,i2c-r8a7744",
443 "renesas,rcar-gen2-i2c";
444 reg = <0 0xe6518000 0 0x40>;
445 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
446 clocks = <&cpg CPG_MOD 930>;
447 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
448 resets = <&cpg 930>;
449 i2c-scl-internal-delay-ns = <6>;
450 status = "disabled";
451 };
452
453 i2c2: i2c@e6530000 {
454 #address-cells = <1>;
455 #size-cells = <0>;
456 compatible = "renesas,i2c-r8a7744",
457 "renesas,rcar-gen2-i2c";
458 reg = <0 0xe6530000 0 0x40>;
459 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
460 clocks = <&cpg CPG_MOD 929>;
461 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
462 resets = <&cpg 929>;
463 i2c-scl-internal-delay-ns = <6>;
464 status = "disabled";
465 };
466
467 i2c3: i2c@e6540000 {
468 #address-cells = <1>;
469 #size-cells = <0>;
470 compatible = "renesas,i2c-r8a7744",
471 "renesas,rcar-gen2-i2c";
472 reg = <0 0xe6540000 0 0x40>;
473 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
474 clocks = <&cpg CPG_MOD 928>;
475 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
476 resets = <&cpg 928>;
477 i2c-scl-internal-delay-ns = <6>;
478 status = "disabled";
479 };
480
481 i2c4: i2c@e6520000 {
482 #address-cells = <1>;
483 #size-cells = <0>;
484 compatible = "renesas,i2c-r8a7744",
485 "renesas,rcar-gen2-i2c";
486 reg = <0 0xe6520000 0 0x40>;
487 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
488 clocks = <&cpg CPG_MOD 927>;
489 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
490 resets = <&cpg 927>;
491 i2c-scl-internal-delay-ns = <6>;
492 status = "disabled";
493 };
494
495 i2c5: i2c@e6528000 {
496 /* doesn't need pinmux */
497 #address-cells = <1>;
498 #size-cells = <0>;
499 compatible = "renesas,i2c-r8a7744",
500 "renesas,rcar-gen2-i2c";
501 reg = <0 0xe6528000 0 0x40>;
502 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
503 clocks = <&cpg CPG_MOD 925>;
504 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
505 resets = <&cpg 925>;
506 i2c-scl-internal-delay-ns = <110>;
507 status = "disabled";
508 };
509
510 iic0: i2c@e6500000 {
511 #address-cells = <1>;
512 #size-cells = <0>;
513 compatible = "renesas,iic-r8a7744",
514 "renesas,rcar-gen2-iic",
515 "renesas,rmobile-iic";
516 reg = <0 0xe6500000 0 0x425>;
517 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
518 clocks = <&cpg CPG_MOD 318>;
519 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
520 <&dmac1 0x61>, <&dmac1 0x62>;
521 dma-names = "tx", "rx", "tx", "rx";
522 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
523 resets = <&cpg 318>;
524 status = "disabled";
525 };
526
527 iic1: i2c@e6510000 {
528 #address-cells = <1>;
529 #size-cells = <0>;
530 compatible = "renesas,iic-r8a7744",
531 "renesas,rcar-gen2-iic",
532 "renesas,rmobile-iic";
533 reg = <0 0xe6510000 0 0x425>;
534 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
535 clocks = <&cpg CPG_MOD 323>;
536 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
537 <&dmac1 0x65>, <&dmac1 0x66>;
538 dma-names = "tx", "rx", "tx", "rx";
539 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
540 resets = <&cpg 323>;
541 status = "disabled";
542 };
543
544 iic3: i2c@e60b0000 {
545 /* doesn't need pinmux */
546 #address-cells = <1>;
547 #size-cells = <0>;
548 compatible = "renesas,iic-r8a7744";
549 reg = <0 0xe60b0000 0 0x425>;
550 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
551 clocks = <&cpg CPG_MOD 926>;
552 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
553 <&dmac1 0x77>, <&dmac1 0x78>;
554 dma-names = "tx", "rx", "tx", "rx";
555 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
556 resets = <&cpg 926>;
557 status = "disabled";
558 };
559
560 hsusb: usb@e6590000 {
561 compatible = "renesas,usbhs-r8a7744",
562 "renesas,rcar-gen2-usbhs";
563 reg = <0 0xe6590000 0 0x100>;
564 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
565 clocks = <&cpg CPG_MOD 704>;
566 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
567 <&usb_dmac1 0>, <&usb_dmac1 1>;
568 dma-names = "ch0", "ch1", "ch2", "ch3";
569 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
570 resets = <&cpg 704>;
571 renesas,buswait = <4>;
572 phys = <&usb0 1>;
573 phy-names = "usb";
574 status = "disabled";
575 };
576
577 usbphy: usb-phy@e6590100 {
578 compatible = "renesas,usb-phy-r8a7744",
579 "renesas,rcar-gen2-usb-phy";
580 reg = <0 0xe6590100 0 0x100>;
581 #address-cells = <1>;
582 #size-cells = <0>;
583 clocks = <&cpg CPG_MOD 704>;
584 clock-names = "usbhs";
585 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
586 resets = <&cpg 704>;
587 status = "disabled";
588
589 usb0: usb-channel@0 {
590 reg = <0>;
591 #phy-cells = <1>;
592 };
593 usb2: usb-channel@2 {
594 reg = <2>;
595 #phy-cells = <1>;
596 };
597 };
598
599 usb_dmac0: dma-controller@e65a0000 {
600 compatible = "renesas,r8a7744-usb-dmac",
601 "renesas,usb-dmac";
602 reg = <0 0xe65a0000 0 0x100>;
603 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
604 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
605 interrupt-names = "ch0", "ch1";
606 clocks = <&cpg CPG_MOD 330>;
607 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
608 resets = <&cpg 330>;
609 #dma-cells = <1>;
610 dma-channels = <2>;
611 };
612
613 usb_dmac1: dma-controller@e65b0000 {
614 compatible = "renesas,r8a7744-usb-dmac",
615 "renesas,usb-dmac";
616 reg = <0 0xe65b0000 0 0x100>;
617 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
618 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
619 interrupt-names = "ch0", "ch1";
620 clocks = <&cpg CPG_MOD 331>;
621 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
622 resets = <&cpg 331>;
623 #dma-cells = <1>;
624 dma-channels = <2>;
625 };
626
627 dmac0: dma-controller@e6700000 {
628 compatible = "renesas,dmac-r8a7744",
629 "renesas,rcar-dmac";
630 reg = <0 0xe6700000 0 0x20000>;
631 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
632 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
633 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
634 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
635 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
636 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
637 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
638 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
639 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
640 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
641 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
642 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
643 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
644 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
645 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
647 interrupt-names = "error",
648 "ch0", "ch1", "ch2", "ch3",
649 "ch4", "ch5", "ch6", "ch7",
650 "ch8", "ch9", "ch10", "ch11",
651 "ch12", "ch13", "ch14";
652 clocks = <&cpg CPG_MOD 219>;
653 clock-names = "fck";
654 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
655 resets = <&cpg 219>;
656 #dma-cells = <1>;
657 dma-channels = <15>;
658 };
659
660 dmac1: dma-controller@e6720000 {
661 compatible = "renesas,dmac-r8a7744",
662 "renesas,rcar-dmac";
663 reg = <0 0xe6720000 0 0x20000>;
664 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
665 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
666 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
667 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
668 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
669 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
670 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
671 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
672 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
673 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
674 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
675 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
676 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
677 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
678 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
679 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
680 interrupt-names = "error",
681 "ch0", "ch1", "ch2", "ch3",
682 "ch4", "ch5", "ch6", "ch7",
683 "ch8", "ch9", "ch10", "ch11",
684 "ch12", "ch13", "ch14";
685 clocks = <&cpg CPG_MOD 218>;
686 clock-names = "fck";
687 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
688 resets = <&cpg 218>;
689 #dma-cells = <1>;
690 dma-channels = <15>;
691 };
692
693 avb: ethernet@e6800000 {
694 compatible = "renesas,etheravb-r8a7744",
695 "renesas,etheravb-rcar-gen2";
696 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
697 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
698 clocks = <&cpg CPG_MOD 812>;
699 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
700 resets = <&cpg 812>;
701 #address-cells = <1>;
702 #size-cells = <0>;
703 status = "disabled";
704 };
705
706 qspi: spi@e6b10000 {
707 compatible = "renesas,qspi-r8a7744", "renesas,qspi";
708 reg = <0 0xe6b10000 0 0x2c>;
709 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
710 clocks = <&cpg CPG_MOD 917>;
711 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
712 <&dmac1 0x17>, <&dmac1 0x18>;
713 dma-names = "tx", "rx", "tx", "rx";
714 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
715 num-cs = <1>;
716 #address-cells = <1>;
717 #size-cells = <0>;
718 resets = <&cpg 917>;
719 status = "disabled";
720 };
721
722 scifa0: serial@e6c40000 {
723 compatible = "renesas,scifa-r8a7744",
724 "renesas,rcar-gen2-scifa", "renesas,scifa";
725 reg = <0 0xe6c40000 0 0x40>;
726 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
727 clocks = <&cpg CPG_MOD 204>;
728 clock-names = "fck";
729 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
730 <&dmac1 0x21>, <&dmac1 0x22>;
731 dma-names = "tx", "rx", "tx", "rx";
732 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
733 resets = <&cpg 204>;
734 status = "disabled";
735 };
736
737 scifa1: serial@e6c50000 {
738 compatible = "renesas,scifa-r8a7744",
739 "renesas,rcar-gen2-scifa", "renesas,scifa";
740 reg = <0 0xe6c50000 0 0x40>;
741 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 203>;
743 clock-names = "fck";
744 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
745 <&dmac1 0x25>, <&dmac1 0x26>;
746 dma-names = "tx", "rx", "tx", "rx";
747 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
748 resets = <&cpg 203>;
749 status = "disabled";
750 };
751
752 scifa2: serial@e6c60000 {
753 compatible = "renesas,scifa-r8a7744",
754 "renesas,rcar-gen2-scifa", "renesas,scifa";
755 reg = <0 0xe6c60000 0 0x40>;
756 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
757 clocks = <&cpg CPG_MOD 202>;
758 clock-names = "fck";
759 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
760 <&dmac1 0x27>, <&dmac1 0x28>;
761 dma-names = "tx", "rx", "tx", "rx";
762 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
763 resets = <&cpg 202>;
764 status = "disabled";
765 };
766
767 scifa3: serial@e6c70000 {
768 compatible = "renesas,scifa-r8a7744",
769 "renesas,rcar-gen2-scifa", "renesas,scifa";
770 reg = <0 0xe6c70000 0 0x40>;
771 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
772 clocks = <&cpg CPG_MOD 1106>;
773 clock-names = "fck";
774 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
775 <&dmac1 0x1b>, <&dmac1 0x1c>;
776 dma-names = "tx", "rx", "tx", "rx";
777 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
778 resets = <&cpg 1106>;
779 status = "disabled";
780 };
781
782 scifa4: serial@e6c78000 {
783 compatible = "renesas,scifa-r8a7744",
784 "renesas,rcar-gen2-scifa", "renesas,scifa";
785 reg = <0 0xe6c78000 0 0x40>;
786 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
787 clocks = <&cpg CPG_MOD 1107>;
788 clock-names = "fck";
789 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
790 <&dmac1 0x1f>, <&dmac1 0x20>;
791 dma-names = "tx", "rx", "tx", "rx";
792 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
793 resets = <&cpg 1107>;
794 status = "disabled";
795 };
796
797 scifa5: serial@e6c80000 {
798 compatible = "renesas,scifa-r8a7744",
799 "renesas,rcar-gen2-scifa", "renesas,scifa";
800 reg = <0 0xe6c80000 0 0x40>;
801 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
802 clocks = <&cpg CPG_MOD 1108>;
803 clock-names = "fck";
804 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
805 <&dmac1 0x23>, <&dmac1 0x24>;
806 dma-names = "tx", "rx", "tx", "rx";
807 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
808 resets = <&cpg 1108>;
809 status = "disabled";
810 };
811
812 scifb0: serial@e6c20000 {
813 compatible = "renesas,scifb-r8a7744",
814 "renesas,rcar-gen2-scifb", "renesas,scifb";
815 reg = <0 0xe6c20000 0 0x100>;
816 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
817 clocks = <&cpg CPG_MOD 206>;
818 clock-names = "fck";
819 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
820 <&dmac1 0x3d>, <&dmac1 0x3e>;
821 dma-names = "tx", "rx", "tx", "rx";
822 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
823 resets = <&cpg 206>;
824 status = "disabled";
825 };
826
827 scifb1: serial@e6c30000 {
828 compatible = "renesas,scifb-r8a7744",
829 "renesas,rcar-gen2-scifb", "renesas,scifb";
830 reg = <0 0xe6c30000 0 0x100>;
831 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
832 clocks = <&cpg CPG_MOD 207>;
833 clock-names = "fck";
834 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
835 <&dmac1 0x19>, <&dmac1 0x1a>;
836 dma-names = "tx", "rx", "tx", "rx";
837 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
838 resets = <&cpg 207>;
839 status = "disabled";
840 };
841
842 scifb2: serial@e6ce0000 {
843 compatible = "renesas,scifb-r8a7744",
844 "renesas,rcar-gen2-scifb", "renesas,scifb";
845 reg = <0 0xe6ce0000 0 0x100>;
846 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
847 clocks = <&cpg CPG_MOD 216>;
848 clock-names = "fck";
849 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
850 <&dmac1 0x1d>, <&dmac1 0x1e>;
851 dma-names = "tx", "rx", "tx", "rx";
852 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
853 resets = <&cpg 216>;
854 status = "disabled";
855 };
856
857 scif0: serial@e6e60000 {
858 compatible = "renesas,scif-r8a7744",
859 "renesas,rcar-gen2-scif", "renesas,scif";
860 reg = <0 0xe6e60000 0 0x40>;
861 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
862 clocks = <&cpg CPG_MOD 721>,
863 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
864 clock-names = "fck", "brg_int", "scif_clk";
865 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
866 <&dmac1 0x29>, <&dmac1 0x2a>;
867 dma-names = "tx", "rx", "tx", "rx";
868 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
869 resets = <&cpg 721>;
870 status = "disabled";
871 };
872
873 scif1: serial@e6e68000 {
874 compatible = "renesas,scif-r8a7744",
875 "renesas,rcar-gen2-scif", "renesas,scif";
876 reg = <0 0xe6e68000 0 0x40>;
877 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
878 clocks = <&cpg CPG_MOD 720>,
879 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
880 clock-names = "fck", "brg_int", "scif_clk";
881 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
882 <&dmac1 0x2d>, <&dmac1 0x2e>;
883 dma-names = "tx", "rx", "tx", "rx";
884 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
885 resets = <&cpg 720>;
886 status = "disabled";
887 };
888
889 scif2: serial@e6e58000 {
890 compatible = "renesas,scif-r8a7744",
891 "renesas,rcar-gen2-scif", "renesas,scif";
892 reg = <0 0xe6e58000 0 0x40>;
893 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&cpg CPG_MOD 719>,
895 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
896 clock-names = "fck", "brg_int", "scif_clk";
897 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
898 <&dmac1 0x2b>, <&dmac1 0x2c>;
899 dma-names = "tx", "rx", "tx", "rx";
900 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
901 resets = <&cpg 719>;
902 status = "disabled";
903 };
904
905 scif3: serial@e6ea8000 {
906 compatible = "renesas,scif-r8a7744",
907 "renesas,rcar-gen2-scif", "renesas,scif";
908 reg = <0 0xe6ea8000 0 0x40>;
909 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
910 clocks = <&cpg CPG_MOD 718>,
911 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
912 clock-names = "fck", "brg_int", "scif_clk";
913 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
914 <&dmac1 0x2f>, <&dmac1 0x30>;
915 dma-names = "tx", "rx", "tx", "rx";
916 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
917 resets = <&cpg 718>;
918 status = "disabled";
919 };
920
921 scif4: serial@e6ee0000 {
922 compatible = "renesas,scif-r8a7744",
923 "renesas,rcar-gen2-scif", "renesas,scif";
924 reg = <0 0xe6ee0000 0 0x40>;
925 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
926 clocks = <&cpg CPG_MOD 715>,
927 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
928 clock-names = "fck", "brg_int", "scif_clk";
929 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
930 <&dmac1 0xfb>, <&dmac1 0xfc>;
931 dma-names = "tx", "rx", "tx", "rx";
932 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
933 resets = <&cpg 715>;
934 status = "disabled";
935 };
936
937 scif5: serial@e6ee8000 {
938 compatible = "renesas,scif-r8a7744",
939 "renesas,rcar-gen2-scif", "renesas,scif";
940 reg = <0 0xe6ee8000 0 0x40>;
941 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
942 clocks = <&cpg CPG_MOD 714>,
943 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
944 clock-names = "fck", "brg_int", "scif_clk";
945 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
946 <&dmac1 0xfd>, <&dmac1 0xfe>;
947 dma-names = "tx", "rx", "tx", "rx";
948 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
949 resets = <&cpg 714>;
950 status = "disabled";
951 };
952
953 hscif0: serial@e62c0000 {
954 compatible = "renesas,hscif-r8a7744",
955 "renesas,rcar-gen2-hscif", "renesas,hscif";
956 reg = <0 0xe62c0000 0 0x60>;
957 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
958 clocks = <&cpg CPG_MOD 717>,
959 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
960 clock-names = "fck", "brg_int", "scif_clk";
961 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
962 <&dmac1 0x39>, <&dmac1 0x3a>;
963 dma-names = "tx", "rx", "tx", "rx";
964 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
965 resets = <&cpg 717>;
966 status = "disabled";
967 };
968
969 hscif1: serial@e62c8000 {
970 compatible = "renesas,hscif-r8a7744",
971 "renesas,rcar-gen2-hscif", "renesas,hscif";
972 reg = <0 0xe62c8000 0 0x60>;
973 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
974 clocks = <&cpg CPG_MOD 716>,
975 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
976 clock-names = "fck", "brg_int", "scif_clk";
977 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
978 <&dmac1 0x4d>, <&dmac1 0x4e>;
979 dma-names = "tx", "rx", "tx", "rx";
980 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
981 resets = <&cpg 716>;
982 status = "disabled";
983 };
984
985 hscif2: serial@e62d0000 {
986 compatible = "renesas,hscif-r8a7744",
987 "renesas,rcar-gen2-hscif", "renesas,hscif";
988 reg = <0 0xe62d0000 0 0x60>;
989 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
990 clocks = <&cpg CPG_MOD 713>,
991 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>;
992 clock-names = "fck", "brg_int", "scif_clk";
993 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
994 <&dmac1 0x3b>, <&dmac1 0x3c>;
995 dma-names = "tx", "rx", "tx", "rx";
996 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
997 resets = <&cpg 713>;
998 status = "disabled";
999 };
1000
1001 msiof0: spi@e6e20000 {
1002 compatible = "renesas,msiof-r8a7744",
1003 "renesas,rcar-gen2-msiof";
1004 reg = <0 0xe6e20000 0 0x0064>;
1005 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1006 clocks = <&cpg CPG_MOD 000>;
1007 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1008 <&dmac1 0x51>, <&dmac1 0x52>;
1009 dma-names = "tx", "rx", "tx", "rx";
1010 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1011 #address-cells = <1>;
1012 #size-cells = <0>;
1013 resets = <&cpg 000>;
1014 status = "disabled";
1015 };
1016
1017 msiof1: spi@e6e10000 {
1018 compatible = "renesas,msiof-r8a7744",
1019 "renesas,rcar-gen2-msiof";
1020 reg = <0 0xe6e10000 0 0x0064>;
1021 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1022 clocks = <&cpg CPG_MOD 208>;
1023 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1024 <&dmac1 0x55>, <&dmac1 0x56>;
1025 dma-names = "tx", "rx", "tx", "rx";
1026 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1027 #address-cells = <1>;
1028 #size-cells = <0>;
1029 resets = <&cpg 208>;
1030 status = "disabled";
1031 };
1032
1033 msiof2: spi@e6e00000 {
1034 compatible = "renesas,msiof-r8a7744",
1035 "renesas,rcar-gen2-msiof";
1036 reg = <0 0xe6e00000 0 0x0064>;
1037 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1038 clocks = <&cpg CPG_MOD 205>;
1039 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1040 <&dmac1 0x41>, <&dmac1 0x42>;
1041 dma-names = "tx", "rx", "tx", "rx";
1042 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1043 #address-cells = <1>;
1044 #size-cells = <0>;
1045 resets = <&cpg 205>;
1046 status = "disabled";
1047 };
1048
1049 pwm0: pwm@e6e30000 {
1050 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1051 reg = <0 0xe6e30000 0 0x8>;
1052 clocks = <&cpg CPG_MOD 523>;
1053 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1054 resets = <&cpg 523>;
1055 #pwm-cells = <2>;
1056 status = "disabled";
1057 };
1058
1059 pwm1: pwm@e6e31000 {
1060 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1061 reg = <0 0xe6e31000 0 0x8>;
1062 clocks = <&cpg CPG_MOD 523>;
1063 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1064 resets = <&cpg 523>;
1065 #pwm-cells = <2>;
1066 status = "disabled";
1067 };
1068
1069 pwm2: pwm@e6e32000 {
1070 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1071 reg = <0 0xe6e32000 0 0x8>;
1072 clocks = <&cpg CPG_MOD 523>;
1073 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1074 resets = <&cpg 523>;
1075 #pwm-cells = <2>;
1076 status = "disabled";
1077 };
1078
1079 pwm3: pwm@e6e33000 {
1080 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1081 reg = <0 0xe6e33000 0 0x8>;
1082 clocks = <&cpg CPG_MOD 523>;
1083 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1084 resets = <&cpg 523>;
1085 #pwm-cells = <2>;
1086 status = "disabled";
1087 };
1088
1089 pwm4: pwm@e6e34000 {
1090 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1091 reg = <0 0xe6e34000 0 0x8>;
1092 clocks = <&cpg CPG_MOD 523>;
1093 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1094 resets = <&cpg 523>;
1095 #pwm-cells = <2>;
1096 status = "disabled";
1097 };
1098
1099 pwm5: pwm@e6e35000 {
1100 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1101 reg = <0 0xe6e35000 0 0x8>;
1102 clocks = <&cpg CPG_MOD 523>;
1103 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1104 resets = <&cpg 523>;
1105 #pwm-cells = <2>;
1106 status = "disabled";
1107 };
1108
1109 pwm6: pwm@e6e36000 {
1110 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar";
1111 reg = <0 0xe6e36000 0 0x8>;
1112 clocks = <&cpg CPG_MOD 523>;
1113 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1114 resets = <&cpg 523>;
1115 #pwm-cells = <2>;
1116 status = "disabled";
1117 };
1118
1119 can0: can@e6e80000 {
1120 compatible = "renesas,can-r8a7744",
1121 "renesas,rcar-gen2-can";
1122 reg = <0 0xe6e80000 0 0x1000>;
1123 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1124 clocks = <&cpg CPG_MOD 916>,
1125 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1126 <&can_clk>;
1127 clock-names = "clkp1", "clkp2", "can_clk";
1128 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1129 resets = <&cpg 916>;
1130 status = "disabled";
1131 };
1132
1133 can1: can@e6e88000 {
1134 compatible = "renesas,can-r8a7744",
1135 "renesas,rcar-gen2-can";
1136 reg = <0 0xe6e88000 0 0x1000>;
1137 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1138 clocks = <&cpg CPG_MOD 915>,
1139 <&cpg CPG_CORE R8A7744_CLK_RCAN>,
1140 <&can_clk>;
1141 clock-names = "clkp1", "clkp2", "can_clk";
1142 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1143 resets = <&cpg 915>;
1144 status = "disabled";
1145 };
1146
1147 vin0: video@e6ef0000 {
1148 compatible = "renesas,vin-r8a7744",
1149 "renesas,rcar-gen2-vin";
1150 reg = <0 0xe6ef0000 0 0x1000>;
1151 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1152 clocks = <&cpg CPG_MOD 811>;
1153 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1154 resets = <&cpg 811>;
1155 status = "disabled";
1156 };
1157
1158 vin1: video@e6ef1000 {
1159 compatible = "renesas,vin-r8a7744",
1160 "renesas,rcar-gen2-vin";
1161 reg = <0 0xe6ef1000 0 0x1000>;
1162 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1163 clocks = <&cpg CPG_MOD 810>;
1164 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1165 resets = <&cpg 810>;
1166 status = "disabled";
1167 };
1168
1169 vin2: video@e6ef2000 {
1170 compatible = "renesas,vin-r8a7744",
1171 "renesas,rcar-gen2-vin";
1172 reg = <0 0xe6ef2000 0 0x1000>;
1173 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1174 clocks = <&cpg CPG_MOD 809>;
1175 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1176 resets = <&cpg 809>;
1177 status = "disabled";
1178 };
1179
1180 rcar_sound: sound@ec500000 {
1181 /*
1182 * #sound-dai-cells is required
1183 *
1184 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1185 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1186 */
1187 compatible = "renesas,rcar_sound-r8a7744",
1188 "renesas,rcar_sound-gen2";
1189 reg = <0 0xec500000 0 0x1000>, /* SCU */
1190 <0 0xec5a0000 0 0x100>, /* ADG */
1191 <0 0xec540000 0 0x1000>, /* SSIU */
1192 <0 0xec541000 0 0x280>, /* SSI */
1193 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1194 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1195
1196 clocks = <&cpg CPG_MOD 1005>,
1197 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1198 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1199 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1200 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1201 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1202 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1203 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1204 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1205 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1206 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1207 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1208 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1209 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1210 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1211 <&cpg CPG_CORE R8A7744_CLK_M2>;
1212 clock-names = "ssi-all",
1213 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1214 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1215 "src.9", "src.8", "src.7", "src.6", "src.5",
1216 "src.4", "src.3", "src.2", "src.1", "src.0",
1217 "ctu.0", "ctu.1",
1218 "mix.0", "mix.1",
1219 "dvc.0", "dvc.1",
1220 "clk_a", "clk_b", "clk_c", "clk_i";
1221 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1222 resets = <&cpg 1005>,
1223 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1224 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1225 <&cpg 1014>, <&cpg 1015>;
1226 reset-names = "ssi-all",
1227 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1228 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1229 status = "disabled";
1230
1231 rcar_sound,dvc {
1232 dvc0: dvc-0 {
1233 dmas = <&audma1 0xbc>;
1234 dma-names = "tx";
1235 };
1236 dvc1: dvc-1 {
1237 dmas = <&audma1 0xbe>;
1238 dma-names = "tx";
1239 };
1240 };
1241
1242 rcar_sound,mix {
1243 mix0: mix-0 { };
1244 mix1: mix-1 { };
1245 };
1246
1247 rcar_sound,ctu {
1248 ctu00: ctu-0 { };
1249 ctu01: ctu-1 { };
1250 ctu02: ctu-2 { };
1251 ctu03: ctu-3 { };
1252 ctu10: ctu-4 { };
1253 ctu11: ctu-5 { };
1254 ctu12: ctu-6 { };
1255 ctu13: ctu-7 { };
1256 };
1257
1258 rcar_sound,src {
1259 src0: src-0 {
1260 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1261 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1262 dma-names = "rx", "tx";
1263 };
1264 src1: src-1 {
1265 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1266 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1267 dma-names = "rx", "tx";
1268 };
1269 src2: src-2 {
1270 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1271 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1272 dma-names = "rx", "tx";
1273 };
1274 src3: src-3 {
1275 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1276 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1277 dma-names = "rx", "tx";
1278 };
1279 src4: src-4 {
1280 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1281 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1282 dma-names = "rx", "tx";
1283 };
1284 src5: src-5 {
1285 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1286 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1287 dma-names = "rx", "tx";
1288 };
1289 src6: src-6 {
1290 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1291 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1292 dma-names = "rx", "tx";
1293 };
1294 src7: src-7 {
1295 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1296 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1297 dma-names = "rx", "tx";
1298 };
1299 src8: src-8 {
1300 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1301 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1302 dma-names = "rx", "tx";
1303 };
1304 src9: src-9 {
1305 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1306 dmas = <&audma0 0x97>, <&audma1 0xba>;
1307 dma-names = "rx", "tx";
1308 };
1309 };
1310
1311 rcar_sound,ssi {
1312 ssi0: ssi-0 {
1313 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1314 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1315 dma-names = "rx", "tx", "rxu", "txu";
1316 };
1317 ssi1: ssi-1 {
1318 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1319 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1320 dma-names = "rx", "tx", "rxu", "txu";
1321 };
1322 ssi2: ssi-2 {
1323 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1324 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1325 dma-names = "rx", "tx", "rxu", "txu";
1326 };
1327 ssi3: ssi-3 {
1328 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1329 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1330 dma-names = "rx", "tx", "rxu", "txu";
1331 };
1332 ssi4: ssi-4 {
1333 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1334 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1335 dma-names = "rx", "tx", "rxu", "txu";
1336 };
1337 ssi5: ssi-5 {
1338 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1339 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1340 dma-names = "rx", "tx", "rxu", "txu";
1341 };
1342 ssi6: ssi-6 {
1343 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1344 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1345 dma-names = "rx", "tx", "rxu", "txu";
1346 };
1347 ssi7: ssi-7 {
1348 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1349 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1350 dma-names = "rx", "tx", "rxu", "txu";
1351 };
1352 ssi8: ssi-8 {
1353 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1354 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1355 dma-names = "rx", "tx", "rxu", "txu";
1356 };
1357 ssi9: ssi-9 {
1358 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1359 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1360 dma-names = "rx", "tx", "rxu", "txu";
1361 };
1362 };
1363 };
1364
1365 audma0: dma-controller@ec700000 {
1366 compatible = "renesas,dmac-r8a7744",
1367 "renesas,rcar-dmac";
1368 reg = <0 0xec700000 0 0x10000>;
1369 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1370 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1371 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1372 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1373 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1374 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1375 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1376 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1377 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1378 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1379 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1380 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1381 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1382 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1383 interrupt-names = "error",
1384 "ch0", "ch1", "ch2", "ch3",
1385 "ch4", "ch5", "ch6", "ch7",
1386 "ch8", "ch9", "ch10", "ch11",
1387 "ch12";
1388 clocks = <&cpg CPG_MOD 502>;
1389 clock-names = "fck";
1390 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1391 resets = <&cpg 502>;
1392 #dma-cells = <1>;
1393 dma-channels = <13>;
1394 };
1395
1396 audma1: dma-controller@ec720000 {
1397 compatible = "renesas,dmac-r8a7744",
1398 "renesas,rcar-dmac";
1399 reg = <0 0xec720000 0 0x10000>;
1400 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1401 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1402 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1403 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1404 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1405 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1406 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1407 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1408 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1409 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1410 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1411 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1412 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1413 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1414 interrupt-names = "error",
1415 "ch0", "ch1", "ch2", "ch3",
1416 "ch4", "ch5", "ch6", "ch7",
1417 "ch8", "ch9", "ch10", "ch11",
1418 "ch12";
1419 clocks = <&cpg CPG_MOD 501>;
1420 clock-names = "fck";
1421 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1422 resets = <&cpg 501>;
1423 #dma-cells = <1>;
1424 dma-channels = <13>;
1425 };
1426
1427 /*
1428 * pci1 and xhci share the same phy, therefore only one of them
1429 * can be active at any one time. If both of them are enabled,
1430 * a race condition will determine who'll control the phy.
1431 * A firmware file is needed by the xhci driver in order for
1432 * USB 3.0 to work properly.
1433 */
1434 xhci: usb@ee000000 {
1435 compatible = "renesas,xhci-r8a7744",
1436 "renesas,rcar-gen2-xhci";
1437 reg = <0 0xee000000 0 0xc00>;
1438 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1439 clocks = <&cpg CPG_MOD 328>;
1440 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1441 resets = <&cpg 328>;
1442 phys = <&usb2 1>;
1443 phy-names = "usb";
1444 status = "disabled";
1445 };
1446
1447 pci0: pci@ee090000 {
1448 compatible = "renesas,pci-r8a7744",
1449 "renesas,pci-rcar-gen2";
1450 device_type = "pci";
1451 reg = <0 0xee090000 0 0xc00>,
1452 <0 0xee080000 0 0x1100>;
1453 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1454 clocks = <&cpg CPG_MOD 703>;
1455 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1456 resets = <&cpg 703>;
1457 status = "disabled";
1458
1459 bus-range = <0 0>;
1460 #address-cells = <3>;
1461 #size-cells = <2>;
1462 #interrupt-cells = <1>;
1463 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1464 interrupt-map-mask = <0xff00 0 0 0x7>;
1465 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1466 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1467 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1468
1469 usb@1,0 {
1470 reg = <0x800 0 0 0 0>;
1471 phys = <&usb0 0>;
1472 phy-names = "usb";
1473 };
1474
1475 usb@2,0 {
1476 reg = <0x1000 0 0 0 0>;
1477 phys = <&usb0 0>;
1478 phy-names = "usb";
1479 };
1480 };
1481
1482 pci1: pci@ee0d0000 {
1483 compatible = "renesas,pci-r8a7744",
1484 "renesas,pci-rcar-gen2";
1485 device_type = "pci";
1486 reg = <0 0xee0d0000 0 0xc00>,
1487 <0 0xee0c0000 0 0x1100>;
1488 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1489 clocks = <&cpg CPG_MOD 703>;
1490 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1491 resets = <&cpg 703>;
1492 status = "disabled";
1493
1494 bus-range = <1 1>;
1495 #address-cells = <3>;
1496 #size-cells = <2>;
1497 #interrupt-cells = <1>;
1498 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1499 interrupt-map-mask = <0xff00 0 0 0x7>;
1500 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1501 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1502 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1503
1504 usb@1,0 {
1505 reg = <0x10800 0 0 0 0>;
1506 phys = <&usb2 0>;
1507 phy-names = "usb";
1508 };
1509
1510 usb@2,0 {
1511 reg = <0x11000 0 0 0 0>;
1512 phys = <&usb2 0>;
1513 phy-names = "usb";
1514 };
1515 };
1516
1517 sdhi0: sd@ee100000 {
1518 compatible = "renesas,sdhi-r8a7744",
1519 "renesas,rcar-gen2-sdhi";
1520 reg = <0 0xee100000 0 0x328>;
1521 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1522 clocks = <&cpg CPG_MOD 314>;
1523 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1524 <&dmac1 0xcd>, <&dmac1 0xce>;
1525 dma-names = "tx", "rx", "tx", "rx";
1526 max-frequency = <195000000>;
1527 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1528 resets = <&cpg 314>;
1529 status = "disabled";
1530 };
1531
1532 sdhi1: sd@ee140000 {
1533 compatible = "renesas,sdhi-r8a7744",
1534 "renesas,rcar-gen2-sdhi";
1535 reg = <0 0xee140000 0 0x100>;
1536 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1537 clocks = <&cpg CPG_MOD 312>;
1538 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1539 <&dmac1 0xc1>, <&dmac1 0xc2>;
1540 dma-names = "tx", "rx", "tx", "rx";
1541 max-frequency = <97500000>;
1542 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1543 resets = <&cpg 312>;
1544 status = "disabled";
1545 };
1546
1547 sdhi2: sd@ee160000 {
1548 compatible = "renesas,sdhi-r8a7744",
1549 "renesas,rcar-gen2-sdhi";
1550 reg = <0 0xee160000 0 0x100>;
1551 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1552 clocks = <&cpg CPG_MOD 311>;
1553 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1554 <&dmac1 0xd3>, <&dmac1 0xd4>;
1555 dma-names = "tx", "rx", "tx", "rx";
1556 max-frequency = <97500000>;
1557 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1558 resets = <&cpg 311>;
1559 status = "disabled";
1560 };
1561
1562 mmcif0: mmc@ee200000 {
1563 compatible = "renesas,mmcif-r8a7744",
1564 "renesas,sh-mmcif";
1565 reg = <0 0xee200000 0 0x80>;
1566 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1567 clocks = <&cpg CPG_MOD 315>;
1568 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1569 <&dmac1 0xd1>, <&dmac1 0xd2>;
1570 dma-names = "tx", "rx", "tx", "rx";
1571 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1572 resets = <&cpg 315>;
1573 reg-io-width = <4>;
1574 max-frequency = <97500000>;
1575 status = "disabled";
1576 };
1577
1578 gic: interrupt-controller@f1001000 {
1579 compatible = "arm,gic-400";
1580 #interrupt-cells = <3>;
1581 #address-cells = <0>;
1582 interrupt-controller;
1583 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1584 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1585 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1586 clocks = <&cpg CPG_MOD 408>;
1587 clock-names = "clk";
1588 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1589 resets = <&cpg 408>;
1590 };
1591
1592 pciec: pcie@fe000000 {
1593 compatible = "renesas,pcie-r8a7744",
1594 "renesas,pcie-rcar-gen2";
1595 reg = <0 0xfe000000 0 0x80000>;
1596 #address-cells = <3>;
1597 #size-cells = <2>;
1598 bus-range = <0x00 0xff>;
1599 device_type = "pci";
1600 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1601 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1602 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1603 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1604 /* Map all possible DDR as inbound ranges */
1605 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1606 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1607 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1608 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1609 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1610 #interrupt-cells = <1>;
1611 interrupt-map-mask = <0 0 0 0>;
1612 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1613 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1614 clock-names = "pcie", "pcie_bus";
1615 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1616 resets = <&cpg 319>;
1617 status = "disabled";
1618 };
1619
1620 vsp@fe928000 {
1621 compatible = "renesas,vsp1";
1622 reg = <0 0xfe928000 0 0x8000>;
1623 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1624 clocks = <&cpg CPG_MOD 131>;
1625 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1626 resets = <&cpg 131>;
1627 };
1628
1629 vsp@fe930000 {
1630 compatible = "renesas,vsp1";
1631 reg = <0 0xfe930000 0 0x8000>;
1632 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1633 clocks = <&cpg CPG_MOD 128>;
1634 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1635 resets = <&cpg 128>;
1636 };
1637
1638 vsp@fe938000 {
1639 compatible = "renesas,vsp1";
1640 reg = <0 0xfe938000 0 0x8000>;
1641 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1642 clocks = <&cpg CPG_MOD 127>;
1643 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1644 resets = <&cpg 127>;
1645 };
1646
1647 du: display@feb00000 {
1648 compatible = "renesas,du-r8a7744";
1649 reg = <0 0xfeb00000 0 0x40000>;
1650 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1651 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1652 clocks = <&cpg CPG_MOD 724>,
1653 <&cpg CPG_MOD 723>;
1654 clock-names = "du.0", "du.1";
1655 status = "disabled";
1656
1657 ports {
1658 #address-cells = <1>;
1659 #size-cells = <0>;
1660
1661 port@0 {
1662 reg = <0>;
1663 du_out_rgb: endpoint {
1664 };
1665 };
1666 port@1 {
1667 reg = <1>;
1668 du_out_lvds0: endpoint {
1669 remote-endpoint = <&lvds0_in>;
1670 };
1671 };
1672 };
1673 };
1674
1675 lvds0: lvds@feb90000 {
1676 compatible = "renesas,r8a7744-lvds";
1677 reg = <0 0xfeb90000 0 0x1c>;
1678 clocks = <&cpg CPG_MOD 726>;
1679 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1680 resets = <&cpg 726>;
1681 status = "disabled";
1682
1683 ports {
1684 #address-cells = <1>;
1685 #size-cells = <0>;
1686
1687 port@0 {
1688 reg = <0>;
1689 lvds0_in: endpoint {
1690 remote-endpoint = <&du_out_lvds0>;
1691 };
1692 };
1693 port@1 {
1694 reg = <1>;
1695 lvds0_out: endpoint {
1696 };
1697 };
1698 };
1699 };
1700
1701 prr: chipid@ff000044 {
1702 compatible = "renesas,prr";
1703 reg = <0 0xff000044 0 4>;
1704 };
1705
1706 cmt0: timer@ffca0000 {
1707 compatible = "renesas,r8a7744-cmt0",
1708 "renesas,rcar-gen2-cmt0";
1709 reg = <0 0xffca0000 0 0x1004>;
1710 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1711 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1712 clocks = <&cpg CPG_MOD 124>;
1713 clock-names = "fck";
1714 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1715 resets = <&cpg 124>;
1716 status = "disabled";
1717 };
1718
1719 cmt1: timer@e6130000 {
1720 compatible = "renesas,r8a7744-cmt1",
1721 "renesas,rcar-gen2-cmt1";
1722 reg = <0 0xe6130000 0 0x1004>;
1723 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1724 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1725 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1726 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1727 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1728 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1729 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1730 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1731 clocks = <&cpg CPG_MOD 329>;
1732 clock-names = "fck";
1733 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>;
1734 resets = <&cpg 329>;
1735 status = "disabled";
1736 };
1737 };
1738
1739 thermal-zones {
1740 cpu_thermal: cpu-thermal {
1741 polling-delay-passive = <0>;
1742 polling-delay = <0>;
1743
1744 thermal-sensors = <&thermal>;
1745
1746 trips {
1747 cpu-crit {
1748 temperature = <95000>;
1749 hysteresis = <0>;
1750 type = "critical";
1751 };
1752 };
1753
1754 cooling-maps {
1755 };
1756 };
1757 };
1758
1759 timer {
1760 compatible = "arm,armv7-timer";
1761 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1762 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1763 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1764 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1765 };
1766
1767 /* External USB clock - can be overridden by the board */
1768 usb_extal_clk: usb_extal {
1769 compatible = "fixed-clock";
1770 #clock-cells = <0>;
1771 clock-frequency = <48000000>;
1772 };
1773 };
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