arch/arm/boot/dts/r8a7745.dtsi

   1 /*
   2  * Device Tree Source for the r8a7745 SoC
   3  *
   4  * Copyright (C) 2016 Cogent Embedded Inc.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2. This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
  14 #include <dt-bindings/power/r8a7745-sysc.h>
  15
  16 / {
  17         compatible = "renesas,r8a7745";
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a7";
  28                         reg = <0>;
  29                         clock-frequency = <1000000000>;
  30                         clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
  31                         power-domains = <&sysc R8A7745_PD_CA7_CPU0>;
  32                         next-level-cache = <&L2_CA7>;
  33                 };
  34
  35                 L2_CA7: cache-controller@0 {
  36                         compatible = "cache";
  37                         reg = <0>;
  38                         cache-unified;
  39                         cache-level = <2>;
  40                         power-domains = <&sysc R8A7745_PD_CA7_SCU>;
  41                 };
  42         };
  43
  44         soc {
  45                 compatible = "simple-bus";
  46                 interrupt-parent = <&gic>;
  47
  48                 #address-cells = <2>;
  49                 #size-cells = <2>;
  50                 ranges;
  51
  52                 gic: interrupt-controller@f1001000 {
  53                         compatible = "arm,gic-400";
  54                         #interrupt-cells = <3>;
  55                         #address-cells = <0>;
  56                         interrupt-controller;
  57                         reg = <0 0xf1001000 0 0x1000>,
  58                               <0 0xf1002000 0 0x2000>,
  59                               <0 0xf1004000 0 0x2000>,
  60                               <0 0xf1006000 0 0x2000>;
  61                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
  62                                                  IRQ_TYPE_LEVEL_HIGH)>;
  63                         clocks = <&cpg CPG_MOD 408>;
  64                         clock-names = "clk";
  65                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
  66                 };
  67
  68                 irqc: interrupt-controller@e61c0000 {
  69                         compatible = "renesas,irqc-r8a7745", "renesas,irqc";
  70                         #interrupt-cells = <2>;
  71                         interrupt-controller;
  72                         reg = <0 0xe61c0000 0 0x200>;
  73                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  74                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  75                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  76                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
  77                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
  78                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
  79                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
  80                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
  81                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
  82                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
  83                         clocks = <&cpg CPG_MOD 407>;
  84                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
  85                 };
  86
  87                 timer {
  88                         compatible = "arm,armv7-timer";
  89                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
  90                                                   IRQ_TYPE_LEVEL_LOW)>,
  91                                      <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
  92                                                   IRQ_TYPE_LEVEL_LOW)>,
  93                                      <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) |
  94                                                   IRQ_TYPE_LEVEL_LOW)>,
  95                                      <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
  96                                                   IRQ_TYPE_LEVEL_LOW)>;
  97                 };
  98
  99                 cpg: clock-controller@e6150000 {
 100                         compatible = "renesas,r8a7745-cpg-mssr";
 101                         reg = <0 0xe6150000 0 0x1000>;
 102                         clocks = <&extal_clk>, <&usb_extal_clk>;
 103                         clock-names = "extal", "usb_extal";
 104                         #clock-cells = <2>;
 105                         #power-domain-cells = <0>;
 106                 };
 107
 108                 prr: chipid@ff000044 {
 109                         compatible = "renesas,prr";
 110                         reg = <0 0xff000044 0 4>;
 111                 };
 112
 113                 rst: reset-controller@e6160000 {
 114                         compatible = "renesas,r8a7745-rst";
 115                         reg = <0 0xe6160000 0 0x100>;
 116                 };
 117
 118                 sysc: system-controller@e6180000 {
 119                         compatible = "renesas,r8a7745-sysc";
 120                         reg = <0 0xe6180000 0 0x200>;
 121                         #power-domain-cells = <1>;
 122                 };
 123
 124                 dmac0: dma-controller@e6700000 {
 125                         compatible = "renesas,dmac-r8a7745",
 126                                      "renesas,rcar-dmac";
 127                         reg = <0 0xe6700000 0 0x20000>;
 128                         interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 129                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 130                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 131                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 132                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 133                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 134                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 135                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 136                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 137                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 138                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 139                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 140                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 141                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 142                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 143                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 144                         interrupt-names = "error",
 145                                         "ch0", "ch1", "ch2", "ch3",
 146                                         "ch4", "ch5", "ch6", "ch7",
 147                                         "ch8", "ch9", "ch10", "ch11",
 148                                         "ch12", "ch13", "ch14";
 149                         clocks = <&cpg CPG_MOD 219>;
 150                         clock-names = "fck";
 151                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 152                         #dma-cells = <1>;
 153                         dma-channels = <15>;
 154                 };
 155
 156                 dmac1: dma-controller@e6720000 {
 157                         compatible = "renesas,dmac-r8a7745",
 158                                      "renesas,rcar-dmac";
 159                         reg = <0 0xe6720000 0 0x20000>;
 160                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 161                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 162                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 163                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 164                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 165                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 166                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 167                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 168                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 169                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 170                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 171                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 172                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 173                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 174                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 175                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 176                         interrupt-names = "error",
 177                                         "ch0", "ch1", "ch2", "ch3",
 178                                         "ch4", "ch5", "ch6", "ch7",
 179                                         "ch8", "ch9", "ch10", "ch11",
 180                                         "ch12", "ch13", "ch14";
 181                         clocks = <&cpg CPG_MOD 218>;
 182                         clock-names = "fck";
 183                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 184                         #dma-cells = <1>;
 185                         dma-channels = <15>;
 186                 };
 187
 188                 scifa0: serial@e6c40000 {
 189                         compatible = "renesas,scifa-r8a7745",
 190                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 191                         reg = <0 0xe6c40000 0 0x40>;
 192                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 193                         clocks = <&cpg CPG_MOD 204>;
 194                         clock-names = "fck";
 195                         dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 196                                <&dmac1 0x21>, <&dmac1 0x22>;
 197                         dma-names = "tx", "rx", "tx", "rx";
 198                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 199                         status = "disabled";
 200                 };
 201
 202                 scifa1: serial@e6c50000 {
 203                         compatible = "renesas,scifa-r8a7745",
 204                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 205                         reg = <0 0xe6c50000 0 0x40>;
 206                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 207                         clocks = <&cpg CPG_MOD 203>;
 208                         clock-names = "fck";
 209                         dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 210                                <&dmac1 0x25>, <&dmac1 0x26>;
 211                         dma-names = "tx", "rx", "tx", "rx";
 212                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 213                         status = "disabled";
 214                 };
 215
 216                 scifa2: serial@e6c60000 {
 217                         compatible = "renesas,scifa-r8a7745",
 218                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 219                         reg = <0 0xe6c60000 0 0x40>;
 220                         interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 221                         clocks = <&cpg CPG_MOD 202>;
 222                         clock-names = "fck";
 223                         dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 224                                <&dmac1 0x27>, <&dmac1 0x28>;
 225                         dma-names = "tx", "rx", "tx", "rx";
 226                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 227                         status = "disabled";
 228                 };
 229
 230                 scifa3: serial@e6c70000 {
 231                         compatible = "renesas,scifa-r8a7745",
 232                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 233                         reg = <0 0xe6c70000 0 0x40>;
 234                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 235                         clocks = <&cpg CPG_MOD 1106>;
 236                         clock-names = "fck";
 237                         dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 238                                <&dmac1 0x1b>, <&dmac1 0x1c>;
 239                         dma-names = "tx", "rx", "tx", "rx";
 240                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 241                         status = "disabled";
 242                 };
 243
 244                 scifa4: serial@e6c78000 {
 245                         compatible = "renesas,scifa-r8a7745",
 246                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 247                         reg = <0 0xe6c78000 0 0x40>;
 248                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 249                         clocks = <&cpg CPG_MOD 1107>;
 250                         clock-names = "fck";
 251                         dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 252                                <&dmac1 0x1f>, <&dmac1 0x20>;
 253                         dma-names = "tx", "rx", "tx", "rx";
 254                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 255                         status = "disabled";
 256                 };
 257
 258                 scifa5: serial@e6c80000 {
 259                         compatible = "renesas,scifa-r8a7745",
 260                                      "renesas,rcar-gen2-scifa", "renesas,scifa";
 261                         reg = <0 0xe6c80000 0 0x40>;
 262                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 263                         clocks = <&cpg CPG_MOD 1108>;
 264                         clock-names = "fck";
 265                         dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 266                                <&dmac1 0x23>, <&dmac1 0x24>;
 267                         dma-names = "tx", "rx", "tx", "rx";
 268                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 269                         status = "disabled";
 270                 };
 271
 272                 scifb0: serial@e6c20000 {
 273                         compatible = "renesas,scifb-r8a7745",
 274                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 275                         reg = <0 0xe6c20000 0 0x100>;
 276                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 277                         clocks = <&cpg CPG_MOD 206>;
 278                         clock-names = "fck";
 279                         dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 280                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 281                         dma-names = "tx", "rx", "tx", "rx";
 282                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 283                         status = "disabled";
 284                 };
 285
 286                 scifb1: serial@e6c30000 {
 287                         compatible = "renesas,scifb-r8a7745",
 288                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 289                         reg = <0 0xe6c30000 0 0x100>;
 290                         interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 291                         clocks = <&cpg CPG_MOD 207>;
 292                         clock-names = "fck";
 293                         dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 294                                <&dmac1 0x19>, <&dmac1 0x1a>;
 295                         dma-names = "tx", "rx", "tx", "rx";
 296                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 297                         status = "disabled";
 298                 };
 299
 300                 scifb2: serial@e6ce0000 {
 301                         compatible = "renesas,scifb-r8a7745",
 302                                      "renesas,rcar-gen2-scifb", "renesas,scifb";
 303                         reg = <0 0xe6ce0000 0 0x100>;
 304                         interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 305                         clocks = <&cpg CPG_MOD 216>;
 306                         clock-names = "fck";
 307                         dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 308                                <&dmac1 0x1d>, <&dmac1 0x1e>;
 309                         dma-names = "tx", "rx", "tx", "rx";
 310                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 311                         status = "disabled";
 312                 };
 313
 314                 scif0: serial@e6e60000 {
 315                         compatible = "renesas,scif-r8a7745",
 316                                      "renesas,rcar-gen2-scif", "renesas,scif";
 317                         reg = <0 0xe6e60000 0 0x40>;
 318                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 319                         clocks = <&cpg CPG_MOD 721>,
 320                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 321                         clock-names = "fck", "brg_int", "scif_clk";
 322                         dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 323                                <&dmac1 0x29>, <&dmac1 0x2a>;
 324                         dma-names = "tx", "rx", "tx", "rx";
 325                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 326                         status = "disabled";
 327                 };
 328
 329                 scif1: serial@e6e68000 {
 330                         compatible = "renesas,scif-r8a7745",
 331                                      "renesas,rcar-gen2-scif", "renesas,scif";
 332                         reg = <0 0xe6e68000 0 0x40>;
 333                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 334                         clocks = <&cpg CPG_MOD 720>,
 335                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 336                         clock-names = "fck", "brg_int", "scif_clk";
 337                         dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 338                                <&dmac1 0x2d>, <&dmac1 0x2e>;
 339                         dma-names = "tx", "rx", "tx", "rx";
 340                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 341                         status = "disabled";
 342                 };
 343
 344                 scif2: serial@e6e58000 {
 345                         compatible = "renesas,scif-r8a7745",
 346                                      "renesas,rcar-gen2-scif", "renesas,scif";
 347                         reg = <0 0xe6e58000 0 0x40>;
 348                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 349                         clocks = <&cpg CPG_MOD 719>,
 350                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 351                         clock-names = "fck", "brg_int", "scif_clk";
 352                         dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 353                                <&dmac1 0x2b>, <&dmac1 0x2c>;
 354                         dma-names = "tx", "rx", "tx", "rx";
 355                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 356                         status = "disabled";
 357                 };
 358
 359                 scif3: serial@e6ea8000 {
 360                         compatible = "renesas,scif-r8a7745",
 361                                      "renesas,rcar-gen2-scif", "renesas,scif";
 362                         reg = <0 0xe6ea8000 0 0x40>;
 363                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 364                         clocks = <&cpg CPG_MOD 718>,
 365                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 366                         clock-names = "fck", "brg_int", "scif_clk";
 367                         dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 368                                <&dmac1 0x2f>, <&dmac1 0x30>;
 369                         dma-names = "tx", "rx", "tx", "rx";
 370                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 371                         status = "disabled";
 372                 };
 373
 374                 scif4: serial@e6ee0000 {
 375                         compatible = "renesas,scif-r8a7745",
 376                                      "renesas,rcar-gen2-scif", "renesas,scif";
 377                         reg = <0 0xe6ee0000 0 0x40>;
 378                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 379                         clocks = <&cpg CPG_MOD 715>,
 380                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 381                         clock-names = "fck", "brg_int", "scif_clk";
 382                         dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 383                                <&dmac1 0xfb>, <&dmac1 0xfc>;
 384                         dma-names = "tx", "rx", "tx", "rx";
 385                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 386                         status = "disabled";
 387                 };
 388
 389                 scif5: serial@e6ee8000 {
 390                         compatible = "renesas,scif-r8a7745",
 391                                      "renesas,rcar-gen2-scif", "renesas,scif";
 392                         reg = <0 0xe6ee8000 0 0x40>;
 393                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 394                         clocks = <&cpg CPG_MOD 714>,
 395                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 396                         clock-names = "fck", "brg_int", "scif_clk";
 397                         dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 398                                <&dmac1 0xfd>, <&dmac1 0xfe>;
 399                         dma-names = "tx", "rx", "tx", "rx";
 400                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 401                         status = "disabled";
 402                 };
 403
 404                 hscif0: serial@e62c0000 {
 405                         compatible = "renesas,hscif-r8a7745",
 406                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 407                         reg = <0 0xe62c0000 0 0x60>;
 408                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 409                         clocks = <&cpg CPG_MOD 717>,
 410                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 411                         clock-names = "fck", "brg_int", "scif_clk";
 412                         dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 413                                <&dmac1 0x39>, <&dmac1 0x3a>;
 414                         dma-names = "tx", "rx", "tx", "rx";
 415                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 416                         status = "disabled";
 417                 };
 418
 419                 hscif1: serial@e62c8000 {
 420                         compatible = "renesas,hscif-r8a7745",
 421                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 422                         reg = <0 0xe62c8000 0 0x60>;
 423                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 424                         clocks = <&cpg CPG_MOD 716>,
 425                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 426                         clock-names = "fck", "brg_int", "scif_clk";
 427                         dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 428                                <&dmac1 0x4d>, <&dmac1 0x4e>;
 429                         dma-names = "tx", "rx", "tx", "rx";
 430                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 431                         status = "disabled";
 432                 };
 433
 434                 hscif2: serial@e62d0000 {
 435                         compatible = "renesas,hscif-r8a7745",
 436                                      "renesas,rcar-gen2-hscif", "renesas,hscif";
 437                         reg = <0 0xe62d0000 0 0x60>;
 438                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 439                         clocks = <&cpg CPG_MOD 713>,
 440                                  <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
 441                         clock-names = "fck", "brg_int", "scif_clk";
 442                         dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 443                                <&dmac1 0x3b>, <&dmac1 0x3c>;
 444                         dma-names = "tx", "rx", "tx", "rx";
 445                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 446                         status = "disabled";
 447                 };
 448
 449                 ether: ethernet@ee700000 {
 450                         compatible = "renesas,ether-r8a7745";
 451                         reg = <0 0xee700000 0 0x400>;
 452                         interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 813>;
 454                         power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
 455                         phy-mode = "rmii";
 456                         #address-cells = <1>;
 457                         #size-cells = <0>;
 458                         status = "disabled";
 459                 };
 460         };
 461
 462         /* External root clock */
 463         extal_clk: extal {
 464                 compatible = "fixed-clock";
 465                 #clock-cells = <0>;
 466                 /* This value must be overridden by the board. */
 467                 clock-frequency = <0>;
 468         };
 469
 470         /* External USB clock - can be overridden by the board */
 471         usb_extal_clk: usb_extal {
 472                 compatible = "fixed-clock";
 473                 #clock-cells = <0>;
 474                 clock-frequency = <48000000>;
 475         };
 476
 477         /* External SCIF clock */
 478         scif_clk: scif {
 479                 compatible = "fixed-clock";
 480                 #clock-cells = <0>;
 481                 /* This value must be overridden by the board. */
 482                 clock-frequency = <0>;
 483         };
 484 };