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Merge tag 'mvebu-fixes-4.17-2' of git://git.infradead.org/linux-mvebu into fixes
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / r8a7790.dtsi
1 /*
2 * Device Tree Source for the r8a7790 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/power/r8a7790-sysc.h>
17
18 / {
19 compatible = "renesas,r8a7790";
20 #address-cells = <2>;
21 #size-cells = <2>;
22
23 aliases {
24 i2c0 = &i2c0;
25 i2c1 = &i2c1;
26 i2c2 = &i2c2;
27 i2c3 = &i2c3;
28 i2c4 = &iic0;
29 i2c5 = &iic1;
30 i2c6 = &iic2;
31 i2c7 = &iic3;
32 spi0 = &qspi;
33 spi1 = &msiof0;
34 spi2 = &msiof1;
35 spi3 = &msiof2;
36 spi4 = &msiof3;
37 vin0 = &vin0;
38 vin1 = &vin1;
39 vin2 = &vin2;
40 vin3 = &vin3;
41 };
42
43 /*
44 * The external audio clocks are configured as 0 Hz fixed frequency
45 * clocks by default.
46 * Boards that provide audio clocks should override them.
47 */
48 audio_clk_a: audio_clk_a {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <0>;
52 };
53 audio_clk_b: audio_clk_b {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58 audio_clk_c: audio_clk_c {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63
64 /* External CAN clock */
65 can_clk: can {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 /* This value must be overridden by the board. */
69 clock-frequency = <0>;
70 };
71
72 cpus {
73 #address-cells = <1>;
74 #size-cells = <0>;
75 enable-method = "renesas,apmu";
76
77 cpu0: cpu@0 {
78 device_type = "cpu";
79 compatible = "arm,cortex-a15";
80 reg = <0>;
81 clock-frequency = <1300000000>;
82 voltage-tolerance = <1>; /* 1% */
83 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
84 clock-latency = <300000>; /* 300 us */
85 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
86 next-level-cache = <&L2_CA15>;
87 capacity-dmips-mhz = <1024>;
88
89 /* kHz - uV - OPPs unknown yet */
90 operating-points = <1400000 1000000>,
91 <1225000 1000000>,
92 <1050000 1000000>,
93 < 875000 1000000>,
94 < 700000 1000000>,
95 < 350000 1000000>;
96 };
97
98 cpu1: cpu@1 {
99 device_type = "cpu";
100 compatible = "arm,cortex-a15";
101 reg = <1>;
102 clock-frequency = <1300000000>;
103 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
104 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
105 next-level-cache = <&L2_CA15>;
106 capacity-dmips-mhz = <1024>;
107 };
108
109 cpu2: cpu@2 {
110 device_type = "cpu";
111 compatible = "arm,cortex-a15";
112 reg = <2>;
113 clock-frequency = <1300000000>;
114 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
115 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
116 next-level-cache = <&L2_CA15>;
117 capacity-dmips-mhz = <1024>;
118 };
119
120 cpu3: cpu@3 {
121 device_type = "cpu";
122 compatible = "arm,cortex-a15";
123 reg = <3>;
124 clock-frequency = <1300000000>;
125 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
126 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
127 next-level-cache = <&L2_CA15>;
128 capacity-dmips-mhz = <1024>;
129 };
130
131 cpu4: cpu@100 {
132 device_type = "cpu";
133 compatible = "arm,cortex-a7";
134 reg = <0x100>;
135 clock-frequency = <780000000>;
136 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
137 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
138 next-level-cache = <&L2_CA7>;
139 capacity-dmips-mhz = <539>;
140 };
141
142 cpu5: cpu@101 {
143 device_type = "cpu";
144 compatible = "arm,cortex-a7";
145 reg = <0x101>;
146 clock-frequency = <780000000>;
147 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
148 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
149 next-level-cache = <&L2_CA7>;
150 capacity-dmips-mhz = <539>;
151 };
152
153 cpu6: cpu@102 {
154 device_type = "cpu";
155 compatible = "arm,cortex-a7";
156 reg = <0x102>;
157 clock-frequency = <780000000>;
158 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
159 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
160 next-level-cache = <&L2_CA7>;
161 capacity-dmips-mhz = <539>;
162 };
163
164 cpu7: cpu@103 {
165 device_type = "cpu";
166 compatible = "arm,cortex-a7";
167 reg = <0x103>;
168 clock-frequency = <780000000>;
169 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
170 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
171 next-level-cache = <&L2_CA7>;
172 capacity-dmips-mhz = <539>;
173 };
174
175 L2_CA15: cache-controller-0 {
176 compatible = "cache";
177 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
178 cache-unified;
179 cache-level = <2>;
180 };
181
182 L2_CA7: cache-controller-1 {
183 compatible = "cache";
184 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
185 cache-unified;
186 cache-level = <2>;
187 };
188 };
189
190 /* External root clock */
191 extal_clk: extal {
192 compatible = "fixed-clock";
193 #clock-cells = <0>;
194 /* This value must be overridden by the board. */
195 clock-frequency = <0>;
196 };
197
198 /* External PCIe clock - can be overridden by the board */
199 pcie_bus_clk: pcie_bus {
200 compatible = "fixed-clock";
201 #clock-cells = <0>;
202 clock-frequency = <0>;
203 };
204
205 pmu-0 {
206 compatible = "arm,cortex-a15-pmu";
207 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
208 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
209 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
210 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
211 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
212 };
213
214 pmu-1 {
215 compatible = "arm,cortex-a7-pmu";
216 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
217 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
218 <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
219 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
220 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
221 };
222
223 /* External SCIF clock */
224 scif_clk: scif {
225 compatible = "fixed-clock";
226 #clock-cells = <0>;
227 /* This value must be overridden by the board. */
228 clock-frequency = <0>;
229 };
230
231 soc {
232 compatible = "simple-bus";
233 interrupt-parent = <&gic>;
234
235 #address-cells = <2>;
236 #size-cells = <2>;
237 ranges;
238
239 rwdt: watchdog@e6020000 {
240 compatible = "renesas,r8a7790-wdt",
241 "renesas,rcar-gen2-wdt";
242 reg = <0 0xe6020000 0 0x0c>;
243 clocks = <&cpg CPG_MOD 402>;
244 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
245 resets = <&cpg 402>;
246 status = "disabled";
247 };
248
249 gpio0: gpio@e6050000 {
250 compatible = "renesas,gpio-r8a7790",
251 "renesas,rcar-gen2-gpio";
252 reg = <0 0xe6050000 0 0x50>;
253 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
254 #gpio-cells = <2>;
255 gpio-controller;
256 gpio-ranges = <&pfc 0 0 32>;
257 #interrupt-cells = <2>;
258 interrupt-controller;
259 clocks = <&cpg CPG_MOD 912>;
260 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
261 resets = <&cpg 912>;
262 };
263
264 gpio1: gpio@e6051000 {
265 compatible = "renesas,gpio-r8a7790",
266 "renesas,rcar-gen2-gpio";
267 reg = <0 0xe6051000 0 0x50>;
268 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
269 #gpio-cells = <2>;
270 gpio-controller;
271 gpio-ranges = <&pfc 0 32 30>;
272 #interrupt-cells = <2>;
273 interrupt-controller;
274 clocks = <&cpg CPG_MOD 911>;
275 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
276 resets = <&cpg 911>;
277 };
278
279 gpio2: gpio@e6052000 {
280 compatible = "renesas,gpio-r8a7790",
281 "renesas,rcar-gen2-gpio";
282 reg = <0 0xe6052000 0 0x50>;
283 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
284 #gpio-cells = <2>;
285 gpio-controller;
286 gpio-ranges = <&pfc 0 64 30>;
287 #interrupt-cells = <2>;
288 interrupt-controller;
289 clocks = <&cpg CPG_MOD 910>;
290 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
291 resets = <&cpg 910>;
292 };
293
294 gpio3: gpio@e6053000 {
295 compatible = "renesas,gpio-r8a7790",
296 "renesas,rcar-gen2-gpio";
297 reg = <0 0xe6053000 0 0x50>;
298 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
299 #gpio-cells = <2>;
300 gpio-controller;
301 gpio-ranges = <&pfc 0 96 32>;
302 #interrupt-cells = <2>;
303 interrupt-controller;
304 clocks = <&cpg CPG_MOD 909>;
305 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
306 resets = <&cpg 909>;
307 };
308
309 gpio4: gpio@e6054000 {
310 compatible = "renesas,gpio-r8a7790",
311 "renesas,rcar-gen2-gpio";
312 reg = <0 0xe6054000 0 0x50>;
313 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
314 #gpio-cells = <2>;
315 gpio-controller;
316 gpio-ranges = <&pfc 0 128 32>;
317 #interrupt-cells = <2>;
318 interrupt-controller;
319 clocks = <&cpg CPG_MOD 908>;
320 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
321 resets = <&cpg 908>;
322 };
323
324 gpio5: gpio@e6055000 {
325 compatible = "renesas,gpio-r8a7790",
326 "renesas,rcar-gen2-gpio";
327 reg = <0 0xe6055000 0 0x50>;
328 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
329 #gpio-cells = <2>;
330 gpio-controller;
331 gpio-ranges = <&pfc 0 160 32>;
332 #interrupt-cells = <2>;
333 interrupt-controller;
334 clocks = <&cpg CPG_MOD 907>;
335 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
336 resets = <&cpg 907>;
337 };
338
339 pfc: pin-controller@e6060000 {
340 compatible = "renesas,pfc-r8a7790";
341 reg = <0 0xe6060000 0 0x250>;
342 };
343
344 cpg: clock-controller@e6150000 {
345 compatible = "renesas,r8a7790-cpg-mssr";
346 reg = <0 0xe6150000 0 0x1000>;
347 clocks = <&extal_clk>, <&usb_extal_clk>;
348 clock-names = "extal", "usb_extal";
349 #clock-cells = <2>;
350 #power-domain-cells = <0>;
351 #reset-cells = <1>;
352 };
353
354 apmu@e6151000 {
355 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
356 reg = <0 0xe6151000 0 0x188>;
357 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
358 };
359
360 apmu@e6152000 {
361 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
362 reg = <0 0xe6152000 0 0x188>;
363 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
364 };
365
366 rst: reset-controller@e6160000 {
367 compatible = "renesas,r8a7790-rst";
368 reg = <0 0xe6160000 0 0x0100>;
369 };
370
371 sysc: system-controller@e6180000 {
372 compatible = "renesas,r8a7790-sysc";
373 reg = <0 0xe6180000 0 0x0200>;
374 #power-domain-cells = <1>;
375 };
376
377 irqc0: interrupt-controller@e61c0000 {
378 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
379 #interrupt-cells = <2>;
380 interrupt-controller;
381 reg = <0 0xe61c0000 0 0x200>;
382 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
383 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
386 clocks = <&cpg CPG_MOD 407>;
387 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
388 resets = <&cpg 407>;
389 };
390
391 thermal: thermal@e61f0000 {
392 compatible = "renesas,thermal-r8a7790",
393 "renesas,rcar-gen2-thermal",
394 "renesas,rcar-thermal";
395 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
396 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
397 clocks = <&cpg CPG_MOD 522>;
398 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
399 resets = <&cpg 522>;
400 #thermal-sensor-cells = <0>;
401 };
402
403 ipmmu_sy0: mmu@e6280000 {
404 compatible = "renesas,ipmmu-r8a7790",
405 "renesas,ipmmu-vmsa";
406 reg = <0 0xe6280000 0 0x1000>;
407 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
408 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
409 #iommu-cells = <1>;
410 status = "disabled";
411 };
412
413 ipmmu_sy1: mmu@e6290000 {
414 compatible = "renesas,ipmmu-r8a7790",
415 "renesas,ipmmu-vmsa";
416 reg = <0 0xe6290000 0 0x1000>;
417 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
418 #iommu-cells = <1>;
419 status = "disabled";
420 };
421
422 ipmmu_ds: mmu@e6740000 {
423 compatible = "renesas,ipmmu-r8a7790",
424 "renesas,ipmmu-vmsa";
425 reg = <0 0xe6740000 0 0x1000>;
426 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
427 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
428 #iommu-cells = <1>;
429 status = "disabled";
430 };
431
432 ipmmu_mp: mmu@ec680000 {
433 compatible = "renesas,ipmmu-r8a7790",
434 "renesas,ipmmu-vmsa";
435 reg = <0 0xec680000 0 0x1000>;
436 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
437 #iommu-cells = <1>;
438 status = "disabled";
439 };
440
441 ipmmu_mx: mmu@fe951000 {
442 compatible = "renesas,ipmmu-r8a7790",
443 "renesas,ipmmu-vmsa";
444 reg = <0 0xfe951000 0 0x1000>;
445 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
446 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
447 #iommu-cells = <1>;
448 status = "disabled";
449 };
450
451 ipmmu_rt: mmu@ffc80000 {
452 compatible = "renesas,ipmmu-r8a7790",
453 "renesas,ipmmu-vmsa";
454 reg = <0 0xffc80000 0 0x1000>;
455 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
456 #iommu-cells = <1>;
457 status = "disabled";
458 };
459
460 icram0: sram@e63a0000 {
461 compatible = "mmio-sram";
462 reg = <0 0xe63a0000 0 0x12000>;
463 };
464
465 icram1: sram@e63c0000 {
466 compatible = "mmio-sram";
467 reg = <0 0xe63c0000 0 0x1000>;
468 #address-cells = <1>;
469 #size-cells = <1>;
470 ranges = <0 0 0xe63c0000 0x1000>;
471
472 smp-sram@0 {
473 compatible = "renesas,smp-sram";
474 reg = <0 0x100>;
475 };
476 };
477
478 i2c0: i2c@e6508000 {
479 #address-cells = <1>;
480 #size-cells = <0>;
481 compatible = "renesas,i2c-r8a7790",
482 "renesas,rcar-gen2-i2c";
483 reg = <0 0xe6508000 0 0x40>;
484 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
485 clocks = <&cpg CPG_MOD 931>;
486 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
487 resets = <&cpg 931>;
488 i2c-scl-internal-delay-ns = <110>;
489 status = "disabled";
490 };
491
492 i2c1: i2c@e6518000 {
493 #address-cells = <1>;
494 #size-cells = <0>;
495 compatible = "renesas,i2c-r8a7790",
496 "renesas,rcar-gen2-i2c";
497 reg = <0 0xe6518000 0 0x40>;
498 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&cpg CPG_MOD 930>;
500 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
501 resets = <&cpg 930>;
502 i2c-scl-internal-delay-ns = <6>;
503 status = "disabled";
504 };
505
506 i2c2: i2c@e6530000 {
507 #address-cells = <1>;
508 #size-cells = <0>;
509 compatible = "renesas,i2c-r8a7790",
510 "renesas,rcar-gen2-i2c";
511 reg = <0 0xe6530000 0 0x40>;
512 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
513 clocks = <&cpg CPG_MOD 929>;
514 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
515 resets = <&cpg 929>;
516 i2c-scl-internal-delay-ns = <6>;
517 status = "disabled";
518 };
519
520 i2c3: i2c@e6540000 {
521 #address-cells = <1>;
522 #size-cells = <0>;
523 compatible = "renesas,i2c-r8a7790",
524 "renesas,rcar-gen2-i2c";
525 reg = <0 0xe6540000 0 0x40>;
526 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
527 clocks = <&cpg CPG_MOD 928>;
528 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
529 resets = <&cpg 928>;
530 i2c-scl-internal-delay-ns = <110>;
531 status = "disabled";
532 };
533
534 iic0: i2c@e6500000 {
535 #address-cells = <1>;
536 #size-cells = <0>;
537 compatible = "renesas,iic-r8a7790",
538 "renesas,rcar-gen2-iic",
539 "renesas,rmobile-iic";
540 reg = <0 0xe6500000 0 0x425>;
541 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
542 clocks = <&cpg CPG_MOD 318>;
543 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
544 <&dmac1 0x61>, <&dmac1 0x62>;
545 dma-names = "tx", "rx", "tx", "rx";
546 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
547 resets = <&cpg 318>;
548 status = "disabled";
549 };
550
551 iic1: i2c@e6510000 {
552 #address-cells = <1>;
553 #size-cells = <0>;
554 compatible = "renesas,iic-r8a7790",
555 "renesas,rcar-gen2-iic",
556 "renesas,rmobile-iic";
557 reg = <0 0xe6510000 0 0x425>;
558 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&cpg CPG_MOD 323>;
560 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
561 <&dmac1 0x65>, <&dmac1 0x66>;
562 dma-names = "tx", "rx", "tx", "rx";
563 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
564 resets = <&cpg 323>;
565 status = "disabled";
566 };
567
568 iic2: i2c@e6520000 {
569 #address-cells = <1>;
570 #size-cells = <0>;
571 compatible = "renesas,iic-r8a7790",
572 "renesas,rcar-gen2-iic",
573 "renesas,rmobile-iic";
574 reg = <0 0xe6520000 0 0x425>;
575 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
576 clocks = <&cpg CPG_MOD 300>;
577 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
578 <&dmac1 0x69>, <&dmac1 0x6a>;
579 dma-names = "tx", "rx", "tx", "rx";
580 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
581 resets = <&cpg 300>;
582 status = "disabled";
583 };
584
585 iic3: i2c@e60b0000 {
586 #address-cells = <1>;
587 #size-cells = <0>;
588 compatible = "renesas,iic-r8a7790",
589 "renesas,rcar-gen2-iic",
590 "renesas,rmobile-iic";
591 reg = <0 0xe60b0000 0 0x425>;
592 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
593 clocks = <&cpg CPG_MOD 926>;
594 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
595 <&dmac1 0x77>, <&dmac1 0x78>;
596 dma-names = "tx", "rx", "tx", "rx";
597 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
598 resets = <&cpg 926>;
599 status = "disabled";
600 };
601
602 hsusb: usb@e6590000 {
603 compatible = "renesas,usbhs-r8a7790",
604 "renesas,rcar-gen2-usbhs";
605 reg = <0 0xe6590000 0 0x100>;
606 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
607 clocks = <&cpg CPG_MOD 704>;
608 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
609 <&usb_dmac1 0>, <&usb_dmac1 1>;
610 dma-names = "ch0", "ch1", "ch2", "ch3";
611 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
612 resets = <&cpg 704>;
613 renesas,buswait = <4>;
614 phys = <&usb0 1>;
615 phy-names = "usb";
616 status = "disabled";
617 };
618
619 usbphy: usb-phy@e6590100 {
620 compatible = "renesas,usb-phy-r8a7790",
621 "renesas,rcar-gen2-usb-phy";
622 reg = <0 0xe6590100 0 0x100>;
623 #address-cells = <1>;
624 #size-cells = <0>;
625 clocks = <&cpg CPG_MOD 704>;
626 clock-names = "usbhs";
627 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
628 resets = <&cpg 704>;
629 status = "disabled";
630
631 usb0: usb-channel@0 {
632 reg = <0>;
633 #phy-cells = <1>;
634 };
635 usb2: usb-channel@2 {
636 reg = <2>;
637 #phy-cells = <1>;
638 };
639 };
640
641 usb_dmac0: dma-controller@e65a0000 {
642 compatible = "renesas,r8a7790-usb-dmac",
643 "renesas,usb-dmac";
644 reg = <0 0xe65a0000 0 0x100>;
645 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
646 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
647 interrupt-names = "ch0", "ch1";
648 clocks = <&cpg CPG_MOD 330>;
649 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
650 resets = <&cpg 330>;
651 #dma-cells = <1>;
652 dma-channels = <2>;
653 };
654
655 usb_dmac1: dma-controller@e65b0000 {
656 compatible = "renesas,r8a7790-usb-dmac",
657 "renesas,usb-dmac";
658 reg = <0 0xe65b0000 0 0x100>;
659 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
660 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
661 interrupt-names = "ch0", "ch1";
662 clocks = <&cpg CPG_MOD 331>;
663 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
664 resets = <&cpg 331>;
665 #dma-cells = <1>;
666 dma-channels = <2>;
667 };
668
669 dmac0: dma-controller@e6700000 {
670 compatible = "renesas,dmac-r8a7790",
671 "renesas,rcar-dmac";
672 reg = <0 0xe6700000 0 0x20000>;
673 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
674 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
675 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
676 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
677 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
678 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
679 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
680 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
681 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
682 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
683 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
684 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
685 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
686 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
687 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
688 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
689 interrupt-names = "error",
690 "ch0", "ch1", "ch2", "ch3",
691 "ch4", "ch5", "ch6", "ch7",
692 "ch8", "ch9", "ch10", "ch11",
693 "ch12", "ch13", "ch14";
694 clocks = <&cpg CPG_MOD 219>;
695 clock-names = "fck";
696 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
697 resets = <&cpg 219>;
698 #dma-cells = <1>;
699 dma-channels = <15>;
700 };
701
702 dmac1: dma-controller@e6720000 {
703 compatible = "renesas,dmac-r8a7790",
704 "renesas,rcar-dmac";
705 reg = <0 0xe6720000 0 0x20000>;
706 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
707 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
708 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
709 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
710 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
711 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
712 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
713 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
714 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
715 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
716 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
717 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
718 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
719 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
720 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
721 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
722 interrupt-names = "error",
723 "ch0", "ch1", "ch2", "ch3",
724 "ch4", "ch5", "ch6", "ch7",
725 "ch8", "ch9", "ch10", "ch11",
726 "ch12", "ch13", "ch14";
727 clocks = <&cpg CPG_MOD 218>;
728 clock-names = "fck";
729 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
730 resets = <&cpg 218>;
731 #dma-cells = <1>;
732 dma-channels = <15>;
733 };
734
735 avb: ethernet@e6800000 {
736 compatible = "renesas,etheravb-r8a7790",
737 "renesas,etheravb-rcar-gen2";
738 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
739 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
740 clocks = <&cpg CPG_MOD 812>;
741 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
742 resets = <&cpg 812>;
743 #address-cells = <1>;
744 #size-cells = <0>;
745 status = "disabled";
746 };
747
748 qspi: spi@e6b10000 {
749 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
750 reg = <0 0xe6b10000 0 0x2c>;
751 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
752 clocks = <&cpg CPG_MOD 917>;
753 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
754 <&dmac1 0x17>, <&dmac1 0x18>;
755 dma-names = "tx", "rx", "tx", "rx";
756 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
757 resets = <&cpg 917>;
758 num-cs = <1>;
759 #address-cells = <1>;
760 #size-cells = <0>;
761 status = "disabled";
762 };
763
764 scifa0: serial@e6c40000 {
765 compatible = "renesas,scifa-r8a7790",
766 "renesas,rcar-gen2-scifa", "renesas,scifa";
767 reg = <0 0xe6c40000 0 64>;
768 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
769 clocks = <&cpg CPG_MOD 204>;
770 clock-names = "fck";
771 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
772 <&dmac1 0x21>, <&dmac1 0x22>;
773 dma-names = "tx", "rx", "tx", "rx";
774 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
775 resets = <&cpg 204>;
776 status = "disabled";
777 };
778
779 scifa1: serial@e6c50000 {
780 compatible = "renesas,scifa-r8a7790",
781 "renesas,rcar-gen2-scifa", "renesas,scifa";
782 reg = <0 0xe6c50000 0 64>;
783 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
784 clocks = <&cpg CPG_MOD 203>;
785 clock-names = "fck";
786 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
787 <&dmac1 0x25>, <&dmac1 0x26>;
788 dma-names = "tx", "rx", "tx", "rx";
789 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
790 resets = <&cpg 203>;
791 status = "disabled";
792 };
793
794 scifa2: serial@e6c60000 {
795 compatible = "renesas,scifa-r8a7790",
796 "renesas,rcar-gen2-scifa", "renesas,scifa";
797 reg = <0 0xe6c60000 0 64>;
798 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
799 clocks = <&cpg CPG_MOD 202>;
800 clock-names = "fck";
801 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
802 <&dmac1 0x27>, <&dmac1 0x28>;
803 dma-names = "tx", "rx", "tx", "rx";
804 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
805 resets = <&cpg 202>;
806 status = "disabled";
807 };
808
809 scifb0: serial@e6c20000 {
810 compatible = "renesas,scifb-r8a7790",
811 "renesas,rcar-gen2-scifb", "renesas,scifb";
812 reg = <0 0xe6c20000 0 0x100>;
813 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
814 clocks = <&cpg CPG_MOD 206>;
815 clock-names = "fck";
816 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
817 <&dmac1 0x3d>, <&dmac1 0x3e>;
818 dma-names = "tx", "rx", "tx", "rx";
819 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
820 resets = <&cpg 206>;
821 status = "disabled";
822 };
823
824 scifb1: serial@e6c30000 {
825 compatible = "renesas,scifb-r8a7790",
826 "renesas,rcar-gen2-scifb", "renesas,scifb";
827 reg = <0 0xe6c30000 0 0x100>;
828 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 207>;
830 clock-names = "fck";
831 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
832 <&dmac1 0x19>, <&dmac1 0x1a>;
833 dma-names = "tx", "rx", "tx", "rx";
834 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
835 resets = <&cpg 207>;
836 status = "disabled";
837 };
838
839 scifb2: serial@e6ce0000 {
840 compatible = "renesas,scifb-r8a7790",
841 "renesas,rcar-gen2-scifb", "renesas,scifb";
842 reg = <0 0xe6ce0000 0 0x100>;
843 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
844 clocks = <&cpg CPG_MOD 216>;
845 clock-names = "fck";
846 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
847 <&dmac1 0x1d>, <&dmac1 0x1e>;
848 dma-names = "tx", "rx", "tx", "rx";
849 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
850 resets = <&cpg 216>;
851 status = "disabled";
852 };
853
854 scif0: serial@e6e60000 {
855 compatible = "renesas,scif-r8a7790",
856 "renesas,rcar-gen2-scif",
857 "renesas,scif";
858 reg = <0 0xe6e60000 0 64>;
859 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
860 clocks = <&cpg CPG_MOD 721>,
861 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
862 clock-names = "fck", "brg_int", "scif_clk";
863 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
864 <&dmac1 0x29>, <&dmac1 0x2a>;
865 dma-names = "tx", "rx", "tx", "rx";
866 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
867 resets = <&cpg 721>;
868 status = "disabled";
869 };
870
871 scif1: serial@e6e68000 {
872 compatible = "renesas,scif-r8a7790",
873 "renesas,rcar-gen2-scif",
874 "renesas,scif";
875 reg = <0 0xe6e68000 0 64>;
876 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&cpg CPG_MOD 720>,
878 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
879 clock-names = "fck", "brg_int", "scif_clk";
880 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
881 <&dmac1 0x2d>, <&dmac1 0x2e>;
882 dma-names = "tx", "rx", "tx", "rx";
883 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
884 resets = <&cpg 720>;
885 status = "disabled";
886 };
887
888 scif2: serial@e6e56000 {
889 compatible = "renesas,scif-r8a7790",
890 "renesas,rcar-gen2-scif",
891 "renesas,scif";
892 reg = <0 0xe6e56000 0 64>;
893 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&cpg CPG_MOD 310>,
895 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
896 clock-names = "fck", "brg_int", "scif_clk";
897 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
898 <&dmac1 0x2b>, <&dmac1 0x2c>;
899 dma-names = "tx", "rx", "tx", "rx";
900 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
901 resets = <&cpg 310>;
902 status = "disabled";
903 };
904
905 hscif0: serial@e62c0000 {
906 compatible = "renesas,hscif-r8a7790",
907 "renesas,rcar-gen2-hscif", "renesas,hscif";
908 reg = <0 0xe62c0000 0 96>;
909 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
910 clocks = <&cpg CPG_MOD 717>,
911 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
912 clock-names = "fck", "brg_int", "scif_clk";
913 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
914 <&dmac1 0x39>, <&dmac1 0x3a>;
915 dma-names = "tx", "rx", "tx", "rx";
916 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
917 resets = <&cpg 717>;
918 status = "disabled";
919 };
920
921 hscif1: serial@e62c8000 {
922 compatible = "renesas,hscif-r8a7790",
923 "renesas,rcar-gen2-hscif", "renesas,hscif";
924 reg = <0 0xe62c8000 0 96>;
925 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
926 clocks = <&cpg CPG_MOD 716>,
927 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
928 clock-names = "fck", "brg_int", "scif_clk";
929 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
930 <&dmac1 0x4d>, <&dmac1 0x4e>;
931 dma-names = "tx", "rx", "tx", "rx";
932 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
933 resets = <&cpg 716>;
934 status = "disabled";
935 };
936
937 msiof0: spi@e6e20000 {
938 compatible = "renesas,msiof-r8a7790",
939 "renesas,rcar-gen2-msiof";
940 reg = <0 0xe6e20000 0 0x0064>;
941 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
942 clocks = <&cpg CPG_MOD 0>;
943 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
944 <&dmac1 0x51>, <&dmac1 0x52>;
945 dma-names = "tx", "rx", "tx", "rx";
946 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
947 resets = <&cpg 0>;
948 #address-cells = <1>;
949 #size-cells = <0>;
950 status = "disabled";
951 };
952
953 msiof1: spi@e6e10000 {
954 compatible = "renesas,msiof-r8a7790",
955 "renesas,rcar-gen2-msiof";
956 reg = <0 0xe6e10000 0 0x0064>;
957 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
958 clocks = <&cpg CPG_MOD 208>;
959 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
960 <&dmac1 0x55>, <&dmac1 0x56>;
961 dma-names = "tx", "rx", "tx", "rx";
962 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
963 resets = <&cpg 208>;
964 #address-cells = <1>;
965 #size-cells = <0>;
966 status = "disabled";
967 };
968
969 msiof2: spi@e6e00000 {
970 compatible = "renesas,msiof-r8a7790",
971 "renesas,rcar-gen2-msiof";
972 reg = <0 0xe6e00000 0 0x0064>;
973 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
974 clocks = <&cpg CPG_MOD 205>;
975 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
976 <&dmac1 0x41>, <&dmac1 0x42>;
977 dma-names = "tx", "rx", "tx", "rx";
978 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
979 resets = <&cpg 205>;
980 #address-cells = <1>;
981 #size-cells = <0>;
982 status = "disabled";
983 };
984
985 msiof3: spi@e6c90000 {
986 compatible = "renesas,msiof-r8a7790",
987 "renesas,rcar-gen2-msiof";
988 reg = <0 0xe6c90000 0 0x0064>;
989 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
990 clocks = <&cpg CPG_MOD 215>;
991 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
992 <&dmac1 0x45>, <&dmac1 0x46>;
993 dma-names = "tx", "rx", "tx", "rx";
994 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
995 resets = <&cpg 215>;
996 #address-cells = <1>;
997 #size-cells = <0>;
998 status = "disabled";
999 };
1000
1001 can0: can@e6e80000 {
1002 compatible = "renesas,can-r8a7790",
1003 "renesas,rcar-gen2-can";
1004 reg = <0 0xe6e80000 0 0x1000>;
1005 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1006 clocks = <&cpg CPG_MOD 916>,
1007 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1008 clock-names = "clkp1", "clkp2", "can_clk";
1009 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1010 resets = <&cpg 916>;
1011 status = "disabled";
1012 };
1013
1014 can1: can@e6e88000 {
1015 compatible = "renesas,can-r8a7790",
1016 "renesas,rcar-gen2-can";
1017 reg = <0 0xe6e88000 0 0x1000>;
1018 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1019 clocks = <&cpg CPG_MOD 915>,
1020 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1021 clock-names = "clkp1", "clkp2", "can_clk";
1022 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1023 resets = <&cpg 915>;
1024 status = "disabled";
1025 };
1026
1027 vin0: video@e6ef0000 {
1028 compatible = "renesas,vin-r8a7790",
1029 "renesas,rcar-gen2-vin";
1030 reg = <0 0xe6ef0000 0 0x1000>;
1031 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1032 clocks = <&cpg CPG_MOD 811>;
1033 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1034 resets = <&cpg 811>;
1035 status = "disabled";
1036 };
1037
1038 vin1: video@e6ef1000 {
1039 compatible = "renesas,vin-r8a7790",
1040 "renesas,rcar-gen2-vin";
1041 reg = <0 0xe6ef1000 0 0x1000>;
1042 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1043 clocks = <&cpg CPG_MOD 810>;
1044 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1045 resets = <&cpg 810>;
1046 status = "disabled";
1047 };
1048
1049 vin2: video@e6ef2000 {
1050 compatible = "renesas,vin-r8a7790",
1051 "renesas,rcar-gen2-vin";
1052 reg = <0 0xe6ef2000 0 0x1000>;
1053 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1054 clocks = <&cpg CPG_MOD 809>;
1055 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1056 resets = <&cpg 809>;
1057 status = "disabled";
1058 };
1059
1060 vin3: video@e6ef3000 {
1061 compatible = "renesas,vin-r8a7790",
1062 "renesas,rcar-gen2-vin";
1063 reg = <0 0xe6ef3000 0 0x1000>;
1064 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1065 clocks = <&cpg CPG_MOD 808>;
1066 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1067 resets = <&cpg 808>;
1068 status = "disabled";
1069 };
1070
1071 rcar_sound: sound@ec500000 {
1072 /*
1073 * #sound-dai-cells is required
1074 *
1075 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1076 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1077 */
1078 compatible = "renesas,rcar_sound-r8a7790",
1079 "renesas,rcar_sound-gen2";
1080 reg = <0 0xec500000 0 0x1000>, /* SCU */
1081 <0 0xec5a0000 0 0x100>, /* ADG */
1082 <0 0xec540000 0 0x1000>, /* SSIU */
1083 <0 0xec541000 0 0x280>, /* SSI */
1084 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1085 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1086
1087 clocks = <&cpg CPG_MOD 1005>,
1088 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1089 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1090 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1091 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1092 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1093 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1094 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1095 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1096 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1097 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1098 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1099 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1100 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1101 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1102 <&cpg CPG_CORE R8A7790_CLK_M2>;
1103 clock-names = "ssi-all",
1104 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1105 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1106 "ssi.1", "ssi.0",
1107 "src.9", "src.8", "src.7", "src.6",
1108 "src.5", "src.4", "src.3", "src.2",
1109 "src.1", "src.0",
1110 "ctu.0", "ctu.1",
1111 "mix.0", "mix.1",
1112 "dvc.0", "dvc.1",
1113 "clk_a", "clk_b", "clk_c", "clk_i";
1114 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1115 resets = <&cpg 1005>,
1116 <&cpg 1006>, <&cpg 1007>,
1117 <&cpg 1008>, <&cpg 1009>,
1118 <&cpg 1010>, <&cpg 1011>,
1119 <&cpg 1012>, <&cpg 1013>,
1120 <&cpg 1014>, <&cpg 1015>;
1121 reset-names = "ssi-all",
1122 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1123 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1124 "ssi.1", "ssi.0";
1125
1126 status = "disabled";
1127
1128 rcar_sound,dvc {
1129 dvc0: dvc-0 {
1130 dmas = <&audma1 0xbc>;
1131 dma-names = "tx";
1132 };
1133 dvc1: dvc-1 {
1134 dmas = <&audma1 0xbe>;
1135 dma-names = "tx";
1136 };
1137 };
1138
1139 rcar_sound,mix {
1140 mix0: mix-0 { };
1141 mix1: mix-1 { };
1142 };
1143
1144 rcar_sound,ctu {
1145 ctu00: ctu-0 { };
1146 ctu01: ctu-1 { };
1147 ctu02: ctu-2 { };
1148 ctu03: ctu-3 { };
1149 ctu10: ctu-4 { };
1150 ctu11: ctu-5 { };
1151 ctu12: ctu-6 { };
1152 ctu13: ctu-7 { };
1153 };
1154
1155 rcar_sound,src {
1156 src0: src-0 {
1157 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1158 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1159 dma-names = "rx", "tx";
1160 };
1161 src1: src-1 {
1162 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1163 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1164 dma-names = "rx", "tx";
1165 };
1166 src2: src-2 {
1167 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1168 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1169 dma-names = "rx", "tx";
1170 };
1171 src3: src-3 {
1172 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1173 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1174 dma-names = "rx", "tx";
1175 };
1176 src4: src-4 {
1177 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1178 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1179 dma-names = "rx", "tx";
1180 };
1181 src5: src-5 {
1182 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1183 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1184 dma-names = "rx", "tx";
1185 };
1186 src6: src-6 {
1187 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1188 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1189 dma-names = "rx", "tx";
1190 };
1191 src7: src-7 {
1192 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1193 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1194 dma-names = "rx", "tx";
1195 };
1196 src8: src-8 {
1197 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1198 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1199 dma-names = "rx", "tx";
1200 };
1201 src9: src-9 {
1202 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1203 dmas = <&audma0 0x97>, <&audma1 0xba>;
1204 dma-names = "rx", "tx";
1205 };
1206 };
1207
1208 rcar_sound,ssi {
1209 ssi0: ssi-0 {
1210 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1211 dmas = <&audma0 0x01>, <&audma1 0x02>,
1212 <&audma0 0x15>, <&audma1 0x16>;
1213 dma-names = "rx", "tx", "rxu", "txu";
1214 };
1215 ssi1: ssi-1 {
1216 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1217 dmas = <&audma0 0x03>, <&audma1 0x04>,
1218 <&audma0 0x49>, <&audma1 0x4a>;
1219 dma-names = "rx", "tx", "rxu", "txu";
1220 };
1221 ssi2: ssi-2 {
1222 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1223 dmas = <&audma0 0x05>, <&audma1 0x06>,
1224 <&audma0 0x63>, <&audma1 0x64>;
1225 dma-names = "rx", "tx", "rxu", "txu";
1226 };
1227 ssi3: ssi-3 {
1228 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1229 dmas = <&audma0 0x07>, <&audma1 0x08>,
1230 <&audma0 0x6f>, <&audma1 0x70>;
1231 dma-names = "rx", "tx", "rxu", "txu";
1232 };
1233 ssi4: ssi-4 {
1234 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1235 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1236 <&audma0 0x71>, <&audma1 0x72>;
1237 dma-names = "rx", "tx", "rxu", "txu";
1238 };
1239 ssi5: ssi-5 {
1240 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1241 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1242 <&audma0 0x73>, <&audma1 0x74>;
1243 dma-names = "rx", "tx", "rxu", "txu";
1244 };
1245 ssi6: ssi-6 {
1246 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1247 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1248 <&audma0 0x75>, <&audma1 0x76>;
1249 dma-names = "rx", "tx", "rxu", "txu";
1250 };
1251 ssi7: ssi-7 {
1252 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1253 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1254 <&audma0 0x79>, <&audma1 0x7a>;
1255 dma-names = "rx", "tx", "rxu", "txu";
1256 };
1257 ssi8: ssi-8 {
1258 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1259 dmas = <&audma0 0x11>, <&audma1 0x12>,
1260 <&audma0 0x7b>, <&audma1 0x7c>;
1261 dma-names = "rx", "tx", "rxu", "txu";
1262 };
1263 ssi9: ssi-9 {
1264 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1265 dmas = <&audma0 0x13>, <&audma1 0x14>,
1266 <&audma0 0x7d>, <&audma1 0x7e>;
1267 dma-names = "rx", "tx", "rxu", "txu";
1268 };
1269 };
1270 };
1271
1272 audma0: dma-controller@ec700000 {
1273 compatible = "renesas,dmac-r8a7790",
1274 "renesas,rcar-dmac";
1275 reg = <0 0xec700000 0 0x10000>;
1276 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1277 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1278 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1279 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1280 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1281 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1282 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1283 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1284 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1285 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1286 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1287 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1288 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1289 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1290 interrupt-names = "error",
1291 "ch0", "ch1", "ch2", "ch3",
1292 "ch4", "ch5", "ch6", "ch7",
1293 "ch8", "ch9", "ch10", "ch11",
1294 "ch12";
1295 clocks = <&cpg CPG_MOD 502>;
1296 clock-names = "fck";
1297 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1298 resets = <&cpg 502>;
1299 #dma-cells = <1>;
1300 dma-channels = <13>;
1301 };
1302
1303 audma1: dma-controller@ec720000 {
1304 compatible = "renesas,dmac-r8a7790",
1305 "renesas,rcar-dmac";
1306 reg = <0 0xec720000 0 0x10000>;
1307 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1308 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1309 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1310 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1311 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1312 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1313 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1314 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1315 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1316 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1317 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1318 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1319 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1320 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1321 interrupt-names = "error",
1322 "ch0", "ch1", "ch2", "ch3",
1323 "ch4", "ch5", "ch6", "ch7",
1324 "ch8", "ch9", "ch10", "ch11",
1325 "ch12";
1326 clocks = <&cpg CPG_MOD 501>;
1327 clock-names = "fck";
1328 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1329 resets = <&cpg 501>;
1330 #dma-cells = <1>;
1331 dma-channels = <13>;
1332 };
1333
1334 xhci: usb@ee000000 {
1335 compatible = "renesas,xhci-r8a7790",
1336 "renesas,rcar-gen2-xhci";
1337 reg = <0 0xee000000 0 0xc00>;
1338 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1339 clocks = <&cpg CPG_MOD 328>;
1340 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1341 resets = <&cpg 328>;
1342 phys = <&usb2 1>;
1343 phy-names = "usb";
1344 status = "disabled";
1345 };
1346
1347 pci0: pci@ee090000 {
1348 compatible = "renesas,pci-r8a7790",
1349 "renesas,pci-rcar-gen2";
1350 device_type = "pci";
1351 reg = <0 0xee090000 0 0xc00>,
1352 <0 0xee080000 0 0x1100>;
1353 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1354 clocks = <&cpg CPG_MOD 703>;
1355 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1356 resets = <&cpg 703>;
1357 status = "disabled";
1358
1359 bus-range = <0 0>;
1360 #address-cells = <3>;
1361 #size-cells = <2>;
1362 #interrupt-cells = <1>;
1363 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1364 interrupt-map-mask = <0xff00 0 0 0x7>;
1365 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1366 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1367 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1368
1369 usb@1,0 {
1370 reg = <0x800 0 0 0 0>;
1371 phys = <&usb0 0>;
1372 phy-names = "usb";
1373 };
1374
1375 usb@2,0 {
1376 reg = <0x1000 0 0 0 0>;
1377 phys = <&usb0 0>;
1378 phy-names = "usb";
1379 };
1380 };
1381
1382 pci1: pci@ee0b0000 {
1383 compatible = "renesas,pci-r8a7790",
1384 "renesas,pci-rcar-gen2";
1385 device_type = "pci";
1386 reg = <0 0xee0b0000 0 0xc00>,
1387 <0 0xee0a0000 0 0x1100>;
1388 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1389 clocks = <&cpg CPG_MOD 703>;
1390 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1391 resets = <&cpg 703>;
1392 status = "disabled";
1393
1394 bus-range = <1 1>;
1395 #address-cells = <3>;
1396 #size-cells = <2>;
1397 #interrupt-cells = <1>;
1398 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1399 interrupt-map-mask = <0xff00 0 0 0x7>;
1400 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1401 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1402 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1403 };
1404
1405 pci2: pci@ee0d0000 {
1406 compatible = "renesas,pci-r8a7790",
1407 "renesas,pci-rcar-gen2";
1408 device_type = "pci";
1409 clocks = <&cpg CPG_MOD 703>;
1410 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1411 resets = <&cpg 703>;
1412 reg = <0 0xee0d0000 0 0xc00>,
1413 <0 0xee0c0000 0 0x1100>;
1414 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1415 status = "disabled";
1416
1417 bus-range = <2 2>;
1418 #address-cells = <3>;
1419 #size-cells = <2>;
1420 #interrupt-cells = <1>;
1421 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1422 interrupt-map-mask = <0xff00 0 0 0x7>;
1423 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1424 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1425 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1426
1427 usb@1,0 {
1428 reg = <0x20800 0 0 0 0>;
1429 phys = <&usb2 0>;
1430 phy-names = "usb";
1431 };
1432
1433 usb@2,0 {
1434 reg = <0x21000 0 0 0 0>;
1435 phys = <&usb2 0>;
1436 phy-names = "usb";
1437 };
1438 };
1439
1440 sdhi0: sd@ee100000 {
1441 compatible = "renesas,sdhi-r8a7790",
1442 "renesas,rcar-gen2-sdhi";
1443 reg = <0 0xee100000 0 0x328>;
1444 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1445 clocks = <&cpg CPG_MOD 314>;
1446 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1447 <&dmac1 0xcd>, <&dmac1 0xce>;
1448 dma-names = "tx", "rx", "tx", "rx";
1449 max-frequency = <195000000>;
1450 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1451 resets = <&cpg 314>;
1452 status = "disabled";
1453 };
1454
1455 sdhi1: sd@ee120000 {
1456 compatible = "renesas,sdhi-r8a7790",
1457 "renesas,rcar-gen2-sdhi";
1458 reg = <0 0xee120000 0 0x328>;
1459 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1460 clocks = <&cpg CPG_MOD 313>;
1461 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1462 <&dmac1 0xc9>, <&dmac1 0xca>;
1463 dma-names = "tx", "rx", "tx", "rx";
1464 max-frequency = <195000000>;
1465 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1466 resets = <&cpg 313>;
1467 status = "disabled";
1468 };
1469
1470 sdhi2: sd@ee140000 {
1471 compatible = "renesas,sdhi-r8a7790",
1472 "renesas,rcar-gen2-sdhi";
1473 reg = <0 0xee140000 0 0x100>;
1474 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1475 clocks = <&cpg CPG_MOD 312>;
1476 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1477 <&dmac1 0xc1>, <&dmac1 0xc2>;
1478 dma-names = "tx", "rx", "tx", "rx";
1479 max-frequency = <97500000>;
1480 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1481 resets = <&cpg 312>;
1482 status = "disabled";
1483 };
1484
1485 sdhi3: sd@ee160000 {
1486 compatible = "renesas,sdhi-r8a7790",
1487 "renesas,rcar-gen2-sdhi";
1488 reg = <0 0xee160000 0 0x100>;
1489 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1490 clocks = <&cpg CPG_MOD 311>;
1491 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1492 <&dmac1 0xd3>, <&dmac1 0xd4>;
1493 dma-names = "tx", "rx", "tx", "rx";
1494 max-frequency = <97500000>;
1495 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1496 resets = <&cpg 311>;
1497 status = "disabled";
1498 };
1499
1500 mmcif0: mmc@ee200000 {
1501 compatible = "renesas,mmcif-r8a7790",
1502 "renesas,sh-mmcif";
1503 reg = <0 0xee200000 0 0x80>;
1504 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1505 clocks = <&cpg CPG_MOD 315>;
1506 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1507 <&dmac1 0xd1>, <&dmac1 0xd2>;
1508 dma-names = "tx", "rx", "tx", "rx";
1509 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1510 resets = <&cpg 315>;
1511 reg-io-width = <4>;
1512 status = "disabled";
1513 max-frequency = <97500000>;
1514 };
1515
1516 mmcif1: mmc@ee220000 {
1517 compatible = "renesas,mmcif-r8a7790",
1518 "renesas,sh-mmcif";
1519 reg = <0 0xee220000 0 0x80>;
1520 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1521 clocks = <&cpg CPG_MOD 305>;
1522 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1523 <&dmac1 0xe1>, <&dmac1 0xe2>;
1524 dma-names = "tx", "rx", "tx", "rx";
1525 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1526 resets = <&cpg 305>;
1527 reg-io-width = <4>;
1528 status = "disabled";
1529 max-frequency = <97500000>;
1530 };
1531
1532 sata0: sata@ee300000 {
1533 compatible = "renesas,sata-r8a7790",
1534 "renesas,rcar-gen2-sata";
1535 reg = <0 0xee300000 0 0x2000>;
1536 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1537 clocks = <&cpg CPG_MOD 815>;
1538 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1539 resets = <&cpg 815>;
1540 status = "disabled";
1541 };
1542
1543 sata1: sata@ee500000 {
1544 compatible = "renesas,sata-r8a7790",
1545 "renesas,rcar-gen2-sata";
1546 reg = <0 0xee500000 0 0x2000>;
1547 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1548 clocks = <&cpg CPG_MOD 814>;
1549 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1550 resets = <&cpg 814>;
1551 status = "disabled";
1552 };
1553
1554 ether: ethernet@ee700000 {
1555 compatible = "renesas,ether-r8a7790",
1556 "renesas,rcar-gen2-ether";
1557 reg = <0 0xee700000 0 0x400>;
1558 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1559 clocks = <&cpg CPG_MOD 813>;
1560 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1561 resets = <&cpg 813>;
1562 phy-mode = "rmii";
1563 #address-cells = <1>;
1564 #size-cells = <0>;
1565 status = "disabled";
1566 };
1567
1568 gic: interrupt-controller@f1001000 {
1569 compatible = "arm,gic-400";
1570 #interrupt-cells = <3>;
1571 #address-cells = <0>;
1572 interrupt-controller;
1573 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1574 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1575 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
1576 clocks = <&cpg CPG_MOD 408>;
1577 clock-names = "clk";
1578 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1579 resets = <&cpg 408>;
1580 };
1581
1582 pciec: pcie@fe000000 {
1583 compatible = "renesas,pcie-r8a7790",
1584 "renesas,pcie-rcar-gen2";
1585 reg = <0 0xfe000000 0 0x80000>;
1586 #address-cells = <3>;
1587 #size-cells = <2>;
1588 bus-range = <0x00 0xff>;
1589 device_type = "pci";
1590 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1591 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1592 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1593 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1594 /* Map all possible DDR as inbound ranges */
1595 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1596 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1597 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1598 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1599 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1600 #interrupt-cells = <1>;
1601 interrupt-map-mask = <0 0 0 0>;
1602 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1603 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1604 clock-names = "pcie", "pcie_bus";
1605 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1606 resets = <&cpg 319>;
1607 status = "disabled";
1608 };
1609
1610 vsp@fe920000 {
1611 compatible = "renesas,vsp1";
1612 reg = <0 0xfe920000 0 0x8000>;
1613 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1614 clocks = <&cpg CPG_MOD 130>;
1615 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1616 resets = <&cpg 130>;
1617 };
1618
1619 vsp@fe928000 {
1620 compatible = "renesas,vsp1";
1621 reg = <0 0xfe928000 0 0x8000>;
1622 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1623 clocks = <&cpg CPG_MOD 131>;
1624 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1625 resets = <&cpg 131>;
1626 };
1627
1628 vsp@fe930000 {
1629 compatible = "renesas,vsp1";
1630 reg = <0 0xfe930000 0 0x8000>;
1631 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1632 clocks = <&cpg CPG_MOD 128>;
1633 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1634 resets = <&cpg 128>;
1635 };
1636
1637 vsp@fe938000 {
1638 compatible = "renesas,vsp1";
1639 reg = <0 0xfe938000 0 0x8000>;
1640 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1641 clocks = <&cpg CPG_MOD 127>;
1642 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1643 resets = <&cpg 127>;
1644 };
1645
1646 fdp1@fe940000 {
1647 compatible = "renesas,fdp1";
1648 reg = <0 0xfe940000 0 0x2400>;
1649 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1650 clocks = <&cpg CPG_MOD 119>;
1651 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1652 resets = <&cpg 119>;
1653 };
1654
1655 fdp1@fe944000 {
1656 compatible = "renesas,fdp1";
1657 reg = <0 0xfe944000 0 0x2400>;
1658 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1659 clocks = <&cpg CPG_MOD 118>;
1660 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1661 resets = <&cpg 118>;
1662 };
1663
1664 fdp1@fe948000 {
1665 compatible = "renesas,fdp1";
1666 reg = <0 0xfe948000 0 0x2400>;
1667 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1668 clocks = <&cpg CPG_MOD 117>;
1669 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1670 resets = <&cpg 117>;
1671 };
1672
1673 jpu: jpeg-codec@fe980000 {
1674 compatible = "renesas,jpu-r8a7790",
1675 "renesas,rcar-gen2-jpu";
1676 reg = <0 0xfe980000 0 0x10300>;
1677 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1678 clocks = <&cpg CPG_MOD 106>;
1679 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1680 resets = <&cpg 106>;
1681 };
1682
1683 du: display@feb00000 {
1684 compatible = "renesas,du-r8a7790";
1685 reg = <0 0xfeb00000 0 0x70000>;
1686 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1687 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1688 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1689 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1690 <&cpg CPG_MOD 722>;
1691 clock-names = "du.0", "du.1", "du.2";
1692 status = "disabled";
1693
1694 ports {
1695 #address-cells = <1>;
1696 #size-cells = <0>;
1697
1698 port@0 {
1699 reg = <0>;
1700 du_out_rgb: endpoint {
1701 };
1702 };
1703 port@1 {
1704 reg = <1>;
1705 du_out_lvds0: endpoint {
1706 remote-endpoint = <&lvds0_in>;
1707 };
1708 };
1709 port@2 {
1710 reg = <2>;
1711 du_out_lvds1: endpoint {
1712 remote-endpoint = <&lvds1_in>;
1713 };
1714 };
1715 };
1716 };
1717
1718 lvds0: lvds@feb90000 {
1719 compatible = "renesas,r8a7790-lvds";
1720 reg = <0 0xfeb90000 0 0x1c>;
1721 clocks = <&cpg CPG_MOD 726>;
1722 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1723 resets = <&cpg 726>;
1724 status = "disabled";
1725
1726 ports {
1727 #address-cells = <1>;
1728 #size-cells = <0>;
1729
1730 port@0 {
1731 reg = <0>;
1732 lvds0_in: endpoint {
1733 remote-endpoint = <&du_out_lvds0>;
1734 };
1735 };
1736 port@1 {
1737 reg = <1>;
1738 lvds0_out: endpoint {
1739 };
1740 };
1741 };
1742 };
1743
1744 lvds1: lvds@feb94000 {
1745 compatible = "renesas,r8a7790-lvds";
1746 reg = <0 0xfeb94000 0 0x1c>;
1747 clocks = <&cpg CPG_MOD 725>;
1748 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1749 resets = <&cpg 725>;
1750 status = "disabled";
1751
1752 ports {
1753 #address-cells = <1>;
1754 #size-cells = <0>;
1755
1756 port@0 {
1757 reg = <0>;
1758 lvds1_in: endpoint {
1759 remote-endpoint = <&du_out_lvds1>;
1760 };
1761 };
1762 port@1 {
1763 reg = <1>;
1764 lvds1_out: endpoint {
1765 };
1766 };
1767 };
1768 };
1769
1770 prr: chipid@ff000044 {
1771 compatible = "renesas,prr";
1772 reg = <0 0xff000044 0 4>;
1773 };
1774
1775 cmt0: timer@ffca0000 {
1776 compatible = "renesas,r8a7790-cmt0",
1777 "renesas,rcar-gen2-cmt0";
1778 reg = <0 0xffca0000 0 0x1004>;
1779 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1780 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1781 clocks = <&cpg CPG_MOD 124>;
1782 clock-names = "fck";
1783 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1784 resets = <&cpg 124>;
1785
1786 status = "disabled";
1787 };
1788
1789 cmt1: timer@e6130000 {
1790 compatible = "renesas,r8a7790-cmt1",
1791 "renesas,rcar-gen2-cmt1";
1792 reg = <0 0xe6130000 0 0x1004>;
1793 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1794 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1795 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1796 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1797 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1798 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1799 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1800 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1801 clocks = <&cpg CPG_MOD 329>;
1802 clock-names = "fck";
1803 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1804 resets = <&cpg 329>;
1805
1806 status = "disabled";
1807 };
1808 };
1809
1810 thermal-zones {
1811 cpu_thermal: cpu-thermal {
1812 polling-delay-passive = <0>;
1813 polling-delay = <0>;
1814
1815 thermal-sensors = <&thermal>;
1816
1817 trips {
1818 cpu-crit {
1819 temperature = <95000>;
1820 hysteresis = <0>;
1821 type = "critical";
1822 };
1823 };
1824 cooling-maps {
1825 };
1826 };
1827 };
1828
1829 timer {
1830 compatible = "arm,armv7-timer";
1831 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1832 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1833 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
1834 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
1835 };
1836
1837 /* External USB clock - can be overridden by the board */
1838 usb_extal_clk: usb_extal {
1839 compatible = "fixed-clock";
1840 #clock-cells = <0>;
1841 clock-frequency = <48000000>;
1842 };
1843 };
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