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ARM: dts: r8a7790: Fix sort order of VSP1/FDP1 nodes
[mirror_ubuntu-jammy-kernel.git] / arch / arm / boot / dts / r8a7790.dtsi
1 /*
2 * Device Tree Source for the r8a7790 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/power/r8a7790-sysc.h>
17
18 / {
19 compatible = "renesas,r8a7790";
20 #address-cells = <2>;
21 #size-cells = <2>;
22
23 aliases {
24 i2c0 = &i2c0;
25 i2c1 = &i2c1;
26 i2c2 = &i2c2;
27 i2c3 = &i2c3;
28 i2c4 = &iic0;
29 i2c5 = &iic1;
30 i2c6 = &iic2;
31 i2c7 = &iic3;
32 spi0 = &qspi;
33 spi1 = &msiof0;
34 spi2 = &msiof1;
35 spi3 = &msiof2;
36 spi4 = &msiof3;
37 vin0 = &vin0;
38 vin1 = &vin1;
39 vin2 = &vin2;
40 vin3 = &vin3;
41 };
42
43 /*
44 * The external audio clocks are configured as 0 Hz fixed frequency
45 * clocks by default.
46 * Boards that provide audio clocks should override them.
47 */
48 audio_clk_a: audio_clk_a {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <0>;
52 };
53 audio_clk_b: audio_clk_b {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58 audio_clk_c: audio_clk_c {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
63
64 /* External CAN clock */
65 can_clk: can {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 /* This value must be overridden by the board. */
69 clock-frequency = <0>;
70 };
71
72 cpus {
73 #address-cells = <1>;
74 #size-cells = <0>;
75 enable-method = "renesas,apmu";
76
77 cpu0: cpu@0 {
78 device_type = "cpu";
79 compatible = "arm,cortex-a15";
80 reg = <0>;
81 clock-frequency = <1300000000>;
82 voltage-tolerance = <1>; /* 1% */
83 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
84 clock-latency = <300000>; /* 300 us */
85 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
86 next-level-cache = <&L2_CA15>;
87 capacity-dmips-mhz = <1024>;
88
89 /* kHz - uV - OPPs unknown yet */
90 operating-points = <1400000 1000000>,
91 <1225000 1000000>,
92 <1050000 1000000>,
93 < 875000 1000000>,
94 < 700000 1000000>,
95 < 350000 1000000>;
96 };
97
98 cpu1: cpu@1 {
99 device_type = "cpu";
100 compatible = "arm,cortex-a15";
101 reg = <1>;
102 clock-frequency = <1300000000>;
103 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
104 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
105 next-level-cache = <&L2_CA15>;
106 capacity-dmips-mhz = <1024>;
107 };
108
109 cpu2: cpu@2 {
110 device_type = "cpu";
111 compatible = "arm,cortex-a15";
112 reg = <2>;
113 clock-frequency = <1300000000>;
114 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
115 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
116 next-level-cache = <&L2_CA15>;
117 capacity-dmips-mhz = <1024>;
118 };
119
120 cpu3: cpu@3 {
121 device_type = "cpu";
122 compatible = "arm,cortex-a15";
123 reg = <3>;
124 clock-frequency = <1300000000>;
125 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
126 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
127 next-level-cache = <&L2_CA15>;
128 capacity-dmips-mhz = <1024>;
129 };
130
131 cpu4: cpu@100 {
132 device_type = "cpu";
133 compatible = "arm,cortex-a7";
134 reg = <0x100>;
135 clock-frequency = <780000000>;
136 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
137 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
138 next-level-cache = <&L2_CA7>;
139 capacity-dmips-mhz = <539>;
140 };
141
142 cpu5: cpu@101 {
143 device_type = "cpu";
144 compatible = "arm,cortex-a7";
145 reg = <0x101>;
146 clock-frequency = <780000000>;
147 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
148 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
149 next-level-cache = <&L2_CA7>;
150 capacity-dmips-mhz = <539>;
151 };
152
153 cpu6: cpu@102 {
154 device_type = "cpu";
155 compatible = "arm,cortex-a7";
156 reg = <0x102>;
157 clock-frequency = <780000000>;
158 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
159 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
160 next-level-cache = <&L2_CA7>;
161 capacity-dmips-mhz = <539>;
162 };
163
164 cpu7: cpu@103 {
165 device_type = "cpu";
166 compatible = "arm,cortex-a7";
167 reg = <0x103>;
168 clock-frequency = <780000000>;
169 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
170 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
171 next-level-cache = <&L2_CA7>;
172 capacity-dmips-mhz = <539>;
173 };
174
175 L2_CA15: cache-controller-0 {
176 compatible = "cache";
177 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
178 cache-unified;
179 cache-level = <2>;
180 };
181
182 L2_CA7: cache-controller-1 {
183 compatible = "cache";
184 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
185 cache-unified;
186 cache-level = <2>;
187 };
188 };
189
190 /* External root clock */
191 extal_clk: extal {
192 compatible = "fixed-clock";
193 #clock-cells = <0>;
194 /* This value must be overridden by the board. */
195 clock-frequency = <0>;
196 };
197
198 /* External PCIe clock - can be overridden by the board */
199 pcie_bus_clk: pcie_bus {
200 compatible = "fixed-clock";
201 #clock-cells = <0>;
202 clock-frequency = <0>;
203 };
204
205 /* External SCIF clock */
206 scif_clk: scif {
207 compatible = "fixed-clock";
208 #clock-cells = <0>;
209 /* This value must be overridden by the board. */
210 clock-frequency = <0>;
211 };
212
213 soc {
214 compatible = "simple-bus";
215 interrupt-parent = <&gic>;
216
217 #address-cells = <2>;
218 #size-cells = <2>;
219 ranges;
220
221 rwdt: watchdog@e6020000 {
222 compatible = "renesas,r8a7790-wdt",
223 "renesas,rcar-gen2-wdt";
224 reg = <0 0xe6020000 0 0x0c>;
225 clocks = <&cpg CPG_MOD 402>;
226 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
227 resets = <&cpg 402>;
228 status = "disabled";
229 };
230
231 gpio0: gpio@e6050000 {
232 compatible = "renesas,gpio-r8a7790",
233 "renesas,rcar-gen2-gpio";
234 reg = <0 0xe6050000 0 0x50>;
235 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
236 #gpio-cells = <2>;
237 gpio-controller;
238 gpio-ranges = <&pfc 0 0 32>;
239 #interrupt-cells = <2>;
240 interrupt-controller;
241 clocks = <&cpg CPG_MOD 912>;
242 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
243 resets = <&cpg 912>;
244 };
245
246 gpio1: gpio@e6051000 {
247 compatible = "renesas,gpio-r8a7790",
248 "renesas,rcar-gen2-gpio";
249 reg = <0 0xe6051000 0 0x50>;
250 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
251 #gpio-cells = <2>;
252 gpio-controller;
253 gpio-ranges = <&pfc 0 32 30>;
254 #interrupt-cells = <2>;
255 interrupt-controller;
256 clocks = <&cpg CPG_MOD 911>;
257 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
258 resets = <&cpg 911>;
259 };
260
261 gpio2: gpio@e6052000 {
262 compatible = "renesas,gpio-r8a7790",
263 "renesas,rcar-gen2-gpio";
264 reg = <0 0xe6052000 0 0x50>;
265 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
266 #gpio-cells = <2>;
267 gpio-controller;
268 gpio-ranges = <&pfc 0 64 30>;
269 #interrupt-cells = <2>;
270 interrupt-controller;
271 clocks = <&cpg CPG_MOD 910>;
272 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
273 resets = <&cpg 910>;
274 };
275
276 gpio3: gpio@e6053000 {
277 compatible = "renesas,gpio-r8a7790",
278 "renesas,rcar-gen2-gpio";
279 reg = <0 0xe6053000 0 0x50>;
280 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
281 #gpio-cells = <2>;
282 gpio-controller;
283 gpio-ranges = <&pfc 0 96 32>;
284 #interrupt-cells = <2>;
285 interrupt-controller;
286 clocks = <&cpg CPG_MOD 909>;
287 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
288 resets = <&cpg 909>;
289 };
290
291 gpio4: gpio@e6054000 {
292 compatible = "renesas,gpio-r8a7790",
293 "renesas,rcar-gen2-gpio";
294 reg = <0 0xe6054000 0 0x50>;
295 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
296 #gpio-cells = <2>;
297 gpio-controller;
298 gpio-ranges = <&pfc 0 128 32>;
299 #interrupt-cells = <2>;
300 interrupt-controller;
301 clocks = <&cpg CPG_MOD 908>;
302 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
303 resets = <&cpg 908>;
304 };
305
306 gpio5: gpio@e6055000 {
307 compatible = "renesas,gpio-r8a7790",
308 "renesas,rcar-gen2-gpio";
309 reg = <0 0xe6055000 0 0x50>;
310 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
311 #gpio-cells = <2>;
312 gpio-controller;
313 gpio-ranges = <&pfc 0 160 32>;
314 #interrupt-cells = <2>;
315 interrupt-controller;
316 clocks = <&cpg CPG_MOD 907>;
317 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
318 resets = <&cpg 907>;
319 };
320
321 pfc: pin-controller@e6060000 {
322 compatible = "renesas,pfc-r8a7790";
323 reg = <0 0xe6060000 0 0x250>;
324 };
325
326 cpg: clock-controller@e6150000 {
327 compatible = "renesas,r8a7790-cpg-mssr";
328 reg = <0 0xe6150000 0 0x1000>;
329 clocks = <&extal_clk>, <&usb_extal_clk>;
330 clock-names = "extal", "usb_extal";
331 #clock-cells = <2>;
332 #power-domain-cells = <0>;
333 #reset-cells = <1>;
334 };
335
336 apmu@e6151000 {
337 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
338 reg = <0 0xe6151000 0 0x188>;
339 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
340 };
341
342 apmu@e6152000 {
343 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
344 reg = <0 0xe6152000 0 0x188>;
345 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
346 };
347
348 rst: reset-controller@e6160000 {
349 compatible = "renesas,r8a7790-rst";
350 reg = <0 0xe6160000 0 0x0100>;
351 };
352
353 sysc: system-controller@e6180000 {
354 compatible = "renesas,r8a7790-sysc";
355 reg = <0 0xe6180000 0 0x0200>;
356 #power-domain-cells = <1>;
357 };
358
359 irqc0: interrupt-controller@e61c0000 {
360 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
361 #interrupt-cells = <2>;
362 interrupt-controller;
363 reg = <0 0xe61c0000 0 0x200>;
364 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
365 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
366 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
367 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
368 clocks = <&cpg CPG_MOD 407>;
369 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
370 resets = <&cpg 407>;
371 };
372
373 thermal: thermal@e61f0000 {
374 compatible = "renesas,thermal-r8a7790",
375 "renesas,rcar-gen2-thermal",
376 "renesas,rcar-thermal";
377 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
378 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
379 clocks = <&cpg CPG_MOD 522>;
380 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
381 resets = <&cpg 522>;
382 #thermal-sensor-cells = <0>;
383 };
384
385 ipmmu_sy0: mmu@e6280000 {
386 compatible = "renesas,ipmmu-r8a7790",
387 "renesas,ipmmu-vmsa";
388 reg = <0 0xe6280000 0 0x1000>;
389 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
390 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
391 #iommu-cells = <1>;
392 status = "disabled";
393 };
394
395 ipmmu_sy1: mmu@e6290000 {
396 compatible = "renesas,ipmmu-r8a7790",
397 "renesas,ipmmu-vmsa";
398 reg = <0 0xe6290000 0 0x1000>;
399 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
400 #iommu-cells = <1>;
401 status = "disabled";
402 };
403
404 ipmmu_ds: mmu@e6740000 {
405 compatible = "renesas,ipmmu-r8a7790",
406 "renesas,ipmmu-vmsa";
407 reg = <0 0xe6740000 0 0x1000>;
408 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
409 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
410 #iommu-cells = <1>;
411 status = "disabled";
412 };
413
414 ipmmu_mp: mmu@ec680000 {
415 compatible = "renesas,ipmmu-r8a7790",
416 "renesas,ipmmu-vmsa";
417 reg = <0 0xec680000 0 0x1000>;
418 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
419 #iommu-cells = <1>;
420 status = "disabled";
421 };
422
423 ipmmu_mx: mmu@fe951000 {
424 compatible = "renesas,ipmmu-r8a7790",
425 "renesas,ipmmu-vmsa";
426 reg = <0 0xfe951000 0 0x1000>;
427 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
428 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
429 #iommu-cells = <1>;
430 status = "disabled";
431 };
432
433 ipmmu_rt: mmu@ffc80000 {
434 compatible = "renesas,ipmmu-r8a7790",
435 "renesas,ipmmu-vmsa";
436 reg = <0 0xffc80000 0 0x1000>;
437 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
438 #iommu-cells = <1>;
439 status = "disabled";
440 };
441
442 icram0: sram@e63a0000 {
443 compatible = "mmio-sram";
444 reg = <0 0xe63a0000 0 0x12000>;
445 };
446
447 icram1: sram@e63c0000 {
448 compatible = "mmio-sram";
449 reg = <0 0xe63c0000 0 0x1000>;
450 #address-cells = <1>;
451 #size-cells = <1>;
452 ranges = <0 0 0xe63c0000 0x1000>;
453
454 smp-sram@0 {
455 compatible = "renesas,smp-sram";
456 reg = <0 0x100>;
457 };
458 };
459
460 i2c0: i2c@e6508000 {
461 #address-cells = <1>;
462 #size-cells = <0>;
463 compatible = "renesas,i2c-r8a7790",
464 "renesas,rcar-gen2-i2c";
465 reg = <0 0xe6508000 0 0x40>;
466 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
467 clocks = <&cpg CPG_MOD 931>;
468 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
469 resets = <&cpg 931>;
470 i2c-scl-internal-delay-ns = <110>;
471 status = "disabled";
472 };
473
474 i2c1: i2c@e6518000 {
475 #address-cells = <1>;
476 #size-cells = <0>;
477 compatible = "renesas,i2c-r8a7790",
478 "renesas,rcar-gen2-i2c";
479 reg = <0 0xe6518000 0 0x40>;
480 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
481 clocks = <&cpg CPG_MOD 930>;
482 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
483 resets = <&cpg 930>;
484 i2c-scl-internal-delay-ns = <6>;
485 status = "disabled";
486 };
487
488 i2c2: i2c@e6530000 {
489 #address-cells = <1>;
490 #size-cells = <0>;
491 compatible = "renesas,i2c-r8a7790",
492 "renesas,rcar-gen2-i2c";
493 reg = <0 0xe6530000 0 0x40>;
494 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
495 clocks = <&cpg CPG_MOD 929>;
496 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
497 resets = <&cpg 929>;
498 i2c-scl-internal-delay-ns = <6>;
499 status = "disabled";
500 };
501
502 i2c3: i2c@e6540000 {
503 #address-cells = <1>;
504 #size-cells = <0>;
505 compatible = "renesas,i2c-r8a7790",
506 "renesas,rcar-gen2-i2c";
507 reg = <0 0xe6540000 0 0x40>;
508 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
509 clocks = <&cpg CPG_MOD 928>;
510 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
511 resets = <&cpg 928>;
512 i2c-scl-internal-delay-ns = <110>;
513 status = "disabled";
514 };
515
516 iic0: i2c@e6500000 {
517 #address-cells = <1>;
518 #size-cells = <0>;
519 compatible = "renesas,iic-r8a7790",
520 "renesas,rcar-gen2-iic",
521 "renesas,rmobile-iic";
522 reg = <0 0xe6500000 0 0x425>;
523 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
524 clocks = <&cpg CPG_MOD 318>;
525 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
526 <&dmac1 0x61>, <&dmac1 0x62>;
527 dma-names = "tx", "rx", "tx", "rx";
528 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
529 resets = <&cpg 318>;
530 status = "disabled";
531 };
532
533 iic1: i2c@e6510000 {
534 #address-cells = <1>;
535 #size-cells = <0>;
536 compatible = "renesas,iic-r8a7790",
537 "renesas,rcar-gen2-iic",
538 "renesas,rmobile-iic";
539 reg = <0 0xe6510000 0 0x425>;
540 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
541 clocks = <&cpg CPG_MOD 323>;
542 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
543 <&dmac1 0x65>, <&dmac1 0x66>;
544 dma-names = "tx", "rx", "tx", "rx";
545 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
546 resets = <&cpg 323>;
547 status = "disabled";
548 };
549
550 iic2: i2c@e6520000 {
551 #address-cells = <1>;
552 #size-cells = <0>;
553 compatible = "renesas,iic-r8a7790",
554 "renesas,rcar-gen2-iic",
555 "renesas,rmobile-iic";
556 reg = <0 0xe6520000 0 0x425>;
557 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
558 clocks = <&cpg CPG_MOD 300>;
559 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
560 <&dmac1 0x69>, <&dmac1 0x6a>;
561 dma-names = "tx", "rx", "tx", "rx";
562 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
563 resets = <&cpg 300>;
564 status = "disabled";
565 };
566
567 iic3: i2c@e60b0000 {
568 #address-cells = <1>;
569 #size-cells = <0>;
570 compatible = "renesas,iic-r8a7790",
571 "renesas,rcar-gen2-iic",
572 "renesas,rmobile-iic";
573 reg = <0 0xe60b0000 0 0x425>;
574 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
575 clocks = <&cpg CPG_MOD 926>;
576 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
577 <&dmac1 0x77>, <&dmac1 0x78>;
578 dma-names = "tx", "rx", "tx", "rx";
579 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
580 resets = <&cpg 926>;
581 status = "disabled";
582 };
583
584 hsusb: usb@e6590000 {
585 compatible = "renesas,usbhs-r8a7790",
586 "renesas,rcar-gen2-usbhs";
587 reg = <0 0xe6590000 0 0x100>;
588 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
589 clocks = <&cpg CPG_MOD 704>;
590 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
591 <&usb_dmac1 0>, <&usb_dmac1 1>;
592 dma-names = "ch0", "ch1", "ch2", "ch3";
593 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
594 resets = <&cpg 704>;
595 renesas,buswait = <4>;
596 phys = <&usb0 1>;
597 phy-names = "usb";
598 status = "disabled";
599 };
600
601 usbphy: usb-phy@e6590100 {
602 compatible = "renesas,usb-phy-r8a7790",
603 "renesas,rcar-gen2-usb-phy";
604 reg = <0 0xe6590100 0 0x100>;
605 #address-cells = <1>;
606 #size-cells = <0>;
607 clocks = <&cpg CPG_MOD 704>;
608 clock-names = "usbhs";
609 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
610 resets = <&cpg 704>;
611 status = "disabled";
612
613 usb0: usb-channel@0 {
614 reg = <0>;
615 #phy-cells = <1>;
616 };
617 usb2: usb-channel@2 {
618 reg = <2>;
619 #phy-cells = <1>;
620 };
621 };
622
623 usb_dmac0: dma-controller@e65a0000 {
624 compatible = "renesas,r8a7790-usb-dmac",
625 "renesas,usb-dmac";
626 reg = <0 0xe65a0000 0 0x100>;
627 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
628 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
629 interrupt-names = "ch0", "ch1";
630 clocks = <&cpg CPG_MOD 330>;
631 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
632 resets = <&cpg 330>;
633 #dma-cells = <1>;
634 dma-channels = <2>;
635 };
636
637 usb_dmac1: dma-controller@e65b0000 {
638 compatible = "renesas,r8a7790-usb-dmac",
639 "renesas,usb-dmac";
640 reg = <0 0xe65b0000 0 0x100>;
641 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
642 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
643 interrupt-names = "ch0", "ch1";
644 clocks = <&cpg CPG_MOD 331>;
645 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
646 resets = <&cpg 331>;
647 #dma-cells = <1>;
648 dma-channels = <2>;
649 };
650
651 dmac0: dma-controller@e6700000 {
652 compatible = "renesas,dmac-r8a7790",
653 "renesas,rcar-dmac";
654 reg = <0 0xe6700000 0 0x20000>;
655 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
656 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
657 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
658 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
659 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
660 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
661 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
662 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
663 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
664 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
665 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
666 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
667 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
668 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
669 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
670 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
671 interrupt-names = "error",
672 "ch0", "ch1", "ch2", "ch3",
673 "ch4", "ch5", "ch6", "ch7",
674 "ch8", "ch9", "ch10", "ch11",
675 "ch12", "ch13", "ch14";
676 clocks = <&cpg CPG_MOD 219>;
677 clock-names = "fck";
678 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
679 resets = <&cpg 219>;
680 #dma-cells = <1>;
681 dma-channels = <15>;
682 };
683
684 dmac1: dma-controller@e6720000 {
685 compatible = "renesas,dmac-r8a7790",
686 "renesas,rcar-dmac";
687 reg = <0 0xe6720000 0 0x20000>;
688 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
689 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
690 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
691 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
692 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
693 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
694 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
695 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
696 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
697 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
698 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
699 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
700 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
701 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
702 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
703 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
704 interrupt-names = "error",
705 "ch0", "ch1", "ch2", "ch3",
706 "ch4", "ch5", "ch6", "ch7",
707 "ch8", "ch9", "ch10", "ch11",
708 "ch12", "ch13", "ch14";
709 clocks = <&cpg CPG_MOD 218>;
710 clock-names = "fck";
711 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
712 resets = <&cpg 218>;
713 #dma-cells = <1>;
714 dma-channels = <15>;
715 };
716
717 avb: ethernet@e6800000 {
718 compatible = "renesas,etheravb-r8a7790",
719 "renesas,etheravb-rcar-gen2";
720 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
721 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
722 clocks = <&cpg CPG_MOD 812>;
723 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
724 resets = <&cpg 812>;
725 #address-cells = <1>;
726 #size-cells = <0>;
727 status = "disabled";
728 };
729
730 qspi: spi@e6b10000 {
731 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
732 reg = <0 0xe6b10000 0 0x2c>;
733 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
734 clocks = <&cpg CPG_MOD 917>;
735 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
736 <&dmac1 0x17>, <&dmac1 0x18>;
737 dma-names = "tx", "rx", "tx", "rx";
738 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
739 resets = <&cpg 917>;
740 num-cs = <1>;
741 #address-cells = <1>;
742 #size-cells = <0>;
743 status = "disabled";
744 };
745
746 scifa0: serial@e6c40000 {
747 compatible = "renesas,scifa-r8a7790",
748 "renesas,rcar-gen2-scifa", "renesas,scifa";
749 reg = <0 0xe6c40000 0 64>;
750 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
751 clocks = <&cpg CPG_MOD 204>;
752 clock-names = "fck";
753 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
754 <&dmac1 0x21>, <&dmac1 0x22>;
755 dma-names = "tx", "rx", "tx", "rx";
756 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
757 resets = <&cpg 204>;
758 status = "disabled";
759 };
760
761 scifa1: serial@e6c50000 {
762 compatible = "renesas,scifa-r8a7790",
763 "renesas,rcar-gen2-scifa", "renesas,scifa";
764 reg = <0 0xe6c50000 0 64>;
765 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
766 clocks = <&cpg CPG_MOD 203>;
767 clock-names = "fck";
768 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
769 <&dmac1 0x25>, <&dmac1 0x26>;
770 dma-names = "tx", "rx", "tx", "rx";
771 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
772 resets = <&cpg 203>;
773 status = "disabled";
774 };
775
776 scifa2: serial@e6c60000 {
777 compatible = "renesas,scifa-r8a7790",
778 "renesas,rcar-gen2-scifa", "renesas,scifa";
779 reg = <0 0xe6c60000 0 64>;
780 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
781 clocks = <&cpg CPG_MOD 202>;
782 clock-names = "fck";
783 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
784 <&dmac1 0x27>, <&dmac1 0x28>;
785 dma-names = "tx", "rx", "tx", "rx";
786 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
787 resets = <&cpg 202>;
788 status = "disabled";
789 };
790
791 scifb0: serial@e6c20000 {
792 compatible = "renesas,scifb-r8a7790",
793 "renesas,rcar-gen2-scifb", "renesas,scifb";
794 reg = <0 0xe6c20000 0 0x100>;
795 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
796 clocks = <&cpg CPG_MOD 206>;
797 clock-names = "fck";
798 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
799 <&dmac1 0x3d>, <&dmac1 0x3e>;
800 dma-names = "tx", "rx", "tx", "rx";
801 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
802 resets = <&cpg 206>;
803 status = "disabled";
804 };
805
806 scifb1: serial@e6c30000 {
807 compatible = "renesas,scifb-r8a7790",
808 "renesas,rcar-gen2-scifb", "renesas,scifb";
809 reg = <0 0xe6c30000 0 0x100>;
810 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&cpg CPG_MOD 207>;
812 clock-names = "fck";
813 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
814 <&dmac1 0x19>, <&dmac1 0x1a>;
815 dma-names = "tx", "rx", "tx", "rx";
816 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
817 resets = <&cpg 207>;
818 status = "disabled";
819 };
820
821 scifb2: serial@e6ce0000 {
822 compatible = "renesas,scifb-r8a7790",
823 "renesas,rcar-gen2-scifb", "renesas,scifb";
824 reg = <0 0xe6ce0000 0 0x100>;
825 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
826 clocks = <&cpg CPG_MOD 216>;
827 clock-names = "fck";
828 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
829 <&dmac1 0x1d>, <&dmac1 0x1e>;
830 dma-names = "tx", "rx", "tx", "rx";
831 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
832 resets = <&cpg 216>;
833 status = "disabled";
834 };
835
836 scif0: serial@e6e60000 {
837 compatible = "renesas,scif-r8a7790",
838 "renesas,rcar-gen2-scif",
839 "renesas,scif";
840 reg = <0 0xe6e60000 0 64>;
841 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
842 clocks = <&cpg CPG_MOD 721>,
843 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
844 clock-names = "fck", "brg_int", "scif_clk";
845 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
846 <&dmac1 0x29>, <&dmac1 0x2a>;
847 dma-names = "tx", "rx", "tx", "rx";
848 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
849 resets = <&cpg 721>;
850 status = "disabled";
851 };
852
853 scif1: serial@e6e68000 {
854 compatible = "renesas,scif-r8a7790",
855 "renesas,rcar-gen2-scif",
856 "renesas,scif";
857 reg = <0 0xe6e68000 0 64>;
858 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
859 clocks = <&cpg CPG_MOD 720>,
860 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
861 clock-names = "fck", "brg_int", "scif_clk";
862 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
863 <&dmac1 0x2d>, <&dmac1 0x2e>;
864 dma-names = "tx", "rx", "tx", "rx";
865 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
866 resets = <&cpg 720>;
867 status = "disabled";
868 };
869
870 scif2: serial@e6e56000 {
871 compatible = "renesas,scif-r8a7790",
872 "renesas,rcar-gen2-scif",
873 "renesas,scif";
874 reg = <0 0xe6e56000 0 64>;
875 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
876 clocks = <&cpg CPG_MOD 310>,
877 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
878 clock-names = "fck", "brg_int", "scif_clk";
879 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
880 <&dmac1 0x2b>, <&dmac1 0x2c>;
881 dma-names = "tx", "rx", "tx", "rx";
882 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
883 resets = <&cpg 310>;
884 status = "disabled";
885 };
886
887 hscif0: serial@e62c0000 {
888 compatible = "renesas,hscif-r8a7790",
889 "renesas,rcar-gen2-hscif", "renesas,hscif";
890 reg = <0 0xe62c0000 0 96>;
891 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
892 clocks = <&cpg CPG_MOD 717>,
893 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
894 clock-names = "fck", "brg_int", "scif_clk";
895 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
896 <&dmac1 0x39>, <&dmac1 0x3a>;
897 dma-names = "tx", "rx", "tx", "rx";
898 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
899 resets = <&cpg 717>;
900 status = "disabled";
901 };
902
903 hscif1: serial@e62c8000 {
904 compatible = "renesas,hscif-r8a7790",
905 "renesas,rcar-gen2-hscif", "renesas,hscif";
906 reg = <0 0xe62c8000 0 96>;
907 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
908 clocks = <&cpg CPG_MOD 716>,
909 <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
910 clock-names = "fck", "brg_int", "scif_clk";
911 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
912 <&dmac1 0x4d>, <&dmac1 0x4e>;
913 dma-names = "tx", "rx", "tx", "rx";
914 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
915 resets = <&cpg 716>;
916 status = "disabled";
917 };
918
919 msiof0: spi@e6e20000 {
920 compatible = "renesas,msiof-r8a7790",
921 "renesas,rcar-gen2-msiof";
922 reg = <0 0xe6e20000 0 0x0064>;
923 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&cpg CPG_MOD 0>;
925 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
926 <&dmac1 0x51>, <&dmac1 0x52>;
927 dma-names = "tx", "rx", "tx", "rx";
928 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
929 resets = <&cpg 0>;
930 #address-cells = <1>;
931 #size-cells = <0>;
932 status = "disabled";
933 };
934
935 msiof1: spi@e6e10000 {
936 compatible = "renesas,msiof-r8a7790",
937 "renesas,rcar-gen2-msiof";
938 reg = <0 0xe6e10000 0 0x0064>;
939 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
940 clocks = <&cpg CPG_MOD 208>;
941 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
942 <&dmac1 0x55>, <&dmac1 0x56>;
943 dma-names = "tx", "rx", "tx", "rx";
944 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
945 resets = <&cpg 208>;
946 #address-cells = <1>;
947 #size-cells = <0>;
948 status = "disabled";
949 };
950
951 msiof2: spi@e6e00000 {
952 compatible = "renesas,msiof-r8a7790",
953 "renesas,rcar-gen2-msiof";
954 reg = <0 0xe6e00000 0 0x0064>;
955 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
956 clocks = <&cpg CPG_MOD 205>;
957 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
958 <&dmac1 0x41>, <&dmac1 0x42>;
959 dma-names = "tx", "rx", "tx", "rx";
960 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
961 resets = <&cpg 205>;
962 #address-cells = <1>;
963 #size-cells = <0>;
964 status = "disabled";
965 };
966
967 msiof3: spi@e6c90000 {
968 compatible = "renesas,msiof-r8a7790",
969 "renesas,rcar-gen2-msiof";
970 reg = <0 0xe6c90000 0 0x0064>;
971 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
972 clocks = <&cpg CPG_MOD 215>;
973 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
974 <&dmac1 0x45>, <&dmac1 0x46>;
975 dma-names = "tx", "rx", "tx", "rx";
976 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
977 resets = <&cpg 215>;
978 #address-cells = <1>;
979 #size-cells = <0>;
980 status = "disabled";
981 };
982
983 can0: can@e6e80000 {
984 compatible = "renesas,can-r8a7790",
985 "renesas,rcar-gen2-can";
986 reg = <0 0xe6e80000 0 0x1000>;
987 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
988 clocks = <&cpg CPG_MOD 916>,
989 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
990 clock-names = "clkp1", "clkp2", "can_clk";
991 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
992 resets = <&cpg 916>;
993 status = "disabled";
994 };
995
996 can1: can@e6e88000 {
997 compatible = "renesas,can-r8a7790",
998 "renesas,rcar-gen2-can";
999 reg = <0 0xe6e88000 0 0x1000>;
1000 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&cpg CPG_MOD 915>,
1002 <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
1003 clock-names = "clkp1", "clkp2", "can_clk";
1004 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1005 resets = <&cpg 915>;
1006 status = "disabled";
1007 };
1008
1009 vin0: video@e6ef0000 {
1010 compatible = "renesas,vin-r8a7790",
1011 "renesas,rcar-gen2-vin";
1012 reg = <0 0xe6ef0000 0 0x1000>;
1013 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1014 clocks = <&cpg CPG_MOD 811>;
1015 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1016 resets = <&cpg 811>;
1017 status = "disabled";
1018 };
1019
1020 vin1: video@e6ef1000 {
1021 compatible = "renesas,vin-r8a7790",
1022 "renesas,rcar-gen2-vin";
1023 reg = <0 0xe6ef1000 0 0x1000>;
1024 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1025 clocks = <&cpg CPG_MOD 810>;
1026 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1027 resets = <&cpg 810>;
1028 status = "disabled";
1029 };
1030
1031 vin2: video@e6ef2000 {
1032 compatible = "renesas,vin-r8a7790",
1033 "renesas,rcar-gen2-vin";
1034 reg = <0 0xe6ef2000 0 0x1000>;
1035 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1036 clocks = <&cpg CPG_MOD 809>;
1037 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1038 resets = <&cpg 809>;
1039 status = "disabled";
1040 };
1041
1042 vin3: video@e6ef3000 {
1043 compatible = "renesas,vin-r8a7790",
1044 "renesas,rcar-gen2-vin";
1045 reg = <0 0xe6ef3000 0 0x1000>;
1046 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1047 clocks = <&cpg CPG_MOD 808>;
1048 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1049 resets = <&cpg 808>;
1050 status = "disabled";
1051 };
1052
1053 rcar_sound: sound@ec500000 {
1054 /*
1055 * #sound-dai-cells is required
1056 *
1057 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1058 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1059 */
1060 compatible = "renesas,rcar_sound-r8a7790",
1061 "renesas,rcar_sound-gen2";
1062 reg = <0 0xec500000 0 0x1000>, /* SCU */
1063 <0 0xec5a0000 0 0x100>, /* ADG */
1064 <0 0xec540000 0 0x1000>, /* SSIU */
1065 <0 0xec541000 0 0x280>, /* SSI */
1066 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1067 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1068
1069 clocks = <&cpg CPG_MOD 1005>,
1070 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1071 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1072 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1073 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1074 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1075 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1076 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1077 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1078 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1079 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1080 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1081 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1082 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1083 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1084 <&cpg CPG_CORE R8A7790_CLK_M2>;
1085 clock-names = "ssi-all",
1086 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1087 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1088 "ssi.1", "ssi.0",
1089 "src.9", "src.8", "src.7", "src.6",
1090 "src.5", "src.4", "src.3", "src.2",
1091 "src.1", "src.0",
1092 "ctu.0", "ctu.1",
1093 "mix.0", "mix.1",
1094 "dvc.0", "dvc.1",
1095 "clk_a", "clk_b", "clk_c", "clk_i";
1096 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1097 resets = <&cpg 1005>,
1098 <&cpg 1006>, <&cpg 1007>,
1099 <&cpg 1008>, <&cpg 1009>,
1100 <&cpg 1010>, <&cpg 1011>,
1101 <&cpg 1012>, <&cpg 1013>,
1102 <&cpg 1014>, <&cpg 1015>;
1103 reset-names = "ssi-all",
1104 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1105 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1106 "ssi.1", "ssi.0";
1107
1108 status = "disabled";
1109
1110 rcar_sound,dvc {
1111 dvc0: dvc-0 {
1112 dmas = <&audma1 0xbc>;
1113 dma-names = "tx";
1114 };
1115 dvc1: dvc-1 {
1116 dmas = <&audma1 0xbe>;
1117 dma-names = "tx";
1118 };
1119 };
1120
1121 rcar_sound,mix {
1122 mix0: mix-0 { };
1123 mix1: mix-1 { };
1124 };
1125
1126 rcar_sound,ctu {
1127 ctu00: ctu-0 { };
1128 ctu01: ctu-1 { };
1129 ctu02: ctu-2 { };
1130 ctu03: ctu-3 { };
1131 ctu10: ctu-4 { };
1132 ctu11: ctu-5 { };
1133 ctu12: ctu-6 { };
1134 ctu13: ctu-7 { };
1135 };
1136
1137 rcar_sound,src {
1138 src0: src-0 {
1139 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1140 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1141 dma-names = "rx", "tx";
1142 };
1143 src1: src-1 {
1144 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1145 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1146 dma-names = "rx", "tx";
1147 };
1148 src2: src-2 {
1149 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1150 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1151 dma-names = "rx", "tx";
1152 };
1153 src3: src-3 {
1154 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1155 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1156 dma-names = "rx", "tx";
1157 };
1158 src4: src-4 {
1159 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1160 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1161 dma-names = "rx", "tx";
1162 };
1163 src5: src-5 {
1164 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1165 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1166 dma-names = "rx", "tx";
1167 };
1168 src6: src-6 {
1169 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1170 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1171 dma-names = "rx", "tx";
1172 };
1173 src7: src-7 {
1174 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1175 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1176 dma-names = "rx", "tx";
1177 };
1178 src8: src-8 {
1179 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1180 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1181 dma-names = "rx", "tx";
1182 };
1183 src9: src-9 {
1184 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1185 dmas = <&audma0 0x97>, <&audma1 0xba>;
1186 dma-names = "rx", "tx";
1187 };
1188 };
1189
1190 rcar_sound,ssi {
1191 ssi0: ssi-0 {
1192 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1193 dmas = <&audma0 0x01>, <&audma1 0x02>,
1194 <&audma0 0x15>, <&audma1 0x16>;
1195 dma-names = "rx", "tx", "rxu", "txu";
1196 };
1197 ssi1: ssi-1 {
1198 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1199 dmas = <&audma0 0x03>, <&audma1 0x04>,
1200 <&audma0 0x49>, <&audma1 0x4a>;
1201 dma-names = "rx", "tx", "rxu", "txu";
1202 };
1203 ssi2: ssi-2 {
1204 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1205 dmas = <&audma0 0x05>, <&audma1 0x06>,
1206 <&audma0 0x63>, <&audma1 0x64>;
1207 dma-names = "rx", "tx", "rxu", "txu";
1208 };
1209 ssi3: ssi-3 {
1210 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1211 dmas = <&audma0 0x07>, <&audma1 0x08>,
1212 <&audma0 0x6f>, <&audma1 0x70>;
1213 dma-names = "rx", "tx", "rxu", "txu";
1214 };
1215 ssi4: ssi-4 {
1216 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1217 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1218 <&audma0 0x71>, <&audma1 0x72>;
1219 dma-names = "rx", "tx", "rxu", "txu";
1220 };
1221 ssi5: ssi-5 {
1222 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1223 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1224 <&audma0 0x73>, <&audma1 0x74>;
1225 dma-names = "rx", "tx", "rxu", "txu";
1226 };
1227 ssi6: ssi-6 {
1228 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1229 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1230 <&audma0 0x75>, <&audma1 0x76>;
1231 dma-names = "rx", "tx", "rxu", "txu";
1232 };
1233 ssi7: ssi-7 {
1234 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1235 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1236 <&audma0 0x79>, <&audma1 0x7a>;
1237 dma-names = "rx", "tx", "rxu", "txu";
1238 };
1239 ssi8: ssi-8 {
1240 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1241 dmas = <&audma0 0x11>, <&audma1 0x12>,
1242 <&audma0 0x7b>, <&audma1 0x7c>;
1243 dma-names = "rx", "tx", "rxu", "txu";
1244 };
1245 ssi9: ssi-9 {
1246 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1247 dmas = <&audma0 0x13>, <&audma1 0x14>,
1248 <&audma0 0x7d>, <&audma1 0x7e>;
1249 dma-names = "rx", "tx", "rxu", "txu";
1250 };
1251 };
1252 };
1253
1254 audma0: dma-controller@ec700000 {
1255 compatible = "renesas,dmac-r8a7790",
1256 "renesas,rcar-dmac";
1257 reg = <0 0xec700000 0 0x10000>;
1258 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1259 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1260 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1261 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1262 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1263 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1264 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1265 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1266 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1267 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1268 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1269 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1270 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1271 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1272 interrupt-names = "error",
1273 "ch0", "ch1", "ch2", "ch3",
1274 "ch4", "ch5", "ch6", "ch7",
1275 "ch8", "ch9", "ch10", "ch11",
1276 "ch12";
1277 clocks = <&cpg CPG_MOD 502>;
1278 clock-names = "fck";
1279 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1280 resets = <&cpg 502>;
1281 #dma-cells = <1>;
1282 dma-channels = <13>;
1283 };
1284
1285 audma1: dma-controller@ec720000 {
1286 compatible = "renesas,dmac-r8a7790",
1287 "renesas,rcar-dmac";
1288 reg = <0 0xec720000 0 0x10000>;
1289 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1290 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1291 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1292 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
1293 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1294 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1295 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1296 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1297 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1298 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1299 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1300 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1301 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1302 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1303 interrupt-names = "error",
1304 "ch0", "ch1", "ch2", "ch3",
1305 "ch4", "ch5", "ch6", "ch7",
1306 "ch8", "ch9", "ch10", "ch11",
1307 "ch12";
1308 clocks = <&cpg CPG_MOD 501>;
1309 clock-names = "fck";
1310 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1311 resets = <&cpg 501>;
1312 #dma-cells = <1>;
1313 dma-channels = <13>;
1314 };
1315
1316 xhci: usb@ee000000 {
1317 compatible = "renesas,xhci-r8a7790",
1318 "renesas,rcar-gen2-xhci";
1319 reg = <0 0xee000000 0 0xc00>;
1320 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1321 clocks = <&cpg CPG_MOD 328>;
1322 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1323 resets = <&cpg 328>;
1324 phys = <&usb2 1>;
1325 phy-names = "usb";
1326 status = "disabled";
1327 };
1328
1329 pci0: pci@ee090000 {
1330 compatible = "renesas,pci-r8a7790",
1331 "renesas,pci-rcar-gen2";
1332 device_type = "pci";
1333 reg = <0 0xee090000 0 0xc00>,
1334 <0 0xee080000 0 0x1100>;
1335 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1336 clocks = <&cpg CPG_MOD 703>;
1337 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1338 resets = <&cpg 703>;
1339 status = "disabled";
1340
1341 bus-range = <0 0>;
1342 #address-cells = <3>;
1343 #size-cells = <2>;
1344 #interrupt-cells = <1>;
1345 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1346 interrupt-map-mask = <0xff00 0 0 0x7>;
1347 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1348 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1349 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1350
1351 usb@1,0 {
1352 reg = <0x800 0 0 0 0>;
1353 phys = <&usb0 0>;
1354 phy-names = "usb";
1355 };
1356
1357 usb@2,0 {
1358 reg = <0x1000 0 0 0 0>;
1359 phys = <&usb0 0>;
1360 phy-names = "usb";
1361 };
1362 };
1363
1364 pci1: pci@ee0b0000 {
1365 compatible = "renesas,pci-r8a7790",
1366 "renesas,pci-rcar-gen2";
1367 device_type = "pci";
1368 reg = <0 0xee0b0000 0 0xc00>,
1369 <0 0xee0a0000 0 0x1100>;
1370 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1371 clocks = <&cpg CPG_MOD 703>;
1372 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1373 resets = <&cpg 703>;
1374 status = "disabled";
1375
1376 bus-range = <1 1>;
1377 #address-cells = <3>;
1378 #size-cells = <2>;
1379 #interrupt-cells = <1>;
1380 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1381 interrupt-map-mask = <0xff00 0 0 0x7>;
1382 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1383 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1384 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1385 };
1386
1387 pci2: pci@ee0d0000 {
1388 compatible = "renesas,pci-r8a7790",
1389 "renesas,pci-rcar-gen2";
1390 device_type = "pci";
1391 clocks = <&cpg CPG_MOD 703>;
1392 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1393 resets = <&cpg 703>;
1394 reg = <0 0xee0d0000 0 0xc00>,
1395 <0 0xee0c0000 0 0x1100>;
1396 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1397 status = "disabled";
1398
1399 bus-range = <2 2>;
1400 #address-cells = <3>;
1401 #size-cells = <2>;
1402 #interrupt-cells = <1>;
1403 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1404 interrupt-map-mask = <0xff00 0 0 0x7>;
1405 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1406 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1407 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1408
1409 usb@1,0 {
1410 reg = <0x20800 0 0 0 0>;
1411 phys = <&usb2 0>;
1412 phy-names = "usb";
1413 };
1414
1415 usb@2,0 {
1416 reg = <0x21000 0 0 0 0>;
1417 phys = <&usb2 0>;
1418 phy-names = "usb";
1419 };
1420 };
1421
1422 sdhi0: sd@ee100000 {
1423 compatible = "renesas,sdhi-r8a7790",
1424 "renesas,rcar-gen2-sdhi";
1425 reg = <0 0xee100000 0 0x328>;
1426 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1427 clocks = <&cpg CPG_MOD 314>;
1428 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1429 <&dmac1 0xcd>, <&dmac1 0xce>;
1430 dma-names = "tx", "rx", "tx", "rx";
1431 max-frequency = <195000000>;
1432 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1433 resets = <&cpg 314>;
1434 status = "disabled";
1435 };
1436
1437 sdhi1: sd@ee120000 {
1438 compatible = "renesas,sdhi-r8a7790",
1439 "renesas,rcar-gen2-sdhi";
1440 reg = <0 0xee120000 0 0x328>;
1441 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1442 clocks = <&cpg CPG_MOD 313>;
1443 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
1444 <&dmac1 0xc9>, <&dmac1 0xca>;
1445 dma-names = "tx", "rx", "tx", "rx";
1446 max-frequency = <195000000>;
1447 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1448 resets = <&cpg 313>;
1449 status = "disabled";
1450 };
1451
1452 sdhi2: sd@ee140000 {
1453 compatible = "renesas,sdhi-r8a7790",
1454 "renesas,rcar-gen2-sdhi";
1455 reg = <0 0xee140000 0 0x100>;
1456 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1457 clocks = <&cpg CPG_MOD 312>;
1458 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1459 <&dmac1 0xc1>, <&dmac1 0xc2>;
1460 dma-names = "tx", "rx", "tx", "rx";
1461 max-frequency = <97500000>;
1462 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1463 resets = <&cpg 312>;
1464 status = "disabled";
1465 };
1466
1467 sdhi3: sd@ee160000 {
1468 compatible = "renesas,sdhi-r8a7790",
1469 "renesas,rcar-gen2-sdhi";
1470 reg = <0 0xee160000 0 0x100>;
1471 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1472 clocks = <&cpg CPG_MOD 311>;
1473 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1474 <&dmac1 0xd3>, <&dmac1 0xd4>;
1475 dma-names = "tx", "rx", "tx", "rx";
1476 max-frequency = <97500000>;
1477 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1478 resets = <&cpg 311>;
1479 status = "disabled";
1480 };
1481
1482 mmcif0: mmc@ee200000 {
1483 compatible = "renesas,mmcif-r8a7790",
1484 "renesas,sh-mmcif";
1485 reg = <0 0xee200000 0 0x80>;
1486 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1487 clocks = <&cpg CPG_MOD 315>;
1488 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1489 <&dmac1 0xd1>, <&dmac1 0xd2>;
1490 dma-names = "tx", "rx", "tx", "rx";
1491 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1492 resets = <&cpg 315>;
1493 reg-io-width = <4>;
1494 status = "disabled";
1495 max-frequency = <97500000>;
1496 };
1497
1498 mmcif1: mmc@ee220000 {
1499 compatible = "renesas,mmcif-r8a7790",
1500 "renesas,sh-mmcif";
1501 reg = <0 0xee220000 0 0x80>;
1502 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1503 clocks = <&cpg CPG_MOD 305>;
1504 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
1505 <&dmac1 0xe1>, <&dmac1 0xe2>;
1506 dma-names = "tx", "rx", "tx", "rx";
1507 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1508 resets = <&cpg 305>;
1509 reg-io-width = <4>;
1510 status = "disabled";
1511 max-frequency = <97500000>;
1512 };
1513
1514 sata0: sata@ee300000 {
1515 compatible = "renesas,sata-r8a7790",
1516 "renesas,rcar-gen2-sata";
1517 reg = <0 0xee300000 0 0x2000>;
1518 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1519 clocks = <&cpg CPG_MOD 815>;
1520 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1521 resets = <&cpg 815>;
1522 status = "disabled";
1523 };
1524
1525 sata1: sata@ee500000 {
1526 compatible = "renesas,sata-r8a7790",
1527 "renesas,rcar-gen2-sata";
1528 reg = <0 0xee500000 0 0x2000>;
1529 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1530 clocks = <&cpg CPG_MOD 814>;
1531 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1532 resets = <&cpg 814>;
1533 status = "disabled";
1534 };
1535
1536 ether: ethernet@ee700000 {
1537 compatible = "renesas,ether-r8a7790",
1538 "renesas,rcar-gen2-ether";
1539 reg = <0 0xee700000 0 0x400>;
1540 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1541 clocks = <&cpg CPG_MOD 813>;
1542 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1543 resets = <&cpg 813>;
1544 phy-mode = "rmii";
1545 #address-cells = <1>;
1546 #size-cells = <0>;
1547 status = "disabled";
1548 };
1549
1550 gic: interrupt-controller@f1001000 {
1551 compatible = "arm,gic-400";
1552 #interrupt-cells = <3>;
1553 #address-cells = <0>;
1554 interrupt-controller;
1555 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1556 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1557 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
1558 clocks = <&cpg CPG_MOD 408>;
1559 clock-names = "clk";
1560 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1561 resets = <&cpg 408>;
1562 };
1563
1564 pciec: pcie@fe000000 {
1565 compatible = "renesas,pcie-r8a7790",
1566 "renesas,pcie-rcar-gen2";
1567 reg = <0 0xfe000000 0 0x80000>;
1568 #address-cells = <3>;
1569 #size-cells = <2>;
1570 bus-range = <0x00 0xff>;
1571 device_type = "pci";
1572 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1573 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1574 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1575 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1576 /* Map all possible DDR as inbound ranges */
1577 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1578 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1579 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1580 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1581 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1582 #interrupt-cells = <1>;
1583 interrupt-map-mask = <0 0 0 0>;
1584 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1585 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1586 clock-names = "pcie", "pcie_bus";
1587 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1588 resets = <&cpg 319>;
1589 status = "disabled";
1590 };
1591
1592 vsp@fe920000 {
1593 compatible = "renesas,vsp1";
1594 reg = <0 0xfe920000 0 0x8000>;
1595 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1596 clocks = <&cpg CPG_MOD 130>;
1597 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1598 resets = <&cpg 130>;
1599 };
1600
1601 vsp@fe928000 {
1602 compatible = "renesas,vsp1";
1603 reg = <0 0xfe928000 0 0x8000>;
1604 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1605 clocks = <&cpg CPG_MOD 131>;
1606 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1607 resets = <&cpg 131>;
1608 };
1609
1610 vsp@fe930000 {
1611 compatible = "renesas,vsp1";
1612 reg = <0 0xfe930000 0 0x8000>;
1613 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1614 clocks = <&cpg CPG_MOD 128>;
1615 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1616 resets = <&cpg 128>;
1617 };
1618
1619 vsp@fe938000 {
1620 compatible = "renesas,vsp1";
1621 reg = <0 0xfe938000 0 0x8000>;
1622 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1623 clocks = <&cpg CPG_MOD 127>;
1624 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1625 resets = <&cpg 127>;
1626 };
1627
1628 fdp1@fe940000 {
1629 compatible = "renesas,fdp1";
1630 reg = <0 0xfe940000 0 0x2400>;
1631 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1632 clocks = <&cpg CPG_MOD 119>;
1633 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1634 resets = <&cpg 119>;
1635 };
1636
1637 fdp1@fe944000 {
1638 compatible = "renesas,fdp1";
1639 reg = <0 0xfe944000 0 0x2400>;
1640 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1641 clocks = <&cpg CPG_MOD 118>;
1642 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1643 resets = <&cpg 118>;
1644 };
1645
1646 fdp1@fe948000 {
1647 compatible = "renesas,fdp1";
1648 reg = <0 0xfe948000 0 0x2400>;
1649 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1650 clocks = <&cpg CPG_MOD 117>;
1651 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1652 resets = <&cpg 117>;
1653 };
1654
1655 jpu: jpeg-codec@fe980000 {
1656 compatible = "renesas,jpu-r8a7790",
1657 "renesas,rcar-gen2-jpu";
1658 reg = <0 0xfe980000 0 0x10300>;
1659 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1660 clocks = <&cpg CPG_MOD 106>;
1661 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1662 resets = <&cpg 106>;
1663 };
1664
1665 du: display@feb00000 {
1666 compatible = "renesas,du-r8a7790";
1667 reg = <0 0xfeb00000 0 0x70000>,
1668 <0 0xfeb90000 0 0x1c>,
1669 <0 0xfeb94000 0 0x1c>;
1670 reg-names = "du", "lvds.0", "lvds.1";
1671 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1672 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1673 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1674 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1675 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
1676 <&cpg CPG_MOD 725>;
1677 clock-names = "du.0", "du.1", "du.2", "lvds.0",
1678 "lvds.1";
1679 status = "disabled";
1680
1681 ports {
1682 #address-cells = <1>;
1683 #size-cells = <0>;
1684
1685 port@0 {
1686 reg = <0>;
1687 du_out_rgb: endpoint {
1688 };
1689 };
1690 port@1 {
1691 reg = <1>;
1692 du_out_lvds0: endpoint {
1693 };
1694 };
1695 port@2 {
1696 reg = <2>;
1697 du_out_lvds1: endpoint {
1698 };
1699 };
1700 };
1701 };
1702
1703 prr: chipid@ff000044 {
1704 compatible = "renesas,prr";
1705 reg = <0 0xff000044 0 4>;
1706 };
1707
1708 cmt0: timer@ffca0000 {
1709 compatible = "renesas,r8a7790-cmt0",
1710 "renesas,rcar-gen2-cmt0";
1711 reg = <0 0xffca0000 0 0x1004>;
1712 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1713 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1714 clocks = <&cpg CPG_MOD 124>;
1715 clock-names = "fck";
1716 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1717 resets = <&cpg 124>;
1718
1719 status = "disabled";
1720 };
1721
1722 cmt1: timer@e6130000 {
1723 compatible = "renesas,r8a7790-cmt1",
1724 "renesas,rcar-gen2-cmt1";
1725 reg = <0 0xe6130000 0 0x1004>;
1726 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1727 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1728 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1729 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1730 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1731 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1732 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1733 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1734 clocks = <&cpg CPG_MOD 329>;
1735 clock-names = "fck";
1736 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1737 resets = <&cpg 329>;
1738
1739 status = "disabled";
1740 };
1741 };
1742
1743 thermal-zones {
1744 cpu_thermal: cpu-thermal {
1745 polling-delay-passive = <0>;
1746 polling-delay = <0>;
1747
1748 thermal-sensors = <&thermal>;
1749
1750 trips {
1751 cpu-crit {
1752 temperature = <95000>;
1753 hysteresis = <0>;
1754 type = "critical";
1755 };
1756 };
1757 cooling-maps {
1758 };
1759 };
1760 };
1761
1762 timer {
1763 compatible = "arm,armv7-timer";
1764 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1765 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1766 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
1767 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
1768 };
1769
1770 /* External USB clock - can be overridden by the board */
1771 usb_extal_clk: usb_extal {
1772 compatible = "fixed-clock";
1773 #clock-cells = <0>;
1774 clock-frequency = <48000000>;
1775 };
1776 };
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