arch/arm/boot/dts/r8a7790.dtsi

   1 /*
   2  * Device Tree Source for the r8a7790 SoC
   3  *
   4  * Copyright (C) 2013 Renesas Solutions Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 / {
  12         compatible = "renesas,r8a7790";
  13         interrupt-parent = <&gic>;
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         cpus {
  18                 #address-cells = <1>;
  19                 #size-cells = <0>;
  20
  21                 cpu0: cpu@0 {
  22                         device_type = "cpu";
  23                         compatible = "arm,cortex-a15";
  24                         reg = <0>;
  25                         clock-frequency = <1300000000>;
  26                 };
  27
  28                 cpu1: cpu@1 {
  29                         device_type = "cpu";
  30                         compatible = "arm,cortex-a15";
  31                         reg = <1>;
  32                         clock-frequency = <1300000000>;
  33                 };
  34
  35                 cpu2: cpu@2 {
  36                         device_type = "cpu";
  37                         compatible = "arm,cortex-a15";
  38                         reg = <2>;
  39                         clock-frequency = <1300000000>;
  40                 };
  41
  42                 cpu3: cpu@3 {
  43                         device_type = "cpu";
  44                         compatible = "arm,cortex-a15";
  45                         reg = <3>;
  46                         clock-frequency = <1300000000>;
  47                 };
  48
  49                 cpu4: cpu@4 {
  50                         device_type = "cpu";
  51                         compatible = "arm,cortex-a7";
  52                         reg = <0x100>;
  53                         clock-frequency = <780000000>;
  54                 };
  55
  56                 cpu5: cpu@5 {
  57                         device_type = "cpu";
  58                         compatible = "arm,cortex-a7";
  59                         reg = <0x101>;
  60                         clock-frequency = <780000000>;
  61                 };
  62
  63                 cpu6: cpu@6 {
  64                         device_type = "cpu";
  65                         compatible = "arm,cortex-a7";
  66                         reg = <0x102>;
  67                         clock-frequency = <780000000>;
  68                 };
  69
  70                 cpu7: cpu@7 {
  71                         device_type = "cpu";
  72                         compatible = "arm,cortex-a7";
  73                         reg = <0x103>;
  74                         clock-frequency = <780000000>;
  75                 };
  76         };
  77
  78         gic: interrupt-controller@f1001000 {
  79                 compatible = "arm,cortex-a15-gic";
  80                 #interrupt-cells = <3>;
  81                 #address-cells = <0>;
  82                 interrupt-controller;
  83                 reg = <0 0xf1001000 0 0x1000>,
  84                         <0 0xf1002000 0 0x1000>,
  85                         <0 0xf1004000 0 0x2000>,
  86                         <0 0xf1006000 0 0x2000>;
  87                 interrupts = <1 9 0xf04>;
  88         };
  89
  90         gpio0: gpio@ffc40000 {
  91                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
  92                 reg = <0 0xffc40000 0 0x2c>;
  93                 interrupt-parent = <&gic>;
  94                 interrupts = <0 4 0x4>;
  95                 #gpio-cells = <2>;
  96                 gpio-controller;
  97                 gpio-ranges = <&pfc 0 0 32>;
  98                 #interrupt-cells = <2>;
  99                 interrupt-controller;
 100         };
 101
 102         gpio1: gpio@ffc41000 {
 103                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
 104                 reg = <0 0xffc41000 0 0x2c>;
 105                 interrupt-parent = <&gic>;
 106                 interrupts = <0 5 0x4>;
 107                 #gpio-cells = <2>;
 108                 gpio-controller;
 109                 gpio-ranges = <&pfc 0 32 32>;
 110                 #interrupt-cells = <2>;
 111                 interrupt-controller;
 112         };
 113
 114         gpio2: gpio@ffc42000 {
 115                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
 116                 reg = <0 0xffc42000 0 0x2c>;
 117                 interrupt-parent = <&gic>;
 118                 interrupts = <0 6 0x4>;
 119                 #gpio-cells = <2>;
 120                 gpio-controller;
 121                 gpio-ranges = <&pfc 0 64 32>;
 122                 #interrupt-cells = <2>;
 123                 interrupt-controller;
 124         };
 125
 126         gpio3: gpio@ffc43000 {
 127                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
 128                 reg = <0 0xffc43000 0 0x2c>;
 129                 interrupt-parent = <&gic>;
 130                 interrupts = <0 7 0x4>;
 131                 #gpio-cells = <2>;
 132                 gpio-controller;
 133                 gpio-ranges = <&pfc 0 96 32>;
 134                 #interrupt-cells = <2>;
 135                 interrupt-controller;
 136         };
 137
 138         gpio4: gpio@ffc44000 {
 139                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
 140                 reg = <0 0xffc44000 0 0x2c>;
 141                 interrupt-parent = <&gic>;
 142                 interrupts = <0 8 0x4>;
 143                 #gpio-cells = <2>;
 144                 gpio-controller;
 145                 gpio-ranges = <&pfc 0 128 32>;
 146                 #interrupt-cells = <2>;
 147                 interrupt-controller;
 148         };
 149
 150         gpio5: gpio@ffc45000 {
 151                 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
 152                 reg = <0 0xffc45000 0 0x2c>;
 153                 interrupt-parent = <&gic>;
 154                 interrupts = <0 9 0x4>;
 155                 #gpio-cells = <2>;
 156                 gpio-controller;
 157                 gpio-ranges = <&pfc 0 160 32>;
 158                 #interrupt-cells = <2>;
 159                 interrupt-controller;
 160         };
 161
 162         timer {
 163                 compatible = "arm,armv7-timer";
 164                 interrupts = <1 13 0xf08>,
 165                                 <1 14 0xf08>,
 166                                 <1 11 0xf08>,
 167                                 <1 10 0xf08>;
 168         };
 169
 170         irqc0: interrupt-controller@e61c0000 {
 171                 compatible = "renesas,irqc";
 172                 #interrupt-cells = <2>;
 173                 interrupt-controller;
 174                 reg = <0 0xe61c0000 0 0x200>;
 175                 interrupt-parent = <&gic>;
 176                 interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
 177         };
 178
 179         i2c0: i2c@e6508000 {
 180                 #address-cells = <1>;
 181                 #size-cells = <0>;
 182                 compatible = "renesas,i2c-r8a7790";
 183                 reg = <0 0xe6508000 0 0x40>;
 184                 interrupt-parent = <&gic>;
 185                 interrupts = <0 287 0x4>;
 186                 status = "disabled";
 187         };
 188
 189         i2c1: i2c@e6518000 {
 190                 #address-cells = <1>;
 191                 #size-cells = <0>;
 192                 compatible = "renesas,i2c-r8a7790";
 193                 reg = <0 0xe6518000 0 0x40>;
 194                 interrupt-parent = <&gic>;
 195                 interrupts = <0 288 0x4>;
 196                 status = "disabled";
 197         };
 198
 199         i2c2: i2c@e6530000 {
 200                 #address-cells = <1>;
 201                 #size-cells = <0>;
 202                 compatible = "renesas,i2c-r8a7790";
 203                 reg = <0 0xe6530000 0 0x40>;
 204                 interrupt-parent = <&gic>;
 205                 interrupts = <0 286 0x4>;
 206                 status = "disabled";
 207         };
 208
 209         i2c3: i2c@e6540000 {
 210                 #address-cells = <1>;
 211                 #size-cells = <0>;
 212                 compatible = "renesas,i2c-r8a7790";
 213                 reg = <0 0xe6540000 0 0x40>;
 214                 interrupt-parent = <&gic>;
 215                 interrupts = <0 290 0x4>;
 216                 status = "disabled";
 217         };
 218
 219         mmcif0: mmcif@ee200000 {
 220                 compatible = "renesas,sh-mmcif";
 221                 reg = <0 0xee200000 0 0x80>;
 222                 interrupt-parent = <&gic>;
 223                 interrupts = <0 169 0x4>;
 224                 reg-io-width = <4>;
 225                 status = "disabled";
 226         };
 227
 228         mmcif1: mmcif@ee220000 {
 229                 compatible = "renesas,sh-mmcif";
 230                 reg = <0 0xee220000 0 0x80>;
 231                 interrupt-parent = <&gic>;
 232                 interrupts = <0 170 0x4>;
 233                 reg-io-width = <4>;
 234                 status = "disabled";
 235         };
 236
 237         pfc: pfc@e6060000 {
 238                 compatible = "renesas,pfc-r8a7790";
 239                 reg = <0 0xe6060000 0 0x250>;
 240         };
 241
 242         sdhi0: sdhi@ee100000 {
 243                 compatible = "renesas,sdhi-r8a7790";
 244                 reg = <0 0xee100000 0 0x100>;
 245                 interrupt-parent = <&gic>;
 246                 interrupts = <0 165 4>;
 247                 cap-sd-highspeed;
 248                 status = "disabled";
 249         };
 250
 251         sdhi1: sdhi@ee120000 {
 252                 compatible = "renesas,sdhi-r8a7790";
 253                 reg = <0 0xee120000 0 0x100>;
 254                 interrupt-parent = <&gic>;
 255                 interrupts = <0 166 4>;
 256                 cap-sd-highspeed;
 257                 status = "disabled";
 258         };
 259
 260         sdhi2: sdhi@ee140000 {
 261                 compatible = "renesas,sdhi-r8a7790";
 262                 reg = <0 0xee140000 0 0x100>;
 263                 interrupt-parent = <&gic>;
 264                 interrupts = <0 167 4>;
 265                 cap-sd-highspeed;
 266                 status = "disabled";
 267         };
 268
 269         sdhi3: sdhi@ee160000 {
 270                 compatible = "renesas,sdhi-r8a7790";
 271                 reg = <0 0xee160000 0 0x100>;
 272                 interrupt-parent = <&gic>;
 273                 interrupts = <0 168 4>;
 274                 cap-sd-highspeed;
 275                 status = "disabled";
 276         };
 277 };