2 * Device Tree Source for the r8a7790 SoC
4 * Copyright (C) 2013 Renesas Solutions Corp.
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
15 compatible = "renesas,r8a7790";
16 interrupt-parent = <&gic>;
26 compatible = "arm,cortex-a15";
28 clock-frequency = <1300000000>;
33 compatible = "arm,cortex-a15";
35 clock-frequency = <1300000000>;
40 compatible = "arm,cortex-a15";
42 clock-frequency = <1300000000>;
47 compatible = "arm,cortex-a15";
49 clock-frequency = <1300000000>;
54 compatible = "arm,cortex-a7";
56 clock-frequency = <780000000>;
61 compatible = "arm,cortex-a7";
63 clock-frequency = <780000000>;
68 compatible = "arm,cortex-a7";
70 clock-frequency = <780000000>;
75 compatible = "arm,cortex-a7";
77 clock-frequency = <780000000>;
81 gic: interrupt-controller@f1001000 {
82 compatible = "arm,cortex-a15-gic";
83 #interrupt-cells = <3>;
86 reg = <0 0xf1001000 0 0x1000>,
87 <0 0xf1002000 0 0x1000>,
88 <0 0xf1004000 0 0x2000>,
89 <0 0xf1006000 0 0x2000>;
90 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
93 gpio0: gpio@ffc40000 {
94 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
95 reg = <0 0xffc40000 0 0x2c>;
96 interrupt-parent = <&gic>;
97 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
100 gpio-ranges = <&pfc 0 0 32>;
101 #interrupt-cells = <2>;
102 interrupt-controller;
105 gpio1: gpio@ffc41000 {
106 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
107 reg = <0 0xffc41000 0 0x2c>;
108 interrupt-parent = <&gic>;
109 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
112 gpio-ranges = <&pfc 0 32 32>;
113 #interrupt-cells = <2>;
114 interrupt-controller;
117 gpio2: gpio@ffc42000 {
118 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
119 reg = <0 0xffc42000 0 0x2c>;
120 interrupt-parent = <&gic>;
121 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
124 gpio-ranges = <&pfc 0 64 32>;
125 #interrupt-cells = <2>;
126 interrupt-controller;
129 gpio3: gpio@ffc43000 {
130 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
131 reg = <0 0xffc43000 0 0x2c>;
132 interrupt-parent = <&gic>;
133 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
136 gpio-ranges = <&pfc 0 96 32>;
137 #interrupt-cells = <2>;
138 interrupt-controller;
141 gpio4: gpio@ffc44000 {
142 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
143 reg = <0 0xffc44000 0 0x2c>;
144 interrupt-parent = <&gic>;
145 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
148 gpio-ranges = <&pfc 0 128 32>;
149 #interrupt-cells = <2>;
150 interrupt-controller;
153 gpio5: gpio@ffc45000 {
154 compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
155 reg = <0 0xffc45000 0 0x2c>;
156 interrupt-parent = <&gic>;
157 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
160 gpio-ranges = <&pfc 0 160 32>;
161 #interrupt-cells = <2>;
162 interrupt-controller;
166 compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
167 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
168 interrupt-parent = <&gic>;
169 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
173 compatible = "arm,armv7-timer";
174 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
175 <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
176 <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
177 <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
180 irqc0: interrupt-controller@e61c0000 {
181 compatible = "renesas,irqc";
182 #interrupt-cells = <2>;
183 interrupt-controller;
184 reg = <0 0xe61c0000 0 0x200>;
185 interrupt-parent = <&gic>;
186 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
187 <0 1 IRQ_TYPE_LEVEL_HIGH>,
188 <0 2 IRQ_TYPE_LEVEL_HIGH>,
189 <0 3 IRQ_TYPE_LEVEL_HIGH>;
193 #address-cells = <1>;
195 compatible = "renesas,i2c-r8a7790";
196 reg = <0 0xe6508000 0 0x40>;
197 interrupt-parent = <&gic>;
198 interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
203 #address-cells = <1>;
205 compatible = "renesas,i2c-r8a7790";
206 reg = <0 0xe6518000 0 0x40>;
207 interrupt-parent = <&gic>;
208 interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
213 #address-cells = <1>;
215 compatible = "renesas,i2c-r8a7790";
216 reg = <0 0xe6530000 0 0x40>;
217 interrupt-parent = <&gic>;
218 interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
223 #address-cells = <1>;
225 compatible = "renesas,i2c-r8a7790";
226 reg = <0 0xe6540000 0 0x40>;
227 interrupt-parent = <&gic>;
228 interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
232 mmcif0: mmcif@ee200000 {
233 compatible = "renesas,sh-mmcif";
234 reg = <0 0xee200000 0 0x80>;
235 interrupt-parent = <&gic>;
236 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
241 mmcif1: mmc@ee220000 {
242 compatible = "renesas,sh-mmcif";
243 reg = <0 0xee220000 0 0x80>;
244 interrupt-parent = <&gic>;
245 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
251 compatible = "renesas,pfc-r8a7790";
252 reg = <0 0xe6060000 0 0x250>;
256 compatible = "renesas,sdhi-r8a7790";
257 reg = <0 0xee100000 0 0x100>;
258 interrupt-parent = <&gic>;
259 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
265 compatible = "renesas,sdhi-r8a7790";
266 reg = <0 0xee120000 0 0x100>;
267 interrupt-parent = <&gic>;
268 interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
274 compatible = "renesas,sdhi-r8a7790";
275 reg = <0 0xee140000 0 0x100>;
276 interrupt-parent = <&gic>;
277 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
283 compatible = "renesas,sdhi-r8a7790";
284 reg = <0 0xee160000 0 0x100>;
285 interrupt-parent = <&gic>;
286 interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;