arch/arm/boot/dts/r8a7791-henninger.dts

   1 /*
   2  * Device Tree Source for the Henninger board
   3  *
   4  * Copyright (C) 2014 Renesas Solutions Corp.
   5  * Copyright (C) 2014 Cogent Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 /dts-v1/;
  13 #include "r8a7791.dtsi"
  14 #include <dt-bindings/gpio/gpio.h>
  15
  16 / {
  17         model = "Henninger";
  18         compatible = "renesas,henninger", "renesas,r8a7791";
  19
  20         aliases {
  21                 serial0 = &scif0;
  22         };
  23
  24         chosen {
  25                 bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
  26         };
  27
  28         memory@40000000 {
  29                 device_type = "memory";
  30                 reg = <0 0x40000000 0 0x40000000>;
  31         };
  32
  33         memory@200000000 {
  34                 device_type = "memory";
  35                 reg = <2 0x00000000 0 0x40000000>;
  36         };
  37
  38         vcc_sdhi0: regulator@0 {
  39                 compatible = "regulator-fixed";
  40
  41                 regulator-name = "SDHI0 Vcc";
  42                 regulator-min-microvolt = <3300000>;
  43                 regulator-max-microvolt = <3300000>;
  44                 regulator-always-on;
  45         };
  46
  47         vccq_sdhi0: regulator@1 {
  48                 compatible = "regulator-gpio";
  49
  50                 regulator-name = "SDHI0 VccQ";
  51                 regulator-min-microvolt = <1800000>;
  52                 regulator-max-microvolt = <3300000>;
  53
  54                 gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
  55                 gpios-states = <1>;
  56                 states = <3300000 1
  57                           1800000 0>;
  58         };
  59
  60         vcc_sdhi2: regulator@2 {
  61                 compatible = "regulator-fixed";
  62
  63                 regulator-name = "SDHI2 Vcc";
  64                 regulator-min-microvolt = <3300000>;
  65                 regulator-max-microvolt = <3300000>;
  66                 regulator-always-on;
  67         };
  68
  69         vccq_sdhi2: regulator@3 {
  70                 compatible = "regulator-gpio";
  71
  72                 regulator-name = "SDHI2 VccQ";
  73                 regulator-min-microvolt = <1800000>;
  74                 regulator-max-microvolt = <3300000>;
  75
  76                 gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
  77                 gpios-states = <1>;
  78                 states = <3300000 1
  79                           1800000 0>;
  80         };
  81 };
  82
  83 &extal_clk {
  84         clock-frequency = <20000000>;
  85 };
  86
  87 &pfc {
  88         scif0_pins: serial0 {
  89                 renesas,groups = "scif0_data_d";
  90                 renesas,function = "scif0";
  91         };
  92
  93         ether_pins: ether {
  94                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
  95                 renesas,function = "eth";
  96         };
  97
  98         phy1_pins: phy1 {
  99                 renesas,groups = "intc_irq0";
 100                 renesas,function = "intc";
 101         };
 102
 103         sdhi0_pins: sd0 {
 104                 renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
 105                 renesas,function = "sdhi0";
 106         };
 107
 108         sdhi2_pins: sd2 {
 109                 renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
 110                 renesas,function = "sdhi2";
 111         };
 112
 113         i2c2_pins: i2c2 {
 114                 renesas,groups = "i2c2";
 115                 renesas,function = "i2c2";
 116         };
 117
 118         qspi_pins: spi0 {
 119                 renesas,groups = "qspi_ctrl", "qspi_data4";
 120                 renesas,function = "qspi";
 121         };
 122
 123         msiof0_pins: spi1 {
 124                 renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
 125                                  "msiof0_tx";
 126                 renesas,function = "msiof0";
 127         };
 128
 129         usb0_pins: usb0 {
 130                 renesas,groups = "usb0";
 131                 renesas,function = "usb0";
 132         };
 133
 134         usb1_pins: usb1 {
 135                 renesas,groups = "usb1";
 136                 renesas,function = "usb1";
 137         };
 138 };
 139
 140 &scif0 {
 141         pinctrl-0 = <&scif0_pins>;
 142         pinctrl-names = "default";
 143
 144         status = "okay";
 145 };
 146
 147 &ether {
 148         pinctrl-0 = <&ether_pins &phy1_pins>;
 149         pinctrl-names = "default";
 150
 151         phy-handle = <&phy1>;
 152         renesas,ether-link-active-low;
 153         status = "ok";
 154
 155         phy1: ethernet-phy@1 {
 156                 reg = <1>;
 157                 interrupt-parent = <&irqc0>;
 158                 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 159                 micrel,led-mode = <1>;
 160         };
 161 };
 162
 163 &sata0 {
 164         status = "okay";
 165 };
 166
 167 &sdhi0 {
 168         pinctrl-0 = <&sdhi0_pins>;
 169         pinctrl-names = "default";
 170
 171         vmmc-supply = <&vcc_sdhi0>;
 172         vqmmc-supply = <&vccq_sdhi0>;
 173         cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
 174         wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
 175         status = "okay";
 176 };
 177
 178 &sdhi2 {
 179         pinctrl-0 = <&sdhi2_pins>;
 180         pinctrl-names = "default";
 181
 182         vmmc-supply = <&vcc_sdhi2>;
 183         vqmmc-supply = <&vccq_sdhi2>;
 184         cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
 185         status = "okay";
 186 };
 187
 188 &i2c2 {
 189         pinctrl-0 = <&i2c2_pins>;
 190         pinctrl-names = "default";
 191
 192         status = "okay";
 193         clock-frequency = <400000>;
 194 };
 195
 196 &qspi {
 197         pinctrl-0 = <&qspi_pins>;
 198         pinctrl-names = "default";
 199
 200         status = "okay";
 201
 202         flash@0 {
 203                 #address-cells = <1>;
 204                 #size-cells = <1>;
 205                 compatible = "spansion,s25fl512s";
 206                 reg = <0>;
 207                 spi-max-frequency = <30000000>;
 208                 spi-tx-bus-width = <4>;
 209                 spi-rx-bus-width = <4>;
 210                 m25p,fast-read;
 211
 212                 partition@0 {
 213                         label = "loader_prg";
 214                         reg = <0x00000000 0x00040000>;
 215                         read-only;
 216                 };
 217                 partition@40000 {
 218                         label = "user_prg";
 219                         reg = <0x00040000 0x00400000>;
 220                         read-only;
 221                 };
 222                 partition@440000 {
 223                         label = "flash_fs";
 224                         reg = <0x00440000 0x03bc0000>;
 225                 };
 226         };
 227 };
 228
 229 &msiof0 {
 230         pinctrl-0 = <&msiof0_pins>;
 231         pinctrl-names = "default";
 232
 233         status = "okay";
 234
 235         pmic@0 {
 236                 compatible = "renesas,r2a11302ft";
 237                 reg = <0>;
 238                 spi-max-frequency = <6000000>;
 239                 spi-cpol;
 240                 spi-cpha;
 241         };
 242 };
 243
 244 &pci0 {
 245         status = "okay";
 246         pinctrl-0 = <&usb0_pins>;
 247         pinctrl-names = "default";
 248 };
 249
 250 &pci1 {
 251         status = "okay";
 252         pinctrl-0 = <&usb1_pins>;
 253         pinctrl-names = "default";
 254 };
 255
 256 &pcie_bus_clk {
 257         status = "okay";
 258 };
 259
 260 &pciec {
 261         status = "okay";
 262 };