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Merge tag 'mips_fixes_5.1_1' into mips-next
[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / r8a7794.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 * Copyright (C) 2014 Ulrich Hecht
7 */
8
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
13
14 / {
15 compatible = "renesas,r8a7794";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 i2c7 = &i2c7;
28 spi0 = &qspi;
29 vin0 = &vin0;
30 vin1 = &vin1;
31 };
32
33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clka: audio_clka {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
43 audio_clkb: audio_clkb {
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <0>;
47 };
48 audio_clkc: audio_clkc {
49 compatible = "fixed-clock";
50 #clock-cells = <0>;
51 clock-frequency = <0>;
52 };
53
54 /* External CAN clock */
55 can_clk: can {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 /* This value must be overridden by the board. */
59 clock-frequency = <0>;
60 };
61
62 cpus {
63 #address-cells = <1>;
64 #size-cells = <0>;
65 enable-method = "renesas,apmu";
66
67 cpu0: cpu@0 {
68 device_type = "cpu";
69 compatible = "arm,cortex-a7";
70 reg = <0>;
71 clock-frequency = <1000000000>;
72 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
73 power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
74 next-level-cache = <&L2_CA7>;
75 };
76
77 cpu1: cpu@1 {
78 device_type = "cpu";
79 compatible = "arm,cortex-a7";
80 reg = <1>;
81 clock-frequency = <1000000000>;
82 clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
83 power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
84 next-level-cache = <&L2_CA7>;
85 };
86
87 L2_CA7: cache-controller-0 {
88 compatible = "cache";
89 power-domains = <&sysc R8A7794_PD_CA7_SCU>;
90 cache-unified;
91 cache-level = <2>;
92 };
93 };
94
95 /* External root clock */
96 extal_clk: extal {
97 compatible = "fixed-clock";
98 #clock-cells = <0>;
99 /* This value must be overridden by the board. */
100 clock-frequency = <0>;
101 };
102
103 pmu {
104 compatible = "arm,cortex-a7-pmu";
105 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
106 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
107 interrupt-affinity = <&cpu0>, <&cpu1>;
108 };
109
110 /* External SCIF clock */
111 scif_clk: scif {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 /* This value must be overridden by the board. */
115 clock-frequency = <0>;
116 };
117
118 soc {
119 compatible = "simple-bus";
120 interrupt-parent = <&gic>;
121
122 #address-cells = <2>;
123 #size-cells = <2>;
124 ranges;
125
126 rwdt: watchdog@e6020000 {
127 compatible = "renesas,r8a7794-wdt",
128 "renesas,rcar-gen2-wdt";
129 reg = <0 0xe6020000 0 0x0c>;
130 clocks = <&cpg CPG_MOD 402>;
131 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
132 resets = <&cpg 402>;
133 status = "disabled";
134 };
135
136 gpio0: gpio@e6050000 {
137 compatible = "renesas,gpio-r8a7794",
138 "renesas,rcar-gen2-gpio";
139 reg = <0 0xe6050000 0 0x50>;
140 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
141 #gpio-cells = <2>;
142 gpio-controller;
143 gpio-ranges = <&pfc 0 0 32>;
144 #interrupt-cells = <2>;
145 interrupt-controller;
146 clocks = <&cpg CPG_MOD 912>;
147 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
148 resets = <&cpg 912>;
149 };
150
151 gpio1: gpio@e6051000 {
152 compatible = "renesas,gpio-r8a7794",
153 "renesas,rcar-gen2-gpio";
154 reg = <0 0xe6051000 0 0x50>;
155 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
156 #gpio-cells = <2>;
157 gpio-controller;
158 gpio-ranges = <&pfc 0 32 26>;
159 #interrupt-cells = <2>;
160 interrupt-controller;
161 clocks = <&cpg CPG_MOD 911>;
162 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
163 resets = <&cpg 911>;
164 };
165
166 gpio2: gpio@e6052000 {
167 compatible = "renesas,gpio-r8a7794",
168 "renesas,rcar-gen2-gpio";
169 reg = <0 0xe6052000 0 0x50>;
170 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
171 #gpio-cells = <2>;
172 gpio-controller;
173 gpio-ranges = <&pfc 0 64 32>;
174 #interrupt-cells = <2>;
175 interrupt-controller;
176 clocks = <&cpg CPG_MOD 910>;
177 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
178 resets = <&cpg 910>;
179 };
180
181 gpio3: gpio@e6053000 {
182 compatible = "renesas,gpio-r8a7794",
183 "renesas,rcar-gen2-gpio";
184 reg = <0 0xe6053000 0 0x50>;
185 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
186 #gpio-cells = <2>;
187 gpio-controller;
188 gpio-ranges = <&pfc 0 96 32>;
189 #interrupt-cells = <2>;
190 interrupt-controller;
191 clocks = <&cpg CPG_MOD 909>;
192 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
193 resets = <&cpg 909>;
194 };
195
196 gpio4: gpio@e6054000 {
197 compatible = "renesas,gpio-r8a7794",
198 "renesas,rcar-gen2-gpio";
199 reg = <0 0xe6054000 0 0x50>;
200 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
201 #gpio-cells = <2>;
202 gpio-controller;
203 gpio-ranges = <&pfc 0 128 32>;
204 #interrupt-cells = <2>;
205 interrupt-controller;
206 clocks = <&cpg CPG_MOD 908>;
207 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
208 resets = <&cpg 908>;
209 };
210
211 gpio5: gpio@e6055000 {
212 compatible = "renesas,gpio-r8a7794",
213 "renesas,rcar-gen2-gpio";
214 reg = <0 0xe6055000 0 0x50>;
215 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
216 #gpio-cells = <2>;
217 gpio-controller;
218 gpio-ranges = <&pfc 0 160 28>;
219 #interrupt-cells = <2>;
220 interrupt-controller;
221 clocks = <&cpg CPG_MOD 907>;
222 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
223 resets = <&cpg 907>;
224 };
225
226 gpio6: gpio@e6055400 {
227 compatible = "renesas,gpio-r8a7794",
228 "renesas,rcar-gen2-gpio";
229 reg = <0 0xe6055400 0 0x50>;
230 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
231 #gpio-cells = <2>;
232 gpio-controller;
233 gpio-ranges = <&pfc 0 192 26>;
234 #interrupt-cells = <2>;
235 interrupt-controller;
236 clocks = <&cpg CPG_MOD 905>;
237 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
238 resets = <&cpg 905>;
239 };
240
241 pfc: pin-controller@e6060000 {
242 compatible = "renesas,pfc-r8a7794";
243 reg = <0 0xe6060000 0 0x11c>;
244 };
245
246 cpg: clock-controller@e6150000 {
247 compatible = "renesas,r8a7794-cpg-mssr";
248 reg = <0 0xe6150000 0 0x1000>;
249 clocks = <&extal_clk>, <&usb_extal_clk>;
250 clock-names = "extal", "usb_extal";
251 #clock-cells = <2>;
252 #power-domain-cells = <0>;
253 #reset-cells = <1>;
254 };
255
256 apmu@e6151000 {
257 compatible = "renesas,r8a7794-apmu", "renesas,apmu";
258 reg = <0 0xe6151000 0 0x188>;
259 cpus = <&cpu0 &cpu1>;
260 };
261
262 rst: reset-controller@e6160000 {
263 compatible = "renesas,r8a7794-rst";
264 reg = <0 0xe6160000 0 0x0100>;
265 };
266
267 sysc: system-controller@e6180000 {
268 compatible = "renesas,r8a7794-sysc";
269 reg = <0 0xe6180000 0 0x0200>;
270 #power-domain-cells = <1>;
271 };
272
273 irqc0: interrupt-controller@e61c0000 {
274 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
275 #interrupt-cells = <2>;
276 interrupt-controller;
277 reg = <0 0xe61c0000 0 0x200>;
278 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
281 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
282 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
283 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
284 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
288 clocks = <&cpg CPG_MOD 407>;
289 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
290 resets = <&cpg 407>;
291 };
292
293 ipmmu_sy0: mmu@e6280000 {
294 compatible = "renesas,ipmmu-r8a7794",
295 "renesas,ipmmu-vmsa";
296 reg = <0 0xe6280000 0 0x1000>;
297 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
298 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
299 #iommu-cells = <1>;
300 status = "disabled";
301 };
302
303 ipmmu_sy1: mmu@e6290000 {
304 compatible = "renesas,ipmmu-r8a7794",
305 "renesas,ipmmu-vmsa";
306 reg = <0 0xe6290000 0 0x1000>;
307 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
308 #iommu-cells = <1>;
309 status = "disabled";
310 };
311
312 ipmmu_ds: mmu@e6740000 {
313 compatible = "renesas,ipmmu-r8a7794",
314 "renesas,ipmmu-vmsa";
315 reg = <0 0xe6740000 0 0x1000>;
316 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
318 #iommu-cells = <1>;
319 status = "disabled";
320 };
321
322 ipmmu_mp: mmu@ec680000 {
323 compatible = "renesas,ipmmu-r8a7794",
324 "renesas,ipmmu-vmsa";
325 reg = <0 0xec680000 0 0x1000>;
326 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
327 #iommu-cells = <1>;
328 status = "disabled";
329 };
330
331 ipmmu_mx: mmu@fe951000 {
332 compatible = "renesas,ipmmu-r8a7794",
333 "renesas,ipmmu-vmsa";
334 reg = <0 0xfe951000 0 0x1000>;
335 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
337 #iommu-cells = <1>;
338 status = "disabled";
339 };
340
341 ipmmu_gp: mmu@e62a0000 {
342 compatible = "renesas,ipmmu-r8a7794",
343 "renesas,ipmmu-vmsa";
344 reg = <0 0xe62a0000 0 0x1000>;
345 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
347 #iommu-cells = <1>;
348 status = "disabled";
349 };
350
351 icram0: sram@e63a0000 {
352 compatible = "mmio-sram";
353 reg = <0 0xe63a0000 0 0x12000>;
354 };
355
356 icram1: sram@e63c0000 {
357 compatible = "mmio-sram";
358 reg = <0 0xe63c0000 0 0x1000>;
359 #address-cells = <1>;
360 #size-cells = <1>;
361 ranges = <0 0 0xe63c0000 0x1000>;
362
363 smp-sram@0 {
364 compatible = "renesas,smp-sram";
365 reg = <0 0x100>;
366 };
367 };
368
369 /* The memory map in the User's Manual maps the cores to
370 * bus numbers
371 */
372 i2c0: i2c@e6508000 {
373 compatible = "renesas,i2c-r8a7794",
374 "renesas,rcar-gen2-i2c";
375 reg = <0 0xe6508000 0 0x40>;
376 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
377 clocks = <&cpg CPG_MOD 931>;
378 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
379 resets = <&cpg 931>;
380 #address-cells = <1>;
381 #size-cells = <0>;
382 i2c-scl-internal-delay-ns = <6>;
383 status = "disabled";
384 };
385
386 i2c1: i2c@e6518000 {
387 compatible = "renesas,i2c-r8a7794",
388 "renesas,rcar-gen2-i2c";
389 reg = <0 0xe6518000 0 0x40>;
390 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
391 clocks = <&cpg CPG_MOD 930>;
392 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
393 resets = <&cpg 930>;
394 #address-cells = <1>;
395 #size-cells = <0>;
396 i2c-scl-internal-delay-ns = <6>;
397 status = "disabled";
398 };
399
400 i2c2: i2c@e6530000 {
401 compatible = "renesas,i2c-r8a7794",
402 "renesas,rcar-gen2-i2c";
403 reg = <0 0xe6530000 0 0x40>;
404 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
405 clocks = <&cpg CPG_MOD 929>;
406 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
407 resets = <&cpg 929>;
408 #address-cells = <1>;
409 #size-cells = <0>;
410 i2c-scl-internal-delay-ns = <6>;
411 status = "disabled";
412 };
413
414 i2c3: i2c@e6540000 {
415 compatible = "renesas,i2c-r8a7794",
416 "renesas,rcar-gen2-i2c";
417 reg = <0 0xe6540000 0 0x40>;
418 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
419 clocks = <&cpg CPG_MOD 928>;
420 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
421 resets = <&cpg 928>;
422 #address-cells = <1>;
423 #size-cells = <0>;
424 i2c-scl-internal-delay-ns = <6>;
425 status = "disabled";
426 };
427
428 i2c4: i2c@e6520000 {
429 compatible = "renesas,i2c-r8a7794",
430 "renesas,rcar-gen2-i2c";
431 reg = <0 0xe6520000 0 0x40>;
432 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
433 clocks = <&cpg CPG_MOD 927>;
434 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
435 resets = <&cpg 927>;
436 #address-cells = <1>;
437 #size-cells = <0>;
438 i2c-scl-internal-delay-ns = <6>;
439 status = "disabled";
440 };
441
442 i2c5: i2c@e6528000 {
443 compatible = "renesas,i2c-r8a7794",
444 "renesas,rcar-gen2-i2c";
445 reg = <0 0xe6528000 0 0x40>;
446 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
447 clocks = <&cpg CPG_MOD 925>;
448 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
449 resets = <&cpg 925>;
450 #address-cells = <1>;
451 #size-cells = <0>;
452 i2c-scl-internal-delay-ns = <6>;
453 status = "disabled";
454 };
455
456 i2c6: i2c@e6500000 {
457 compatible = "renesas,iic-r8a7794",
458 "renesas,rcar-gen2-iic",
459 "renesas,rmobile-iic";
460 reg = <0 0xe6500000 0 0x425>;
461 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
462 clocks = <&cpg CPG_MOD 318>;
463 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
464 <&dmac1 0x61>, <&dmac1 0x62>;
465 dma-names = "tx", "rx", "tx", "rx";
466 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
467 resets = <&cpg 318>;
468 #address-cells = <1>;
469 #size-cells = <0>;
470 status = "disabled";
471 };
472
473 i2c7: i2c@e6510000 {
474 compatible = "renesas,iic-r8a7794",
475 "renesas,rcar-gen2-iic",
476 "renesas,rmobile-iic";
477 reg = <0 0xe6510000 0 0x425>;
478 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
479 clocks = <&cpg CPG_MOD 323>;
480 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
481 <&dmac1 0x65>, <&dmac1 0x66>;
482 dma-names = "tx", "rx", "tx", "rx";
483 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
484 resets = <&cpg 323>;
485 #address-cells = <1>;
486 #size-cells = <0>;
487 status = "disabled";
488 };
489
490 hsusb: usb@e6590000 {
491 compatible = "renesas,usbhs-r8a7794",
492 "renesas,rcar-gen2-usbhs";
493 reg = <0 0xe6590000 0 0x100>;
494 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
495 clocks = <&cpg CPG_MOD 704>;
496 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
497 resets = <&cpg 704>;
498 renesas,buswait = <4>;
499 phys = <&usb0 1>;
500 phy-names = "usb";
501 status = "disabled";
502 };
503
504 usbphy: usb-phy@e6590100 {
505 compatible = "renesas,usb-phy-r8a7794",
506 "renesas,rcar-gen2-usb-phy";
507 reg = <0 0xe6590100 0 0x100>;
508 #address-cells = <1>;
509 #size-cells = <0>;
510 clocks = <&cpg CPG_MOD 704>;
511 clock-names = "usbhs";
512 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
513 resets = <&cpg 704>;
514 status = "disabled";
515
516 usb0: usb-channel@0 {
517 reg = <0>;
518 #phy-cells = <1>;
519 };
520 usb2: usb-channel@2 {
521 reg = <2>;
522 #phy-cells = <1>;
523 };
524 };
525
526 dmac0: dma-controller@e6700000 {
527 compatible = "renesas,dmac-r8a7794",
528 "renesas,rcar-dmac";
529 reg = <0 0xe6700000 0 0x20000>;
530 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
531 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
532 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
533 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
534 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
535 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
536 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
537 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
538 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
539 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
540 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
541 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
542 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
543 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
544 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
545 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
546 interrupt-names = "error",
547 "ch0", "ch1", "ch2", "ch3",
548 "ch4", "ch5", "ch6", "ch7",
549 "ch8", "ch9", "ch10", "ch11",
550 "ch12", "ch13", "ch14";
551 clocks = <&cpg CPG_MOD 219>;
552 clock-names = "fck";
553 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
554 resets = <&cpg 219>;
555 #dma-cells = <1>;
556 dma-channels = <15>;
557 };
558
559 dmac1: dma-controller@e6720000 {
560 compatible = "renesas,dmac-r8a7794",
561 "renesas,rcar-dmac";
562 reg = <0 0xe6720000 0 0x20000>;
563 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
564 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
565 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
566 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
567 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
568 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
569 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
570 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
571 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
572 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
573 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
574 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
575 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
576 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
577 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
578 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
579 interrupt-names = "error",
580 "ch0", "ch1", "ch2", "ch3",
581 "ch4", "ch5", "ch6", "ch7",
582 "ch8", "ch9", "ch10", "ch11",
583 "ch12", "ch13", "ch14";
584 clocks = <&cpg CPG_MOD 218>;
585 clock-names = "fck";
586 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
587 resets = <&cpg 218>;
588 #dma-cells = <1>;
589 dma-channels = <15>;
590 };
591
592 avb: ethernet@e6800000 {
593 compatible = "renesas,etheravb-r8a7794",
594 "renesas,etheravb-rcar-gen2";
595 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
596 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&cpg CPG_MOD 812>;
598 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
599 resets = <&cpg 812>;
600 #address-cells = <1>;
601 #size-cells = <0>;
602 status = "disabled";
603 };
604
605 qspi: spi@e6b10000 {
606 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
607 reg = <0 0xe6b10000 0 0x2c>;
608 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
609 clocks = <&cpg CPG_MOD 917>;
610 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
611 <&dmac1 0x17>, <&dmac1 0x18>;
612 dma-names = "tx", "rx", "tx", "rx";
613 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
614 resets = <&cpg 917>;
615 num-cs = <1>;
616 #address-cells = <1>;
617 #size-cells = <0>;
618 status = "disabled";
619 };
620
621 scifa0: serial@e6c40000 {
622 compatible = "renesas,scifa-r8a7794",
623 "renesas,rcar-gen2-scifa", "renesas,scifa";
624 reg = <0 0xe6c40000 0 64>;
625 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
626 clocks = <&cpg CPG_MOD 204>;
627 clock-names = "fck";
628 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
629 <&dmac1 0x21>, <&dmac1 0x22>;
630 dma-names = "tx", "rx", "tx", "rx";
631 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
632 resets = <&cpg 204>;
633 status = "disabled";
634 };
635
636 scifa1: serial@e6c50000 {
637 compatible = "renesas,scifa-r8a7794",
638 "renesas,rcar-gen2-scifa", "renesas,scifa";
639 reg = <0 0xe6c50000 0 64>;
640 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
641 clocks = <&cpg CPG_MOD 203>;
642 clock-names = "fck";
643 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
644 <&dmac1 0x25>, <&dmac1 0x26>;
645 dma-names = "tx", "rx", "tx", "rx";
646 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
647 resets = <&cpg 203>;
648 status = "disabled";
649 };
650
651 scifa2: serial@e6c60000 {
652 compatible = "renesas,scifa-r8a7794",
653 "renesas,rcar-gen2-scifa", "renesas,scifa";
654 reg = <0 0xe6c60000 0 64>;
655 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
656 clocks = <&cpg CPG_MOD 202>;
657 clock-names = "fck";
658 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
659 <&dmac1 0x27>, <&dmac1 0x28>;
660 dma-names = "tx", "rx", "tx", "rx";
661 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
662 resets = <&cpg 202>;
663 status = "disabled";
664 };
665
666 scifa3: serial@e6c70000 {
667 compatible = "renesas,scifa-r8a7794",
668 "renesas,rcar-gen2-scifa", "renesas,scifa";
669 reg = <0 0xe6c70000 0 64>;
670 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
671 clocks = <&cpg CPG_MOD 1106>;
672 clock-names = "fck";
673 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
674 <&dmac1 0x1b>, <&dmac1 0x1c>;
675 dma-names = "tx", "rx", "tx", "rx";
676 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
677 resets = <&cpg 1106>;
678 status = "disabled";
679 };
680
681 scifa4: serial@e6c78000 {
682 compatible = "renesas,scifa-r8a7794",
683 "renesas,rcar-gen2-scifa", "renesas,scifa";
684 reg = <0 0xe6c78000 0 64>;
685 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
686 clocks = <&cpg CPG_MOD 1107>;
687 clock-names = "fck";
688 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
689 <&dmac1 0x1f>, <&dmac1 0x20>;
690 dma-names = "tx", "rx", "tx", "rx";
691 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
692 resets = <&cpg 1107>;
693 status = "disabled";
694 };
695
696 scifa5: serial@e6c80000 {
697 compatible = "renesas,scifa-r8a7794",
698 "renesas,rcar-gen2-scifa", "renesas,scifa";
699 reg = <0 0xe6c80000 0 64>;
700 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
701 clocks = <&cpg CPG_MOD 1108>;
702 clock-names = "fck";
703 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
704 <&dmac1 0x23>, <&dmac1 0x24>;
705 dma-names = "tx", "rx", "tx", "rx";
706 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
707 resets = <&cpg 1108>;
708 status = "disabled";
709 };
710
711 scifb0: serial@e6c20000 {
712 compatible = "renesas,scifb-r8a7794",
713 "renesas,rcar-gen2-scifb", "renesas,scifb";
714 reg = <0 0xe6c20000 0 0x100>;
715 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
716 clocks = <&cpg CPG_MOD 206>;
717 clock-names = "fck";
718 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
719 <&dmac1 0x3d>, <&dmac1 0x3e>;
720 dma-names = "tx", "rx", "tx", "rx";
721 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
722 resets = <&cpg 206>;
723 status = "disabled";
724 };
725
726 scifb1: serial@e6c30000 {
727 compatible = "renesas,scifb-r8a7794",
728 "renesas,rcar-gen2-scifb", "renesas,scifb";
729 reg = <0 0xe6c30000 0 0x100>;
730 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
731 clocks = <&cpg CPG_MOD 207>;
732 clock-names = "fck";
733 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
734 <&dmac1 0x19>, <&dmac1 0x1a>;
735 dma-names = "tx", "rx", "tx", "rx";
736 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
737 resets = <&cpg 207>;
738 status = "disabled";
739 };
740
741 scifb2: serial@e6ce0000 {
742 compatible = "renesas,scifb-r8a7794",
743 "renesas,rcar-gen2-scifb", "renesas,scifb";
744 reg = <0 0xe6ce0000 0 0x100>;
745 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
746 clocks = <&cpg CPG_MOD 216>;
747 clock-names = "fck";
748 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
749 <&dmac1 0x1d>, <&dmac1 0x1e>;
750 dma-names = "tx", "rx", "tx", "rx";
751 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
752 resets = <&cpg 216>;
753 status = "disabled";
754 };
755
756 scif0: serial@e6e60000 {
757 compatible = "renesas,scif-r8a7794",
758 "renesas,rcar-gen2-scif",
759 "renesas,scif";
760 reg = <0 0xe6e60000 0 64>;
761 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
762 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
763 <&scif_clk>;
764 clock-names = "fck", "brg_int", "scif_clk";
765 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
766 <&dmac1 0x29>, <&dmac1 0x2a>;
767 dma-names = "tx", "rx", "tx", "rx";
768 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
769 resets = <&cpg 721>;
770 status = "disabled";
771 };
772
773 scif1: serial@e6e68000 {
774 compatible = "renesas,scif-r8a7794",
775 "renesas,rcar-gen2-scif",
776 "renesas,scif";
777 reg = <0 0xe6e68000 0 64>;
778 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
779 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
780 <&scif_clk>;
781 clock-names = "fck", "brg_int", "scif_clk";
782 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
783 <&dmac1 0x2d>, <&dmac1 0x2e>;
784 dma-names = "tx", "rx", "tx", "rx";
785 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
786 resets = <&cpg 720>;
787 status = "disabled";
788 };
789
790 scif2: serial@e6e58000 {
791 compatible = "renesas,scif-r8a7794",
792 "renesas,rcar-gen2-scif", "renesas,scif";
793 reg = <0 0xe6e58000 0 64>;
794 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
795 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
796 <&scif_clk>;
797 clock-names = "fck", "brg_int", "scif_clk";
798 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
799 <&dmac1 0x2b>, <&dmac1 0x2c>;
800 dma-names = "tx", "rx", "tx", "rx";
801 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
802 resets = <&cpg 719>;
803 status = "disabled";
804 };
805
806 scif3: serial@e6ea8000 {
807 compatible = "renesas,scif-r8a7794",
808 "renesas,rcar-gen2-scif", "renesas,scif";
809 reg = <0 0xe6ea8000 0 64>;
810 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
811 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
812 <&scif_clk>;
813 clock-names = "fck", "brg_int", "scif_clk";
814 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
815 <&dmac1 0x2f>, <&dmac1 0x30>;
816 dma-names = "tx", "rx", "tx", "rx";
817 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
818 resets = <&cpg 718>;
819 status = "disabled";
820 };
821
822 scif4: serial@e6ee0000 {
823 compatible = "renesas,scif-r8a7794",
824 "renesas,rcar-gen2-scif", "renesas,scif";
825 reg = <0 0xe6ee0000 0 64>;
826 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
827 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
828 <&scif_clk>;
829 clock-names = "fck", "brg_int", "scif_clk";
830 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
831 <&dmac1 0xfb>, <&dmac1 0xfc>;
832 dma-names = "tx", "rx", "tx", "rx";
833 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
834 resets = <&cpg 715>;
835 status = "disabled";
836 };
837
838 scif5: serial@e6ee8000 {
839 compatible = "renesas,scif-r8a7794",
840 "renesas,rcar-gen2-scif", "renesas,scif";
841 reg = <0 0xe6ee8000 0 64>;
842 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
843 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
844 <&scif_clk>;
845 clock-names = "fck", "brg_int", "scif_clk";
846 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
847 <&dmac1 0xfd>, <&dmac1 0xfe>;
848 dma-names = "tx", "rx", "tx", "rx";
849 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
850 resets = <&cpg 714>;
851 status = "disabled";
852 };
853
854 hscif0: serial@e62c0000 {
855 compatible = "renesas,hscif-r8a7794",
856 "renesas,rcar-gen2-hscif", "renesas,hscif";
857 reg = <0 0xe62c0000 0 96>;
858 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
859 clocks = <&cpg CPG_MOD 717>,
860 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
861 clock-names = "fck", "brg_int", "scif_clk";
862 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
863 <&dmac1 0x39>, <&dmac1 0x3a>;
864 dma-names = "tx", "rx", "tx", "rx";
865 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
866 resets = <&cpg 717>;
867 status = "disabled";
868 };
869
870 hscif1: serial@e62c8000 {
871 compatible = "renesas,hscif-r8a7794",
872 "renesas,rcar-gen2-hscif", "renesas,hscif";
873 reg = <0 0xe62c8000 0 96>;
874 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
875 clocks = <&cpg CPG_MOD 716>,
876 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
877 clock-names = "fck", "brg_int", "scif_clk";
878 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
879 <&dmac1 0x4d>, <&dmac1 0x4e>;
880 dma-names = "tx", "rx", "tx", "rx";
881 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
882 resets = <&cpg 716>;
883 status = "disabled";
884 };
885
886 hscif2: serial@e62d0000 {
887 compatible = "renesas,hscif-r8a7794",
888 "renesas,rcar-gen2-hscif", "renesas,hscif";
889 reg = <0 0xe62d0000 0 96>;
890 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
891 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
892 <&scif_clk>;
893 clock-names = "fck", "brg_int", "scif_clk";
894 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
895 <&dmac1 0x3b>, <&dmac1 0x3c>;
896 dma-names = "tx", "rx", "tx", "rx";
897 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
898 resets = <&cpg 713>;
899 status = "disabled";
900 };
901
902 can0: can@e6e80000 {
903 compatible = "renesas,can-r8a7794",
904 "renesas,rcar-gen2-can";
905 reg = <0 0xe6e80000 0 0x1000>;
906 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
908 <&can_clk>;
909 clock-names = "clkp1", "clkp2", "can_clk";
910 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
911 resets = <&cpg 916>;
912 status = "disabled";
913 };
914
915 can1: can@e6e88000 {
916 compatible = "renesas,can-r8a7794",
917 "renesas,rcar-gen2-can";
918 reg = <0 0xe6e88000 0 0x1000>;
919 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
920 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
921 <&can_clk>;
922 clock-names = "clkp1", "clkp2", "can_clk";
923 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
924 resets = <&cpg 915>;
925 status = "disabled";
926 };
927
928 vin0: video@e6ef0000 {
929 compatible = "renesas,vin-r8a7794",
930 "renesas,rcar-gen2-vin";
931 reg = <0 0xe6ef0000 0 0x1000>;
932 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
933 clocks = <&cpg CPG_MOD 811>;
934 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
935 resets = <&cpg 811>;
936 status = "disabled";
937 };
938
939 vin1: video@e6ef1000 {
940 compatible = "renesas,vin-r8a7794",
941 "renesas,rcar-gen2-vin";
942 reg = <0 0xe6ef1000 0 0x1000>;
943 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
944 clocks = <&cpg CPG_MOD 810>;
945 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
946 resets = <&cpg 810>;
947 status = "disabled";
948 };
949
950 rcar_sound: sound@ec500000 {
951 /*
952 * #sound-dai-cells is required
953 *
954 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
955 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
956 */
957 compatible = "renesas,rcar_sound-r8a7794",
958 "renesas,rcar_sound-gen2";
959 reg = <0 0xec500000 0 0x1000>, /* SCU */
960 <0 0xec5a0000 0 0x100>, /* ADG */
961 <0 0xec540000 0 0x1000>, /* SSIU */
962 <0 0xec541000 0 0x280>, /* SSI */
963 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
964 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
965
966 clocks = <&cpg CPG_MOD 1005>,
967 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
968 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
969 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
970 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
971 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
972 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
973 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
974 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
975 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
976 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
977 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
978 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
979 <&cpg CPG_CORE R8A7794_CLK_M2>;
980 clock-names = "ssi-all",
981 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
982 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
983 "ssi.1", "ssi.0",
984 "src.6", "src.5", "src.4", "src.3",
985 "src.2", "src.1",
986 "ctu.0", "ctu.1",
987 "mix.0", "mix.1",
988 "dvc.0", "dvc.1",
989 "clk_a", "clk_b", "clk_c", "clk_i";
990 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
991 resets = <&cpg 1005>,
992 <&cpg 1006>, <&cpg 1007>,
993 <&cpg 1008>, <&cpg 1009>,
994 <&cpg 1010>, <&cpg 1011>,
995 <&cpg 1012>, <&cpg 1013>,
996 <&cpg 1014>, <&cpg 1015>;
997 reset-names = "ssi-all",
998 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
999 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1000 "ssi.1", "ssi.0";
1001
1002 status = "disabled";
1003
1004 rcar_sound,dvc {
1005 dvc0: dvc-0 {
1006 dmas = <&audma0 0xbc>;
1007 dma-names = "tx";
1008 };
1009 dvc1: dvc-1 {
1010 dmas = <&audma0 0xbe>;
1011 dma-names = "tx";
1012 };
1013 };
1014
1015 rcar_sound,mix {
1016 mix0: mix-0 { };
1017 mix1: mix-1 { };
1018 };
1019
1020 rcar_sound,ctu {
1021 ctu00: ctu-0 { };
1022 ctu01: ctu-1 { };
1023 ctu02: ctu-2 { };
1024 ctu03: ctu-3 { };
1025 ctu10: ctu-4 { };
1026 ctu11: ctu-5 { };
1027 ctu12: ctu-6 { };
1028 ctu13: ctu-7 { };
1029 };
1030
1031 rcar_sound,src {
1032 src-0 {
1033 status = "disabled";
1034 };
1035 src1: src-1 {
1036 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1037 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1038 dma-names = "rx", "tx";
1039 };
1040 src2: src-2 {
1041 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1042 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1043 dma-names = "rx", "tx";
1044 };
1045 src3: src-3 {
1046 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1047 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1048 dma-names = "rx", "tx";
1049 };
1050 src4: src-4 {
1051 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1052 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1053 dma-names = "rx", "tx";
1054 };
1055 src5: src-5 {
1056 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1057 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1058 dma-names = "rx", "tx";
1059 };
1060 src6: src-6 {
1061 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1062 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1063 dma-names = "rx", "tx";
1064 };
1065 };
1066
1067 rcar_sound,ssi {
1068 ssi0: ssi-0 {
1069 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1070 dmas = <&audma0 0x01>, <&audma0 0x02>,
1071 <&audma0 0x15>, <&audma0 0x16>;
1072 dma-names = "rx", "tx", "rxu", "txu";
1073 };
1074 ssi1: ssi-1 {
1075 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1076 dmas = <&audma0 0x03>, <&audma0 0x04>,
1077 <&audma0 0x49>, <&audma0 0x4a>;
1078 dma-names = "rx", "tx", "rxu", "txu";
1079 };
1080 ssi2: ssi-2 {
1081 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1082 dmas = <&audma0 0x05>, <&audma0 0x06>,
1083 <&audma0 0x63>, <&audma0 0x64>;
1084 dma-names = "rx", "tx", "rxu", "txu";
1085 };
1086 ssi3: ssi-3 {
1087 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1088 dmas = <&audma0 0x07>, <&audma0 0x08>,
1089 <&audma0 0x6f>, <&audma0 0x70>;
1090 dma-names = "rx", "tx", "rxu", "txu";
1091 };
1092 ssi4: ssi-4 {
1093 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1094 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1095 <&audma0 0x71>, <&audma0 0x72>;
1096 dma-names = "rx", "tx", "rxu", "txu";
1097 };
1098 ssi5: ssi-5 {
1099 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1100 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1101 <&audma0 0x73>, <&audma0 0x74>;
1102 dma-names = "rx", "tx", "rxu", "txu";
1103 };
1104 ssi6: ssi-6 {
1105 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1106 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1107 <&audma0 0x75>, <&audma0 0x76>;
1108 dma-names = "rx", "tx", "rxu", "txu";
1109 };
1110 ssi7: ssi-7 {
1111 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1112 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1113 <&audma0 0x79>, <&audma0 0x7a>;
1114 dma-names = "rx", "tx", "rxu", "txu";
1115 };
1116 ssi8: ssi-8 {
1117 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1118 dmas = <&audma0 0x11>, <&audma0 0x12>,
1119 <&audma0 0x7b>, <&audma0 0x7c>;
1120 dma-names = "rx", "tx", "rxu", "txu";
1121 };
1122 ssi9: ssi-9 {
1123 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1124 dmas = <&audma0 0x13>, <&audma0 0x14>,
1125 <&audma0 0x7d>, <&audma0 0x7e>;
1126 dma-names = "rx", "tx", "rxu", "txu";
1127 };
1128 };
1129 };
1130
1131 audma0: dma-controller@ec700000 {
1132 compatible = "renesas,dmac-r8a7794",
1133 "renesas,rcar-dmac";
1134 reg = <0 0xec700000 0 0x10000>;
1135 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1136 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1137 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1138 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1139 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1140 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1141 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1142 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1143 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1144 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1145 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1146 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1147 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1148 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1149 interrupt-names = "error",
1150 "ch0", "ch1", "ch2", "ch3", "ch4",
1151 "ch5", "ch6", "ch7", "ch8", "ch9",
1152 "ch10", "ch11",
1153 "ch12";
1154 clocks = <&cpg CPG_MOD 502>;
1155 clock-names = "fck";
1156 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1157 resets = <&cpg 502>;
1158 #dma-cells = <1>;
1159 dma-channels = <13>;
1160 };
1161
1162 pci0: pci@ee090000 {
1163 compatible = "renesas,pci-r8a7794",
1164 "renesas,pci-rcar-gen2";
1165 device_type = "pci";
1166 reg = <0 0xee090000 0 0xc00>,
1167 <0 0xee080000 0 0x1100>;
1168 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1169 clocks = <&cpg CPG_MOD 703>;
1170 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1171 resets = <&cpg 703>;
1172 status = "disabled";
1173
1174 bus-range = <0 0>;
1175 #address-cells = <3>;
1176 #size-cells = <2>;
1177 #interrupt-cells = <1>;
1178 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1179 interrupt-map-mask = <0xff00 0 0 0x7>;
1180 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1181 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1182 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1183
1184 usb@1,0 {
1185 reg = <0x800 0 0 0 0>;
1186 phys = <&usb0 0>;
1187 phy-names = "usb";
1188 };
1189
1190 usb@2,0 {
1191 reg = <0x1000 0 0 0 0>;
1192 phys = <&usb0 0>;
1193 phy-names = "usb";
1194 };
1195 };
1196
1197 pci1: pci@ee0d0000 {
1198 compatible = "renesas,pci-r8a7794",
1199 "renesas,pci-rcar-gen2";
1200 device_type = "pci";
1201 reg = <0 0xee0d0000 0 0xc00>,
1202 <0 0xee0c0000 0 0x1100>;
1203 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1204 clocks = <&cpg CPG_MOD 703>;
1205 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1206 resets = <&cpg 703>;
1207 status = "disabled";
1208
1209 bus-range = <1 1>;
1210 #address-cells = <3>;
1211 #size-cells = <2>;
1212 #interrupt-cells = <1>;
1213 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1214 interrupt-map-mask = <0xff00 0 0 0x7>;
1215 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1216 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1217 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1218
1219 usb@1,0 {
1220 reg = <0x10800 0 0 0 0>;
1221 phys = <&usb2 0>;
1222 phy-names = "usb";
1223 };
1224
1225 usb@2,0 {
1226 reg = <0x11000 0 0 0 0>;
1227 phys = <&usb2 0>;
1228 phy-names = "usb";
1229 };
1230 };
1231
1232 sdhi0: sd@ee100000 {
1233 compatible = "renesas,sdhi-r8a7794",
1234 "renesas,rcar-gen2-sdhi";
1235 reg = <0 0xee100000 0 0x328>;
1236 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1237 clocks = <&cpg CPG_MOD 314>;
1238 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1239 <&dmac1 0xcd>, <&dmac1 0xce>;
1240 dma-names = "tx", "rx", "tx", "rx";
1241 max-frequency = <195000000>;
1242 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1243 resets = <&cpg 314>;
1244 status = "disabled";
1245 };
1246
1247 sdhi1: sd@ee140000 {
1248 compatible = "renesas,sdhi-r8a7794",
1249 "renesas,rcar-gen2-sdhi";
1250 reg = <0 0xee140000 0 0x100>;
1251 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1252 clocks = <&cpg CPG_MOD 312>;
1253 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1254 <&dmac1 0xc1>, <&dmac1 0xc2>;
1255 dma-names = "tx", "rx", "tx", "rx";
1256 max-frequency = <97500000>;
1257 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1258 resets = <&cpg 312>;
1259 status = "disabled";
1260 };
1261
1262 sdhi2: sd@ee160000 {
1263 compatible = "renesas,sdhi-r8a7794",
1264 "renesas,rcar-gen2-sdhi";
1265 reg = <0 0xee160000 0 0x100>;
1266 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1267 clocks = <&cpg CPG_MOD 311>;
1268 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1269 <&dmac1 0xd3>, <&dmac1 0xd4>;
1270 dma-names = "tx", "rx", "tx", "rx";
1271 max-frequency = <97500000>;
1272 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1273 resets = <&cpg 311>;
1274 status = "disabled";
1275 };
1276
1277 mmcif0: mmc@ee200000 {
1278 compatible = "renesas,mmcif-r8a7794",
1279 "renesas,sh-mmcif";
1280 reg = <0 0xee200000 0 0x80>;
1281 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1282 clocks = <&cpg CPG_MOD 315>;
1283 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1284 <&dmac1 0xd1>, <&dmac1 0xd2>;
1285 dma-names = "tx", "rx", "tx", "rx";
1286 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1287 resets = <&cpg 315>;
1288 reg-io-width = <4>;
1289 status = "disabled";
1290 };
1291
1292 ether: ethernet@ee700000 {
1293 compatible = "renesas,ether-r8a7794",
1294 "renesas,rcar-gen2-ether";
1295 reg = <0 0xee700000 0 0x400>;
1296 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1297 clocks = <&cpg CPG_MOD 813>;
1298 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1299 resets = <&cpg 813>;
1300 phy-mode = "rmii";
1301 #address-cells = <1>;
1302 #size-cells = <0>;
1303 status = "disabled";
1304 };
1305
1306 gic: interrupt-controller@f1001000 {
1307 compatible = "arm,gic-400";
1308 #interrupt-cells = <3>;
1309 #address-cells = <0>;
1310 interrupt-controller;
1311 reg = <0 0xf1001000 0 0x1000>,
1312 <0 0xf1002000 0 0x2000>,
1313 <0 0xf1004000 0 0x2000>,
1314 <0 0xf1006000 0 0x2000>;
1315 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1316 clocks = <&cpg CPG_MOD 408>;
1317 clock-names = "clk";
1318 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1319 resets = <&cpg 408>;
1320 };
1321
1322 vsp@fe928000 {
1323 compatible = "renesas,vsp1";
1324 reg = <0 0xfe928000 0 0x8000>;
1325 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1326 clocks = <&cpg CPG_MOD 131>;
1327 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1328 resets = <&cpg 131>;
1329 };
1330
1331 vsp@fe930000 {
1332 compatible = "renesas,vsp1";
1333 reg = <0 0xfe930000 0 0x8000>;
1334 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1335 clocks = <&cpg CPG_MOD 128>;
1336 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1337 resets = <&cpg 128>;
1338 };
1339
1340 fdp1@fe940000 {
1341 compatible = "renesas,fdp1";
1342 reg = <0 0xfe940000 0 0x2400>;
1343 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1344 clocks = <&cpg CPG_MOD 119>;
1345 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1346 resets = <&cpg 119>;
1347 };
1348
1349 du: display@feb00000 {
1350 compatible = "renesas,du-r8a7794";
1351 reg = <0 0xfeb00000 0 0x40000>;
1352 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1353 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1354 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1355 clock-names = "du.0", "du.1";
1356 status = "disabled";
1357
1358 ports {
1359 #address-cells = <1>;
1360 #size-cells = <0>;
1361
1362 port@0 {
1363 reg = <0>;
1364 du_out_rgb0: endpoint {
1365 };
1366 };
1367 port@1 {
1368 reg = <1>;
1369 du_out_rgb1: endpoint {
1370 };
1371 };
1372 };
1373 };
1374
1375 prr: chipid@ff000044 {
1376 compatible = "renesas,prr";
1377 reg = <0 0xff000044 0 4>;
1378 };
1379
1380 cmt0: timer@ffca0000 {
1381 compatible = "renesas,r8a7794-cmt0",
1382 "renesas,rcar-gen2-cmt0";
1383 reg = <0 0xffca0000 0 0x1004>;
1384 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1385 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1386 clocks = <&cpg CPG_MOD 124>;
1387 clock-names = "fck";
1388 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1389 resets = <&cpg 124>;
1390
1391 status = "disabled";
1392 };
1393
1394 cmt1: timer@e6130000 {
1395 compatible = "renesas,r8a7794-cmt1",
1396 "renesas,rcar-gen2-cmt1";
1397 reg = <0 0xe6130000 0 0x1004>;
1398 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1399 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1400 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1401 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1402 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1403 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1404 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1405 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1406 clocks = <&cpg CPG_MOD 329>;
1407 clock-names = "fck";
1408 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1409 resets = <&cpg 329>;
1410
1411 status = "disabled";
1412 };
1413 };
1414
1415 timer {
1416 compatible = "arm,armv7-timer";
1417 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1418 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1419 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1420 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1421 };
1422
1423 /* External USB clock - can be overridden by the board */
1424 usb_extal_clk: usb_extal {
1425 compatible = "fixed-clock";
1426 #clock-cells = <0>;
1427 clock-frequency = <48000000>;
1428 };
1429 };
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