arch/arm/boot/dts/r8a7794.dtsi

   1 /*
   2  * Device Tree Source for the r8a7794 SoC
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  * Copyright (C) 2014 Ulrich Hecht
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
  13 #include <dt-bindings/interrupt-controller/arm-gic.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/power/r8a7794-sysc.h>
  16
  17 / {
  18         compatible = "renesas,r8a7794";
  19         interrupt-parent = <&gic>;
  20         #address-cells = <2>;
  21         #size-cells = <2>;
  22
  23         aliases {
  24                 i2c0 = &i2c0;
  25                 i2c1 = &i2c1;
  26                 i2c2 = &i2c2;
  27                 i2c3 = &i2c3;
  28                 i2c4 = &i2c4;
  29                 i2c5 = &i2c5;
  30                 i2c6 = &i2c6;
  31                 i2c7 = &i2c7;
  32                 spi0 = &qspi;
  33                 vin0 = &vin0;
  34                 vin1 = &vin1;
  35         };
  36
  37         cpus {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40                 enable-method = "renesas,apmu";
  41
  42                 cpu0: cpu@0 {
  43                         device_type = "cpu";
  44                         compatible = "arm,cortex-a7";
  45                         reg = <0>;
  46                         clock-frequency = <1000000000>;
  47                         clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
  48                         power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
  49                         next-level-cache = <&L2_CA7>;
  50                 };
  51
  52                 cpu1: cpu@1 {
  53                         device_type = "cpu";
  54                         compatible = "arm,cortex-a7";
  55                         reg = <1>;
  56                         clock-frequency = <1000000000>;
  57                         clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
  58                         power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
  59                         next-level-cache = <&L2_CA7>;
  60                 };
  61
  62                 L2_CA7: cache-controller-0 {
  63                         compatible = "cache";
  64                         power-domains = <&sysc R8A7794_PD_CA7_SCU>;
  65                         cache-unified;
  66                         cache-level = <2>;
  67                 };
  68         };
  69
  70         apmu@e6151000 {
  71                 compatible = "renesas,r8a7794-apmu", "renesas,apmu";
  72                 reg = <0 0xe6151000 0 0x188>;
  73                 cpus = <&cpu0 &cpu1>;
  74         };
  75
  76         gic: interrupt-controller@f1001000 {
  77                 compatible = "arm,gic-400";
  78                 #interrupt-cells = <3>;
  79                 #address-cells = <0>;
  80                 interrupt-controller;
  81                 reg = <0 0xf1001000 0 0x1000>,
  82                         <0 0xf1002000 0 0x2000>,
  83                         <0 0xf1004000 0 0x2000>,
  84                         <0 0xf1006000 0 0x2000>;
  85                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  86                 clocks = <&cpg CPG_MOD 408>;
  87                 clock-names = "clk";
  88                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
  89                 resets = <&cpg 408>;
  90         };
  91
  92         gpio0: gpio@e6050000 {
  93                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
  94                 reg = <0 0xe6050000 0 0x50>;
  95                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  96                 #gpio-cells = <2>;
  97                 gpio-controller;
  98                 gpio-ranges = <&pfc 0 0 32>;
  99                 #interrupt-cells = <2>;
 100                 interrupt-controller;
 101                 clocks = <&cpg CPG_MOD 912>;
 102                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 103                 resets = <&cpg 912>;
 104         };
 105
 106         gpio1: gpio@e6051000 {
 107                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 108                 reg = <0 0xe6051000 0 0x50>;
 109                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 110                 #gpio-cells = <2>;
 111                 gpio-controller;
 112                 gpio-ranges = <&pfc 0 32 26>;
 113                 #interrupt-cells = <2>;
 114                 interrupt-controller;
 115                 clocks = <&cpg CPG_MOD 911>;
 116                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 117                 resets = <&cpg 911>;
 118         };
 119
 120         gpio2: gpio@e6052000 {
 121                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 122                 reg = <0 0xe6052000 0 0x50>;
 123                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 124                 #gpio-cells = <2>;
 125                 gpio-controller;
 126                 gpio-ranges = <&pfc 0 64 32>;
 127                 #interrupt-cells = <2>;
 128                 interrupt-controller;
 129                 clocks = <&cpg CPG_MOD 910>;
 130                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 131                 resets = <&cpg 910>;
 132         };
 133
 134         gpio3: gpio@e6053000 {
 135                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 136                 reg = <0 0xe6053000 0 0x50>;
 137                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 138                 #gpio-cells = <2>;
 139                 gpio-controller;
 140                 gpio-ranges = <&pfc 0 96 32>;
 141                 #interrupt-cells = <2>;
 142                 interrupt-controller;
 143                 clocks = <&cpg CPG_MOD 909>;
 144                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 145                 resets = <&cpg 909>;
 146         };
 147
 148         gpio4: gpio@e6054000 {
 149                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 150                 reg = <0 0xe6054000 0 0x50>;
 151                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 152                 #gpio-cells = <2>;
 153                 gpio-controller;
 154                 gpio-ranges = <&pfc 0 128 32>;
 155                 #interrupt-cells = <2>;
 156                 interrupt-controller;
 157                 clocks = <&cpg CPG_MOD 908>;
 158                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 159                 resets = <&cpg 908>;
 160         };
 161
 162         gpio5: gpio@e6055000 {
 163                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 164                 reg = <0 0xe6055000 0 0x50>;
 165                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 166                 #gpio-cells = <2>;
 167                 gpio-controller;
 168                 gpio-ranges = <&pfc 0 160 28>;
 169                 #interrupt-cells = <2>;
 170                 interrupt-controller;
 171                 clocks = <&cpg CPG_MOD 907>;
 172                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 173                 resets = <&cpg 907>;
 174         };
 175
 176         gpio6: gpio@e6055400 {
 177                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 178                 reg = <0 0xe6055400 0 0x50>;
 179                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 180                 #gpio-cells = <2>;
 181                 gpio-controller;
 182                 gpio-ranges = <&pfc 0 192 26>;
 183                 #interrupt-cells = <2>;
 184                 interrupt-controller;
 185                 clocks = <&cpg CPG_MOD 905>;
 186                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 187                 resets = <&cpg 905>;
 188         };
 189
 190         cmt0: timer@ffca0000 {
 191                 compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
 192                 reg = <0 0xffca0000 0 0x1004>;
 193                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 194                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 195                 clocks = <&cpg CPG_MOD 124>;
 196                 clock-names = "fck";
 197                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 198                 resets = <&cpg 124>;
 199
 200                 status = "disabled";
 201         };
 202
 203         cmt1: timer@e6130000 {
 204                 compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
 205                 reg = <0 0xe6130000 0 0x1004>;
 206                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 207                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 208                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 209                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 210                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 211                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 212                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 213                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 214                 clocks = <&cpg CPG_MOD 329>;
 215                 clock-names = "fck";
 216                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 217                 resets = <&cpg 329>;
 218
 219                 status = "disabled";
 220         };
 221
 222         timer {
 223                 compatible = "arm,armv7-timer";
 224                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 225                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 226                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 227                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 228         };
 229
 230         irqc0: interrupt-controller@e61c0000 {
 231                 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
 232                 #interrupt-cells = <2>;
 233                 interrupt-controller;
 234                 reg = <0 0xe61c0000 0 0x200>;
 235                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 236                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 237                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 238                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 239                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 240                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 241                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 242                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 243                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 244                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 245                 clocks = <&cpg CPG_MOD 407>;
 246                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 247                 resets = <&cpg 407>;
 248         };
 249
 250         pfc: pin-controller@e6060000 {
 251                 compatible = "renesas,pfc-r8a7794";
 252                 reg = <0 0xe6060000 0 0x11c>;
 253         };
 254
 255         dmac0: dma-controller@e6700000 {
 256                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 257                 reg = <0 0xe6700000 0 0x20000>;
 258                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 259                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 260                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 261                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 262                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 263                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 264                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 265                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 266                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 267                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 268                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 269                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 270                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 271                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 272                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 273                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 274                 interrupt-names = "error",
 275                                 "ch0", "ch1", "ch2", "ch3",
 276                                 "ch4", "ch5", "ch6", "ch7",
 277                                 "ch8", "ch9", "ch10", "ch11",
 278                                 "ch12", "ch13", "ch14";
 279                 clocks = <&cpg CPG_MOD 219>;
 280                 clock-names = "fck";
 281                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 282                 resets = <&cpg 219>;
 283                 #dma-cells = <1>;
 284                 dma-channels = <15>;
 285         };
 286
 287         dmac1: dma-controller@e6720000 {
 288                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 289                 reg = <0 0xe6720000 0 0x20000>;
 290                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 291                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 292                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 293                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 294                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 295                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 296                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 297                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 298                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 299                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 300                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 301                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 302                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 303                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 304                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 305                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 306                 interrupt-names = "error",
 307                                 "ch0", "ch1", "ch2", "ch3",
 308                                 "ch4", "ch5", "ch6", "ch7",
 309                                 "ch8", "ch9", "ch10", "ch11",
 310                                 "ch12", "ch13", "ch14";
 311                 clocks = <&cpg CPG_MOD 218>;
 312                 clock-names = "fck";
 313                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 314                 resets = <&cpg 218>;
 315                 #dma-cells = <1>;
 316                 dma-channels = <15>;
 317         };
 318
 319         audma0: dma-controller@ec700000 {
 320                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 321                 reg = <0 0xec700000 0 0x10000>;
 322                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 323                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 324                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 325                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 326                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 327                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 328                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 329                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 330                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 331                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 332                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 333                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 334                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 335                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 336                 interrupt-names = "error",
 337                                   "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
 338                                   "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
 339                                   "ch12";
 340                 clocks = <&cpg CPG_MOD 502>;
 341                 clock-names = "fck";
 342                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 343                 resets = <&cpg 502>;
 344                 #dma-cells = <1>;
 345                 dma-channels = <13>;
 346         };
 347
 348         scifa0: serial@e6c40000 {
 349                 compatible = "renesas,scifa-r8a7794",
 350                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 351                 reg = <0 0xe6c40000 0 64>;
 352                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 353                 clocks = <&cpg CPG_MOD 204>;
 354                 clock-names = "fck";
 355                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 356                        <&dmac1 0x21>, <&dmac1 0x22>;
 357                 dma-names = "tx", "rx", "tx", "rx";
 358                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 359                 resets = <&cpg 204>;
 360                 status = "disabled";
 361         };
 362
 363         scifa1: serial@e6c50000 {
 364                 compatible = "renesas,scifa-r8a7794",
 365                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 366                 reg = <0 0xe6c50000 0 64>;
 367                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 368                 clocks = <&cpg CPG_MOD 203>;
 369                 clock-names = "fck";
 370                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 371                        <&dmac1 0x25>, <&dmac1 0x26>;
 372                 dma-names = "tx", "rx", "tx", "rx";
 373                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 374                 resets = <&cpg 203>;
 375                 status = "disabled";
 376         };
 377
 378         scifa2: serial@e6c60000 {
 379                 compatible = "renesas,scifa-r8a7794",
 380                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 381                 reg = <0 0xe6c60000 0 64>;
 382                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 383                 clocks = <&cpg CPG_MOD 202>;
 384                 clock-names = "fck";
 385                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 386                        <&dmac1 0x27>, <&dmac1 0x28>;
 387                 dma-names = "tx", "rx", "tx", "rx";
 388                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 389                 resets = <&cpg 202>;
 390                 status = "disabled";
 391         };
 392
 393         scifa3: serial@e6c70000 {
 394                 compatible = "renesas,scifa-r8a7794",
 395                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 396                 reg = <0 0xe6c70000 0 64>;
 397                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 398                 clocks = <&cpg CPG_MOD 1106>;
 399                 clock-names = "fck";
 400                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 401                        <&dmac1 0x1b>, <&dmac1 0x1c>;
 402                 dma-names = "tx", "rx", "tx", "rx";
 403                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 404                 resets = <&cpg 1106>;
 405                 status = "disabled";
 406         };
 407
 408         scifa4: serial@e6c78000 {
 409                 compatible = "renesas,scifa-r8a7794",
 410                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 411                 reg = <0 0xe6c78000 0 64>;
 412                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 413                 clocks = <&cpg CPG_MOD 1107>;
 414                 clock-names = "fck";
 415                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 416                        <&dmac1 0x1f>, <&dmac1 0x20>;
 417                 dma-names = "tx", "rx", "tx", "rx";
 418                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 419                 resets = <&cpg 1107>;
 420                 status = "disabled";
 421         };
 422
 423         scifa5: serial@e6c80000 {
 424                 compatible = "renesas,scifa-r8a7794",
 425                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 426                 reg = <0 0xe6c80000 0 64>;
 427                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 428                 clocks = <&cpg CPG_MOD 1108>;
 429                 clock-names = "fck";
 430                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 431                        <&dmac1 0x23>, <&dmac1 0x24>;
 432                 dma-names = "tx", "rx", "tx", "rx";
 433                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 434                 resets = <&cpg 1108>;
 435                 status = "disabled";
 436         };
 437
 438         scifb0: serial@e6c20000 {
 439                 compatible = "renesas,scifb-r8a7794",
 440                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 441                 reg = <0 0xe6c20000 0 0x100>;
 442                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 443                 clocks = <&cpg CPG_MOD 206>;
 444                 clock-names = "fck";
 445                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 446                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 447                 dma-names = "tx", "rx", "tx", "rx";
 448                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 449                 resets = <&cpg 206>;
 450                 status = "disabled";
 451         };
 452
 453         scifb1: serial@e6c30000 {
 454                 compatible = "renesas,scifb-r8a7794",
 455                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 456                 reg = <0 0xe6c30000 0 0x100>;
 457                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 458                 clocks = <&cpg CPG_MOD 207>;
 459                 clock-names = "fck";
 460                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 461                        <&dmac1 0x19>, <&dmac1 0x1a>;
 462                 dma-names = "tx", "rx", "tx", "rx";
 463                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 464                 resets = <&cpg 207>;
 465                 status = "disabled";
 466         };
 467
 468         scifb2: serial@e6ce0000 {
 469                 compatible = "renesas,scifb-r8a7794",
 470                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 471                 reg = <0 0xe6ce0000 0 0x100>;
 472                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 473                 clocks = <&cpg CPG_MOD 216>;
 474                 clock-names = "fck";
 475                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 476                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 477                 dma-names = "tx", "rx", "tx", "rx";
 478                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 479                 resets = <&cpg 216>;
 480                 status = "disabled";
 481         };
 482
 483         scif0: serial@e6e60000 {
 484                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 485                              "renesas,scif";
 486                 reg = <0 0xe6e60000 0 64>;
 487                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 488                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 489                          <&scif_clk>;
 490                 clock-names = "fck", "brg_int", "scif_clk";
 491                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 492                        <&dmac1 0x29>, <&dmac1 0x2a>;
 493                 dma-names = "tx", "rx", "tx", "rx";
 494                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 495                 resets = <&cpg 721>;
 496                 status = "disabled";
 497         };
 498
 499         scif1: serial@e6e68000 {
 500                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 501                              "renesas,scif";
 502                 reg = <0 0xe6e68000 0 64>;
 503                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 504                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 505                          <&scif_clk>;
 506                 clock-names = "fck", "brg_int", "scif_clk";
 507                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 508                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 509                 dma-names = "tx", "rx", "tx", "rx";
 510                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 511                 resets = <&cpg 720>;
 512                 status = "disabled";
 513         };
 514
 515         scif2: serial@e6e58000 {
 516                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 517                              "renesas,scif";
 518                 reg = <0 0xe6e58000 0 64>;
 519                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 520                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 521                          <&scif_clk>;
 522                 clock-names = "fck", "brg_int", "scif_clk";
 523                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 524                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 525                 dma-names = "tx", "rx", "tx", "rx";
 526                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 527                 resets = <&cpg 719>;
 528                 status = "disabled";
 529         };
 530
 531         scif3: serial@e6ea8000 {
 532                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 533                              "renesas,scif";
 534                 reg = <0 0xe6ea8000 0 64>;
 535                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 536                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 537                          <&scif_clk>;
 538                 clock-names = "fck", "brg_int", "scif_clk";
 539                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 540                        <&dmac1 0x2f>, <&dmac1 0x30>;
 541                 dma-names = "tx", "rx", "tx", "rx";
 542                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 543                 resets = <&cpg 718>;
 544                 status = "disabled";
 545         };
 546
 547         scif4: serial@e6ee0000 {
 548                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 549                              "renesas,scif";
 550                 reg = <0 0xe6ee0000 0 64>;
 551                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 552                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 553                          <&scif_clk>;
 554                 clock-names = "fck", "brg_int", "scif_clk";
 555                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 556                        <&dmac1 0xfb>, <&dmac1 0xfc>;
 557                 dma-names = "tx", "rx", "tx", "rx";
 558                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 559                 resets = <&cpg 715>;
 560                 status = "disabled";
 561         };
 562
 563         scif5: serial@e6ee8000 {
 564                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 565                              "renesas,scif";
 566                 reg = <0 0xe6ee8000 0 64>;
 567                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 568                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 569                          <&scif_clk>;
 570                 clock-names = "fck", "brg_int", "scif_clk";
 571                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 572                        <&dmac1 0xfd>, <&dmac1 0xfe>;
 573                 dma-names = "tx", "rx", "tx", "rx";
 574                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 575                 resets = <&cpg 714>;
 576                 status = "disabled";
 577         };
 578
 579         hscif0: serial@e62c0000 {
 580                 compatible = "renesas,hscif-r8a7794",
 581                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 582                 reg = <0 0xe62c0000 0 96>;
 583                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 584                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 585                          <&scif_clk>;
 586                 clock-names = "fck", "brg_int", "scif_clk";
 587                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 588                        <&dmac1 0x39>, <&dmac1 0x3a>;
 589                 dma-names = "tx", "rx", "tx", "rx";
 590                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 591                 resets = <&cpg 717>;
 592                 status = "disabled";
 593         };
 594
 595         hscif1: serial@e62c8000 {
 596                 compatible = "renesas,hscif-r8a7794",
 597                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 598                 reg = <0 0xe62c8000 0 96>;
 599                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 600                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 601                          <&scif_clk>;
 602                 clock-names = "fck", "brg_int", "scif_clk";
 603                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 604                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 605                 dma-names = "tx", "rx", "tx", "rx";
 606                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 607                 resets = <&cpg 716>;
 608                 status = "disabled";
 609         };
 610
 611         hscif2: serial@e62d0000 {
 612                 compatible = "renesas,hscif-r8a7794",
 613                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 614                 reg = <0 0xe62d0000 0 96>;
 615                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 616                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 617                          <&scif_clk>;
 618                 clock-names = "fck", "brg_int", "scif_clk";
 619                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 620                        <&dmac1 0x3b>, <&dmac1 0x3c>;
 621                 dma-names = "tx", "rx", "tx", "rx";
 622                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 623                 resets = <&cpg 713>;
 624                 status = "disabled";
 625         };
 626
 627         icram0: sram@e63a0000 {
 628                 compatible = "mmio-sram";
 629                 reg = <0 0xe63a0000 0 0x12000>;
 630         };
 631
 632         icram1: sram@e63c0000 {
 633                 compatible = "mmio-sram";
 634                 reg = <0 0xe63c0000 0 0x1000>;
 635                 #address-cells = <1>;
 636                 #size-cells = <1>;
 637                 ranges = <0 0 0xe63c0000 0x1000>;
 638
 639                 smp-sram@0 {
 640                         compatible = "renesas,smp-sram";
 641                         reg = <0 0x10>;
 642                 };
 643         };
 644
 645         ether: ethernet@ee700000 {
 646                 compatible = "renesas,ether-r8a7794",
 647                              "renesas,rcar-gen2-ether";
 648                 reg = <0 0xee700000 0 0x400>;
 649                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 650                 clocks = <&cpg CPG_MOD 813>;
 651                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 652                 resets = <&cpg 813>;
 653                 phy-mode = "rmii";
 654                 #address-cells = <1>;
 655                 #size-cells = <0>;
 656                 status = "disabled";
 657         };
 658
 659         avb: ethernet@e6800000 {
 660                 compatible = "renesas,etheravb-r8a7794",
 661                              "renesas,etheravb-rcar-gen2";
 662                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 663                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 664                 clocks = <&cpg CPG_MOD 812>;
 665                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 666                 resets = <&cpg 812>;
 667                 #address-cells = <1>;
 668                 #size-cells = <0>;
 669                 status = "disabled";
 670         };
 671
 672         /* The memory map in the User's Manual maps the cores to bus numbers */
 673         i2c0: i2c@e6508000 {
 674                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 675                 reg = <0 0xe6508000 0 0x40>;
 676                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 677                 clocks = <&cpg CPG_MOD 931>;
 678                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 679                 resets = <&cpg 931>;
 680                 #address-cells = <1>;
 681                 #size-cells = <0>;
 682                 i2c-scl-internal-delay-ns = <6>;
 683                 status = "disabled";
 684         };
 685
 686         i2c1: i2c@e6518000 {
 687                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 688                 reg = <0 0xe6518000 0 0x40>;
 689                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 690                 clocks = <&cpg CPG_MOD 930>;
 691                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 692                 resets = <&cpg 930>;
 693                 #address-cells = <1>;
 694                 #size-cells = <0>;
 695                 i2c-scl-internal-delay-ns = <6>;
 696                 status = "disabled";
 697         };
 698
 699         i2c2: i2c@e6530000 {
 700                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 701                 reg = <0 0xe6530000 0 0x40>;
 702                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 703                 clocks = <&cpg CPG_MOD 929>;
 704                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 705                 resets = <&cpg 929>;
 706                 #address-cells = <1>;
 707                 #size-cells = <0>;
 708                 i2c-scl-internal-delay-ns = <6>;
 709                 status = "disabled";
 710         };
 711
 712         i2c3: i2c@e6540000 {
 713                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 714                 reg = <0 0xe6540000 0 0x40>;
 715                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 716                 clocks = <&cpg CPG_MOD 928>;
 717                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 718                 resets = <&cpg 928>;
 719                 #address-cells = <1>;
 720                 #size-cells = <0>;
 721                 i2c-scl-internal-delay-ns = <6>;
 722                 status = "disabled";
 723         };
 724
 725         i2c4: i2c@e6520000 {
 726                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 727                 reg = <0 0xe6520000 0 0x40>;
 728                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 729                 clocks = <&cpg CPG_MOD 927>;
 730                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 731                 resets = <&cpg 927>;
 732                 #address-cells = <1>;
 733                 #size-cells = <0>;
 734                 i2c-scl-internal-delay-ns = <6>;
 735                 status = "disabled";
 736         };
 737
 738         i2c5: i2c@e6528000 {
 739                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 740                 reg = <0 0xe6528000 0 0x40>;
 741                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 742                 clocks = <&cpg CPG_MOD 925>;
 743                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 744                 resets = <&cpg 925>;
 745                 #address-cells = <1>;
 746                 #size-cells = <0>;
 747                 i2c-scl-internal-delay-ns = <6>;
 748                 status = "disabled";
 749         };
 750
 751         i2c6: i2c@e6500000 {
 752                 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
 753                              "renesas,rmobile-iic";
 754                 reg = <0 0xe6500000 0 0x425>;
 755                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 756                 clocks = <&cpg CPG_MOD 318>;
 757                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 758                        <&dmac1 0x61>, <&dmac1 0x62>;
 759                 dma-names = "tx", "rx", "tx", "rx";
 760                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 761                 resets = <&cpg 318>;
 762                 #address-cells = <1>;
 763                 #size-cells = <0>;
 764                 status = "disabled";
 765         };
 766
 767         i2c7: i2c@e6510000 {
 768                 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
 769                              "renesas,rmobile-iic";
 770                 reg = <0 0xe6510000 0 0x425>;
 771                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 772                 clocks = <&cpg CPG_MOD 323>;
 773                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 774                        <&dmac1 0x65>, <&dmac1 0x66>;
 775                 dma-names = "tx", "rx", "tx", "rx";
 776                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 777                 resets = <&cpg 323>;
 778                 #address-cells = <1>;
 779                 #size-cells = <0>;
 780                 status = "disabled";
 781         };
 782
 783         mmcif0: mmc@ee200000 {
 784                 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
 785                 reg = <0 0xee200000 0 0x80>;
 786                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 787                 clocks = <&cpg CPG_MOD 315>;
 788                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 789                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 790                 dma-names = "tx", "rx", "tx", "rx";
 791                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 792                 resets = <&cpg 315>;
 793                 reg-io-width = <4>;
 794                 status = "disabled";
 795         };
 796
 797         sdhi0: sd@ee100000 {
 798                 compatible = "renesas,sdhi-r8a7794",
 799                              "renesas,rcar-gen2-sdhi";
 800                 reg = <0 0xee100000 0 0x328>;
 801                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 802                 clocks = <&cpg CPG_MOD 314>;
 803                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 804                        <&dmac1 0xcd>, <&dmac1 0xce>;
 805                 dma-names = "tx", "rx", "tx", "rx";
 806                 max-frequency = <195000000>;
 807                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 808                 resets = <&cpg 314>;
 809                 status = "disabled";
 810         };
 811
 812         sdhi1: sd@ee140000 {
 813                 compatible = "renesas,sdhi-r8a7794",
 814                              "renesas,rcar-gen2-sdhi";
 815                 reg = <0 0xee140000 0 0x100>;
 816                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 817                 clocks = <&cpg CPG_MOD 312>;
 818                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 819                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 820                 dma-names = "tx", "rx", "tx", "rx";
 821                 max-frequency = <97500000>;
 822                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 823                 resets = <&cpg 312>;
 824                 status = "disabled";
 825         };
 826
 827         sdhi2: sd@ee160000 {
 828                 compatible = "renesas,sdhi-r8a7794",
 829                              "renesas,rcar-gen2-sdhi";
 830                 reg = <0 0xee160000 0 0x100>;
 831                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 832                 clocks = <&cpg CPG_MOD 311>;
 833                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 834                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 835                 dma-names = "tx", "rx", "tx", "rx";
 836                 max-frequency = <97500000>;
 837                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 838                 resets = <&cpg 311>;
 839                 status = "disabled";
 840         };
 841
 842         qspi: spi@e6b10000 {
 843                 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
 844                 reg = <0 0xe6b10000 0 0x2c>;
 845                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 846                 clocks = <&cpg CPG_MOD 917>;
 847                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 848                        <&dmac1 0x17>, <&dmac1 0x18>;
 849                 dma-names = "tx", "rx", "tx", "rx";
 850                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 851                 resets = <&cpg 917>;
 852                 num-cs = <1>;
 853                 #address-cells = <1>;
 854                 #size-cells = <0>;
 855                 status = "disabled";
 856         };
 857
 858         vin0: video@e6ef0000 {
 859                 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
 860                 reg = <0 0xe6ef0000 0 0x1000>;
 861                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 862                 clocks = <&cpg CPG_MOD 811>;
 863                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 864                 resets = <&cpg 811>;
 865                 status = "disabled";
 866         };
 867
 868         vin1: video@e6ef1000 {
 869                 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
 870                 reg = <0 0xe6ef1000 0 0x1000>;
 871                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 872                 clocks = <&cpg CPG_MOD 810>;
 873                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 874                 resets = <&cpg 810>;
 875                 status = "disabled";
 876         };
 877
 878         pci0: pci@ee090000 {
 879                 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
 880                 device_type = "pci";
 881                 reg = <0 0xee090000 0 0xc00>,
 882                       <0 0xee080000 0 0x1100>;
 883                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 884                 clocks = <&cpg CPG_MOD 703>;
 885                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 886                 resets = <&cpg 703>;
 887                 status = "disabled";
 888
 889                 bus-range = <0 0>;
 890                 #address-cells = <3>;
 891                 #size-cells = <2>;
 892                 #interrupt-cells = <1>;
 893                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
 894                 interrupt-map-mask = <0xff00 0 0 0x7>;
 895                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 896                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 897                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 898
 899                 usb@1,0 {
 900                         reg = <0x800 0 0 0 0>;
 901                         phys = <&usb0 0>;
 902                         phy-names = "usb";
 903                 };
 904
 905                 usb@2,0 {
 906                         reg = <0x1000 0 0 0 0>;
 907                         phys = <&usb0 0>;
 908                         phy-names = "usb";
 909                 };
 910         };
 911
 912         pci1: pci@ee0d0000 {
 913                 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
 914                 device_type = "pci";
 915                 reg = <0 0xee0d0000 0 0xc00>,
 916                       <0 0xee0c0000 0 0x1100>;
 917                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 918                 clocks = <&cpg CPG_MOD 703>;
 919                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 920                 resets = <&cpg 703>;
 921                 status = "disabled";
 922
 923                 bus-range = <1 1>;
 924                 #address-cells = <3>;
 925                 #size-cells = <2>;
 926                 #interrupt-cells = <1>;
 927                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
 928                 interrupt-map-mask = <0xff00 0 0 0x7>;
 929                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 930                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 931                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 932
 933                 usb@1,0 {
 934                         reg = <0x10800 0 0 0 0>;
 935                         phys = <&usb2 0>;
 936                         phy-names = "usb";
 937                 };
 938
 939                 usb@2,0 {
 940                         reg = <0x11000 0 0 0 0>;
 941                         phys = <&usb2 0>;
 942                         phy-names = "usb";
 943                 };
 944         };
 945
 946         hsusb: usb@e6590000 {
 947                 compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
 948                 reg = <0 0xe6590000 0 0x100>;
 949                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 950                 clocks = <&cpg CPG_MOD 704>;
 951                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 952                 resets = <&cpg 704>;
 953                 renesas,buswait = <4>;
 954                 phys = <&usb0 1>;
 955                 phy-names = "usb";
 956                 status = "disabled";
 957         };
 958
 959         usbphy: usb-phy@e6590100 {
 960                 compatible = "renesas,usb-phy-r8a7794",
 961                              "renesas,rcar-gen2-usb-phy";
 962                 reg = <0 0xe6590100 0 0x100>;
 963                 #address-cells = <1>;
 964                 #size-cells = <0>;
 965                 clocks = <&cpg CPG_MOD 704>;
 966                 clock-names = "usbhs";
 967                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 968                 resets = <&cpg 704>;
 969                 status = "disabled";
 970
 971                 usb0: usb-channel@0 {
 972                         reg = <0>;
 973                         #phy-cells = <1>;
 974                 };
 975                 usb2: usb-channel@2 {
 976                         reg = <2>;
 977                         #phy-cells = <1>;
 978                 };
 979         };
 980
 981         vsp@fe928000 {
 982                 compatible = "renesas,vsp1";
 983                 reg = <0 0xfe928000 0 0x8000>;
 984                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
 985                 clocks = <&cpg CPG_MOD 131>;
 986                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 987                 resets = <&cpg 131>;
 988         };
 989
 990         vsp@fe930000 {
 991                 compatible = "renesas,vsp1";
 992                 reg = <0 0xfe930000 0 0x8000>;
 993                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
 994                 clocks = <&cpg CPG_MOD 128>;
 995                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 996                 resets = <&cpg 128>;
 997         };
 998
 999         du: display@feb00000 {
1000                 compatible = "renesas,du-r8a7794";
1001                 reg = <0 0xfeb00000 0 0x40000>;
1002                 reg-names = "du";
1003                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1004                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1005                 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1006                 clock-names = "du.0", "du.1";
1007                 status = "disabled";
1008
1009                 ports {
1010                         #address-cells = <1>;
1011                         #size-cells = <0>;
1012
1013                         port@0 {
1014                                 reg = <0>;
1015                                 du_out_rgb0: endpoint {
1016                                 };
1017                         };
1018                         port@1 {
1019                                 reg = <1>;
1020                                 du_out_rgb1: endpoint {
1021                                 };
1022                         };
1023                 };
1024         };
1025
1026         can0: can@e6e80000 {
1027                 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1028                 reg = <0 0xe6e80000 0 0x1000>;
1029                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1030                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1031                          <&can_clk>;
1032                 clock-names = "clkp1", "clkp2", "can_clk";
1033                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1034                 resets = <&cpg 916>;
1035                 status = "disabled";
1036         };
1037
1038         can1: can@e6e88000 {
1039                 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1040                 reg = <0 0xe6e88000 0 0x1000>;
1041                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1042                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1043                          <&can_clk>;
1044                 clock-names = "clkp1", "clkp2", "can_clk";
1045                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1046                 resets = <&cpg 915>;
1047                 status = "disabled";
1048         };
1049
1050         /* External root clock */
1051         extal_clk: extal {
1052                 compatible = "fixed-clock";
1053                 #clock-cells = <0>;
1054                 /* This value must be overridden by the board. */
1055                 clock-frequency = <0>;
1056         };
1057
1058         /* External USB clock - can be overridden by the board */
1059         usb_extal_clk: usb_extal {
1060                 compatible = "fixed-clock";
1061                 #clock-cells = <0>;
1062                 clock-frequency = <48000000>;
1063         };
1064
1065         /* External CAN clock */
1066         can_clk: can {
1067                 compatible = "fixed-clock";
1068                 #clock-cells = <0>;
1069                 /* This value must be overridden by the board. */
1070                 clock-frequency = <0>;
1071         };
1072
1073         /* External SCIF clock */
1074         scif_clk: scif {
1075                 compatible = "fixed-clock";
1076                 #clock-cells = <0>;
1077                 /* This value must be overridden by the board. */
1078                 clock-frequency = <0>;
1079         };
1080
1081         /*
1082          * The external audio clocks are configured  as 0 Hz fixed
1083          * frequency clocks by default.  Boards that provide audio
1084          * clocks should override them.
1085          */
1086         audio_clka: audio_clka {
1087                 compatible = "fixed-clock";
1088                 #clock-cells = <0>;
1089                 clock-frequency = <0>;
1090         };
1091         audio_clkb: audio_clkb {
1092                 compatible = "fixed-clock";
1093                 #clock-cells = <0>;
1094                 clock-frequency = <0>;
1095         };
1096         audio_clkc: audio_clkc {
1097                 compatible = "fixed-clock";
1098                 #clock-cells = <0>;
1099                 clock-frequency = <0>;
1100         };
1101
1102         cpg: clock-controller@e6150000 {
1103                 compatible = "renesas,r8a7794-cpg-mssr";
1104                 reg = <0 0xe6150000 0 0x1000>;
1105                 clocks = <&extal_clk>, <&usb_extal_clk>;
1106                 clock-names = "extal", "usb_extal";
1107                 #clock-cells = <2>;
1108                 #power-domain-cells = <0>;
1109                 #reset-cells = <1>;
1110         };
1111
1112         rst: reset-controller@e6160000 {
1113                 compatible = "renesas,r8a7794-rst";
1114                 reg = <0 0xe6160000 0 0x0100>;
1115         };
1116
1117         prr: chipid@ff000044 {
1118                 compatible = "renesas,prr";
1119                 reg = <0 0xff000044 0 4>;
1120         };
1121
1122         sysc: system-controller@e6180000 {
1123                 compatible = "renesas,r8a7794-sysc";
1124                 reg = <0 0xe6180000 0 0x0200>;
1125                 #power-domain-cells = <1>;
1126         };
1127
1128         ipmmu_sy0: mmu@e6280000 {
1129                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1130                 reg = <0 0xe6280000 0 0x1000>;
1131                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1132                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1133                 #iommu-cells = <1>;
1134                 status = "disabled";
1135         };
1136
1137         ipmmu_sy1: mmu@e6290000 {
1138                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1139                 reg = <0 0xe6290000 0 0x1000>;
1140                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1141                 #iommu-cells = <1>;
1142                 status = "disabled";
1143         };
1144
1145         ipmmu_ds: mmu@e6740000 {
1146                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1147                 reg = <0 0xe6740000 0 0x1000>;
1148                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1149                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1150                 #iommu-cells = <1>;
1151                 status = "disabled";
1152         };
1153
1154         ipmmu_mp: mmu@ec680000 {
1155                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1156                 reg = <0 0xec680000 0 0x1000>;
1157                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1158                 #iommu-cells = <1>;
1159                 status = "disabled";
1160         };
1161
1162         ipmmu_mx: mmu@fe951000 {
1163                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1164                 reg = <0 0xfe951000 0 0x1000>;
1165                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1166                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1167                 #iommu-cells = <1>;
1168                 status = "disabled";
1169         };
1170
1171         ipmmu_gp: mmu@e62a0000 {
1172                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1173                 reg = <0 0xe62a0000 0 0x1000>;
1174                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1175                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1176                 #iommu-cells = <1>;
1177                 status = "disabled";
1178         };
1179
1180         rcar_sound: sound@ec500000 {
1181                 /*
1182                  * #sound-dai-cells is required
1183                  *
1184                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1185                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1186                  */
1187                 compatible = "renesas,rcar_sound-r8a7794",
1188                              "renesas,rcar_sound-gen2";
1189                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1190                         <0 0xec5a0000 0 0x100>,  /* ADG */
1191                         <0 0xec540000 0 0x1000>, /* SSIU */
1192                         <0 0xec541000 0 0x280>,  /* SSI */
1193                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
1194                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1195
1196                 clocks = <&cpg CPG_MOD 1005>,
1197                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1198                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1199                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1200                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1201                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1202                          <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1203                          <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1204                          <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1205                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1206                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1207                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1208                          <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1209                          <&cpg CPG_CORE R8A7794_CLK_M2>;
1210                 clock-names = "ssi-all",
1211                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1212                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1213                               "src.6", "src.5", "src.4", "src.3", "src.2",
1214                               "src.1",
1215                               "ctu.0", "ctu.1",
1216                               "mix.0", "mix.1",
1217                               "dvc.0", "dvc.1",
1218                               "clk_a", "clk_b", "clk_c", "clk_i";
1219                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1220                 resets = <&cpg 1005>,
1221                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1222                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1223                          <&cpg 1014>, <&cpg 1015>;
1224                 reset-names = "ssi-all",
1225                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1226                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1227
1228                 status = "disabled";
1229
1230                 rcar_sound,dvc {
1231                         dvc0: dvc-0 {
1232                                 dmas = <&audma0 0xbc>;
1233                                 dma-names = "tx";
1234                         };
1235                         dvc1: dvc-1 {
1236                                 dmas = <&audma0 0xbe>;
1237                                 dma-names = "tx";
1238                         };
1239                 };
1240
1241                 rcar_sound,mix {
1242                         mix0: mix-0 { };
1243                         mix1: mix-1 { };
1244                 };
1245
1246                 rcar_sound,ctu {
1247                         ctu00: ctu-0 { };
1248                         ctu01: ctu-1 { };
1249                         ctu02: ctu-2 { };
1250                         ctu03: ctu-3 { };
1251                         ctu10: ctu-4 { };
1252                         ctu11: ctu-5 { };
1253                         ctu12: ctu-6 { };
1254                         ctu13: ctu-7 { };
1255                 };
1256
1257                 rcar_sound,src {
1258                         src-0 {
1259                                 status = "disabled";
1260                         };
1261                         src1: src-1 {
1262                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1263                                 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1264                                 dma-names = "rx", "tx";
1265                         };
1266                         src2: src-2 {
1267                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1268                                 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1269                                 dma-names = "rx", "tx";
1270                         };
1271                         src3: src-3 {
1272                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1273                                 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1274                                 dma-names = "rx", "tx";
1275                         };
1276                         src4: src-4 {
1277                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1278                                 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1279                                 dma-names = "rx", "tx";
1280                         };
1281                         src5: src-5 {
1282                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1283                                 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1284                                 dma-names = "rx", "tx";
1285                         };
1286                         src6: src-6 {
1287                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1288                                 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1289                                 dma-names = "rx", "tx";
1290                         };
1291                 };
1292
1293                 rcar_sound,ssi {
1294                         ssi0: ssi-0 {
1295                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1296                                 dmas = <&audma0 0x01>, <&audma0 0x02>,
1297                                        <&audma0 0x15>, <&audma0 0x16>;
1298                                 dma-names = "rx", "tx", "rxu", "txu";
1299                         };
1300                         ssi1: ssi-1 {
1301                                 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1302                                 dmas = <&audma0 0x03>, <&audma0 0x04>,
1303                                        <&audma0 0x49>, <&audma0 0x4a>;
1304                                 dma-names = "rx", "tx", "rxu", "txu";
1305                         };
1306                         ssi2: ssi-2 {
1307                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1308                                 dmas = <&audma0 0x05>, <&audma0 0x06>,
1309                                        <&audma0 0x63>, <&audma0 0x64>;
1310                                 dma-names = "rx", "tx", "rxu", "txu";
1311                         };
1312                         ssi3: ssi-3 {
1313                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1314                                 dmas = <&audma0 0x07>, <&audma0 0x08>,
1315                                        <&audma0 0x6f>, <&audma0 0x70>;
1316                                 dma-names = "rx", "tx", "rxu", "txu";
1317                         };
1318                         ssi4: ssi-4 {
1319                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1320                                 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1321                                        <&audma0 0x71>, <&audma0 0x72>;
1322                                 dma-names = "rx", "tx", "rxu", "txu";
1323                         };
1324                         ssi5: ssi-5 {
1325                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1326                                 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1327                                        <&audma0 0x73>, <&audma0 0x74>;
1328                                 dma-names = "rx", "tx", "rxu", "txu";
1329                         };
1330                         ssi6: ssi-6 {
1331                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1332                                 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1333                                        <&audma0 0x75>, <&audma0 0x76>;
1334                                 dma-names = "rx", "tx", "rxu", "txu";
1335                         };
1336                         ssi7: ssi-7 {
1337                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1338                                 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1339                                        <&audma0 0x79>, <&audma0 0x7a>;
1340                                 dma-names = "rx", "tx", "rxu", "txu";
1341                         };
1342                         ssi8: ssi-8 {
1343                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1344                                 dmas = <&audma0 0x11>, <&audma0 0x12>,
1345                                        <&audma0 0x7b>, <&audma0 0x7c>;
1346                                 dma-names = "rx", "tx", "rxu", "txu";
1347                         };
1348                         ssi9: ssi-9 {
1349                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1350                                 dmas = <&audma0 0x13>, <&audma0 0x14>,
1351                                        <&audma0 0x7d>, <&audma0 0x7e>;
1352                                 dma-names = "rx", "tx", "rxu", "txu";
1353                         };
1354                 };
1355         };
1356 };