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[mirror_ubuntu-eoan-kernel.git] / arch / arm / boot / dts / rk3288-veyron-mickey.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Google Veyron Mickey Rev 0 board device tree source
4 *
5 * Copyright 2015 Google, Inc
6 */
7
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10
11 / {
12 model = "Google Mickey";
13 compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
14 "google,veyron-mickey-rev6", "google,veyron-mickey-rev5",
15 "google,veyron-mickey-rev4", "google,veyron-mickey-rev3",
16 "google,veyron-mickey-rev2", "google,veyron-mickey-rev1",
17 "google,veyron-mickey-rev0", "google,veyron-mickey",
18 "google,veyron", "rockchip,rk3288";
19
20 vcc_5v: vcc-5v {
21 vin-supply = <&vcc33_sys>;
22 };
23
24 vcc33_io: vcc33_io {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc33_io";
27 regulator-always-on;
28 regulator-boot-on;
29 vin-supply = <&vcc33_sys>;
30 };
31 };
32
33 &cpu_thermal {
34 /delete-node/ trips;
35 /delete-node/ cooling-maps;
36
37 trips {
38 cpu_alert_almost_warm: cpu_alert_almost_warm {
39 temperature = <63000>; /* millicelsius */
40 hysteresis = <2000>; /* millicelsius */
41 type = "passive";
42 };
43 cpu_alert_warm: cpu_alert_warm {
44 temperature = <65000>; /* millicelsius */
45 hysteresis = <2000>; /* millicelsius */
46 type = "passive";
47 };
48 cpu_alert_almost_hot: cpu_alert_almost_hot {
49 temperature = <80000>; /* millicelsius */
50 hysteresis = <2000>; /* millicelsius */
51 type = "passive";
52 };
53 cpu_alert_hot: cpu_alert_hot {
54 temperature = <82000>; /* millicelsius */
55 hysteresis = <2000>; /* millicelsius */
56 type = "passive";
57 };
58 cpu_alert_hotter: cpu_alert_hotter {
59 temperature = <84000>; /* millicelsius */
60 hysteresis = <2000>; /* millicelsius */
61 type = "passive";
62 };
63 cpu_alert_very_hot: cpu_alert_very_hot {
64 temperature = <85000>; /* millicelsius */
65 hysteresis = <2000>; /* millicelsius */
66 type = "passive";
67 };
68 cpu_crit: cpu_crit {
69 temperature = <90000>; /* millicelsius */
70 hysteresis = <2000>; /* millicelsius */
71 type = "critical";
72 };
73 };
74
75 cooling-maps {
76 /*
77 * After 1st level, throttle the CPU down to as low as 1.4 GHz
78 * and don't let the GPU go faster than 400 MHz.
79 */
80 cpu_warm_limit_cpu {
81 trip = <&cpu_alert_warm>;
82 cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,
83 <&cpu1 THERMAL_NO_LIMIT 4>,
84 <&cpu2 THERMAL_NO_LIMIT 4>,
85 <&cpu3 THERMAL_NO_LIMIT 4>;
86 };
87 cpu_warm_limit_gpu {
88 trip = <&cpu_alert_warm>;
89 cooling-device = <&gpu 1 1>;
90 };
91
92 /*
93 * Add some discrete steps to help throttling system deal
94 * with the fact that there are two passive cooling devices:
95 * the CPU and the GPU.
96 *
97 * - 1.2 GHz - 1.0 GHz (almost hot)
98 * - 800 MHz (hot)
99 * - 800 MHz - 696 MHz (hotter)
100 * - 696 MHz - min (very hot)
101 *
102 * Note:
103 * - 800 MHz appears to be a "sweet spot" for me. I can run
104 * some pretty serious workload here and be happy.
105 * - After 696 MHz we stop lowering voltage, so throttling
106 * past there is less effective.
107 */
108 cpu_almost_hot_limit_cpu {
109 trip = <&cpu_alert_almost_hot>;
110 cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,
111 <&cpu3 5 6>;
112 };
113 cpu_hot_limit_cpu {
114 trip = <&cpu_alert_hot>;
115 cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,
116 <&cpu3 7 7>;
117 };
118 cpu_hotter_limit_cpu {
119 trip = <&cpu_alert_hotter>;
120 cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,
121 <&cpu3 7 8>;
122 };
123 cpu_very_hot_limit_cpu {
124 trip = <&cpu_alert_very_hot>;
125 cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,
126 <&cpu1 8 THERMAL_NO_LIMIT>,
127 <&cpu2 8 THERMAL_NO_LIMIT>,
128 <&cpu3 8 THERMAL_NO_LIMIT>;
129 };
130
131 /* At very hot, don't let GPU go over 300 MHz */
132 cpu_very_hot_limit_gpu {
133 trip = <&cpu_alert_very_hot>;
134 cooling-device = <&gpu 2 2>;
135 };
136 };
137 };
138
139 &gpu_thermal {
140 /delete-node/ trips;
141 /delete-node/ cooling-maps;
142
143 trips {
144 gpu_alert_warmish: gpu_alert_warmish {
145 temperature = <60000>; /* millicelsius */
146 hysteresis = <2000>; /* millicelsius */
147 type = "passive";
148 };
149 gpu_alert_warm: gpu_alert_warm {
150 temperature = <65000>; /* millicelsius */
151 hysteresis = <2000>; /* millicelsius */
152 type = "passive";
153 };
154 gpu_alert_hotter: gpu_alert_hotter {
155 temperature = <84000>; /* millicelsius */
156 hysteresis = <2000>; /* millicelsius */
157 type = "passive";
158 };
159 gpu_alert_very_very_hot: gpu_alert_very_very_hot {
160 temperature = <86000>; /* millicelsius */
161 hysteresis = <2000>; /* millicelsius */
162 type = "passive";
163 };
164 gpu_crit: gpu_crit {
165 temperature = <90000>; /* millicelsius */
166 hysteresis = <2000>; /* millicelsius */
167 type = "critical";
168 };
169 };
170
171 cooling-maps {
172 /* After 1st level throttle the GPU down to as low as 400 MHz */
173 gpu_warmish_limit_gpu {
174 trip = <&gpu_alert_warmish>;
175 cooling-device = <&gpu THERMAL_NO_LIMIT 1>;
176 };
177
178 /*
179 * Slightly after we throttle the GPU, we'll also make sure that
180 * the CPU can't go faster than 1.4 GHz. Note that we won't
181 * throttle the CPU lower than 1.4 GHz due to GPU heat--we'll
182 * let the CPU do the rest itself.
183 */
184 gpu_warm_limit_cpu {
185 trip = <&gpu_alert_warm>;
186 cooling-device = <&cpu0 4 4>,
187 <&cpu1 4 4>,
188 <&cpu2 4 4>,
189 <&cpu3 4 4>;
190 };
191
192 /* When hot, GPU goes down to 300 MHz */
193 gpu_hotter_limit_gpu {
194 trip = <&gpu_alert_hotter>;
195 cooling-device = <&gpu 2 2>;
196 };
197
198 /* When really hot, don't let GPU go _above_ 300 MHz */
199 gpu_very_very_hot_limit_gpu {
200 trip = <&gpu_alert_very_very_hot>;
201 cooling-device = <&gpu 2 THERMAL_NO_LIMIT>;
202 };
203 };
204 };
205
206 &i2c2 {
207 status = "disabled";
208 };
209
210 &i2c4 {
211 status = "disabled";
212 };
213
214 &i2s {
215 status = "okay";
216 };
217
218 &rk808 {
219 pinctrl-names = "default";
220 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
221 dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
222 <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
223
224 /delete-property/ vcc6-supply;
225 /delete-property/ vcc12-supply;
226
227 vcc11-supply = <&vcc33_sys>;
228
229 regulators {
230 /* vcc33_io is sourced directly from vcc33_sys */
231 /delete-node/ LDO_REG1;
232 /delete-node/ LDO_REG7;
233
234 /* This is not a pwren anymore, but the real power supply */
235 vdd10_lcd: LDO_REG7 {
236 regulator-always-on;
237 regulator-boot-on;
238 regulator-min-microvolt = <1000000>;
239 regulator-max-microvolt = <1000000>;
240 regulator-name = "vdd10_lcd";
241 regulator-suspend-mem-disabled;
242 };
243
244 vcc18_lcd: LDO_REG8 {
245 regulator-always-on;
246 regulator-boot-on;
247 regulator-min-microvolt = <1800000>;
248 regulator-max-microvolt = <1800000>;
249 regulator-name = "vcc18_lcd";
250 regulator-suspend-mem-disabled;
251 };
252 };
253 };
254
255 &gpio0 {
256 gpio-line-names = "PMIC_SLEEP_AP",
257 "",
258 "",
259 "",
260 "PMIC_INT_L",
261 "POWER_BUTTON_L",
262 "",
263 "",
264
265 "",
266 /*
267 * RECOVERY_SW_L is Chrome OS ABI. Schematics call
268 * it REC_MODE_L.
269 */
270 "RECOVERY_SW_L",
271 "OT_RESET",
272 "",
273 "",
274 "AP_WARM_RESET_H",
275 "",
276 "I2C0_SDA_PMIC",
277
278 "I2C0_SCL_PMIC",
279 "",
280 "nFALUT";
281 };
282
283 &gpio2 {
284 gpio-line-names = "CONFIG0",
285 "CONFIG1",
286 "CONFIG2",
287 "",
288 "",
289 "",
290 "",
291 "CONFIG3",
292
293 "",
294 "EMMC_RST_L";
295 };
296
297 &gpio3 {
298 gpio-line-names = "FLASH0_D0",
299 "FLASH0_D1",
300 "FLASH0_D2",
301 "FLASH0_D3",
302 "FLASH0_D4",
303 "FLASH0_D5",
304 "FLASH0_D6",
305 "FLASH0_D7",
306
307 "",
308 "",
309 "",
310 "",
311 "",
312 "",
313 "",
314 "",
315
316 "FLASH0_CS2/EMMC_CMD",
317 "",
318 "FLASH0_DQS/EMMC_CLKO";
319 };
320
321 &gpio4 {
322 gpio-line-names = "",
323 "",
324 "",
325 "",
326 "",
327 "",
328 "",
329 "",
330
331 "",
332 "",
333 "",
334 "",
335 "",
336 "",
337 "",
338 "",
339
340 "UART0_RXD",
341 "UART0_TXD",
342 "UART0_CTS_L",
343 "UART0_RTS_L",
344 "SDIO0_D0",
345 "SDIO0_D1",
346 "SDIO0_D2",
347 "SDIO0_D3",
348
349 "SDIO0_CMD",
350 "SDIO0_CLK",
351 "BT_DEV_WAKE",
352 "",
353 "WIFI_ENABLE_H",
354 "BT_ENABLE_L",
355 "WIFI_HOST_WAKE",
356 "BT_HOST_WAKE";
357 };
358
359 &gpio7 {
360 gpio-line-names = "",
361 "PWM_LOG",
362 "",
363 "",
364 "TPM_INT_H",
365 "SDMMC_DET_L",
366 /*
367 * AP_FLASH_WP_L is Chrome OS ABI. Schematics call
368 * it FW_WP_AP.
369 */
370 "AP_FLASH_WP_L",
371 "",
372
373 "CPU_NMI",
374 "DVSOK",
375 "HDMI_WAKE",
376 "POWER_HDMI_ON",
377 "DVS1",
378 "",
379 "",
380 "DVS2",
381
382 "HDMI_CEC",
383 "",
384 "",
385 "I2C5_SDA_HDMI",
386 "I2C5_SCL_HDMI",
387 "",
388 "UART2_RXD",
389 "UART2_TXD";
390 };
391
392 &gpio8 {
393 gpio-line-names = "RAM_ID0",
394 "RAM_ID1",
395 "RAM_ID2",
396 "RAM_ID3",
397 "I2C1_SDA_TPM",
398 "I2C1_SCL_TPM",
399 "SPI2_CLK",
400 "SPI2_CS0",
401
402 "SPI2_RXD",
403 "SPI2_TXD";
404 };
405
406 &pinctrl {
407 hdmi {
408 power_hdmi_on: power-hdmi-on {
409 rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
410 };
411 };
412
413 pmic {
414 dvs_1: dvs-1 {
415 rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
416 };
417
418 dvs_2: dvs-2 {
419 rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
420 };
421 };
422 };
423
424 &usb_host0_ehci {
425 status = "disabled";
426 };
427
428 &usb_host1 {
429 status = "disabled";
430 };
431
432 &vcc50_hdmi {
433 enable-active-high;
434 gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&power_hdmi_on>;
437 };