arch/arm/boot/dts/socfpga_arria10_socdk.dtsi

   1 /*
   2  * Copyright (C) 2015 Altera Corporation <www.altera.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17 #include "socfpga_arria10.dtsi"
  18
  19 / {
  20         model = "Altera SOCFPGA Arria 10";
  21         compatible = "altr,socfpga-arria10", "altr,socfpga";
  22
  23         aliases {
  24                 ethernet0 = &gmac0;
  25         };
  26
  27         chosen {
  28                 bootargs = "earlyprintk";
  29                 stdout-path = "serial1:115200n8";
  30         };
  31
  32         memory {
  33                 name = "memory";
  34                 device_type = "memory";
  35                 reg = <0x0 0x40000000>; /* 1GB */
  36         };
  37
  38         soc {
  39                 clkmgr@ffd04000 {
  40                         clocks {
  41                                 osc1 {
  42                                         clock-frequency = <25000000>;
  43                                 };
  44                         };
  45                 };
  46         };
  47 };
  48
  49 &gmac0 {
  50         phy-mode = "rgmii";
  51         phy-addr = <0xffffffff>; /* probe for phy addr */
  52
  53         /*
  54          * These skews assume the user's FPGA design is adding 600ps of delay
  55          * for TX_CLK on Arria 10.
  56          *
  57          * All skews are offset since hardware skew values for the ksz9031
  58          * range from a negative skew to a positive skew.
  59          * See the micrel-ksz90x1.txt Documentation file for details.
  60          */
  61         txd0-skew-ps = <0>; /* -420ps */
  62         txd1-skew-ps = <0>; /* -420ps */
  63         txd2-skew-ps = <0>; /* -420ps */
  64         txd3-skew-ps = <0>; /* -420ps */
  65         rxd0-skew-ps = <420>; /* 0ps */
  66         rxd1-skew-ps = <420>; /* 0ps */
  67         rxd2-skew-ps = <420>; /* 0ps */
  68         rxd3-skew-ps = <420>; /* 0ps */
  69         txen-skew-ps = <0>; /* -420ps */
  70         txc-skew-ps = <1860>; /* 960ps */
  71         rxdv-skew-ps = <420>; /* 0ps */
  72         rxc-skew-ps = <1680>; /* 780ps */
  73         max-frame-size = <3800>;
  74         status = "okay";
  75 };
  76
  77 &i2c1 {
  78         speed-mode = <0>;
  79         status = "okay";
  80
  81         /*
  82          * adjust the falling times to decrease the i2c frequency to 50Khz
  83          * because the LCD module does not work at the standard 100Khz
  84          */
  85         i2c-sda-falling-time-ns = <6000>;
  86         i2c-scl-falling-time-ns = <6000>;
  87
  88         eeprom@51 {
  89                 compatible = "atmel,24c32";
  90                 reg = <0x51>;
  91                 pagesize = <32>;
  92         };
  93
  94         rtc@68 {
  95                 compatible = "dallas,ds1339";
  96                 reg = <0x68>;
  97         };
  98 };
  99
 100 &uart1 {
 101         status = "okay";
 102 };
 103
 104 &usb0 {
 105         status = "okay";
 106 };