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spi-imx: Implements handling of the SPI_READY mode flag.
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1 /*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "ste-dbx5x0.dtsi"
14 #include "ste-href-family-pinctrl.dtsi"
15
16 / {
17 memory {
18 reg = <0x00000000 0x20000000>;
19 };
20
21 soc {
22 uart@80120000 {
23 pinctrl-names = "default", "sleep";
24 pinctrl-0 = <&uart0_default_mode>;
25 pinctrl-1 = <&uart0_sleep_mode>;
26 status = "okay";
27 };
28
29 /* This UART is unused and thus left disabled */
30 uart@80121000 {
31 pinctrl-names = "default", "sleep";
32 pinctrl-0 = <&uart1_default_mode>;
33 pinctrl-1 = <&uart1_sleep_mode>;
34 };
35
36 uart@80007000 {
37 pinctrl-names = "default", "sleep";
38 pinctrl-0 = <&uart2_default_mode>;
39 pinctrl-1 = <&uart2_sleep_mode>;
40 status = "okay";
41 };
42
43 i2c@80004000 {
44 pinctrl-names = "default","sleep";
45 pinctrl-0 = <&i2c0_default_mode>;
46 pinctrl-1 = <&i2c0_sleep_mode>;
47 };
48
49 i2c@80122000 {
50 pinctrl-names = "default","sleep";
51 pinctrl-0 = <&i2c1_default_mode>;
52 pinctrl-1 = <&i2c1_sleep_mode>;
53 };
54
55 i2c@80128000 {
56 pinctrl-names = "default","sleep";
57 pinctrl-0 = <&i2c2_default_mode>;
58 pinctrl-1 = <&i2c2_sleep_mode>;
59 lp5521@33 {
60 compatible = "national,lp5521";
61 reg = <0x33>;
62 label = "lp5521_pri";
63 clock-mode = /bits/ 8 <2>;
64 chan0 {
65 led-cur = /bits/ 8 <0x2f>;
66 max-cur = /bits/ 8 <0x5f>;
67 linux,default-trigger = "heartbeat";
68 };
69 chan1 {
70 led-cur = /bits/ 8 <0x2f>;
71 max-cur = /bits/ 8 <0x5f>;
72 };
73 chan2 {
74 led-cur = /bits/ 8 <0x2f>;
75 max-cur = /bits/ 8 <0x5f>;
76 };
77 };
78 lp5521@34 {
79 compatible = "national,lp5521";
80 reg = <0x34>;
81 label = "lp5521_sec";
82 clock-mode = /bits/ 8 <2>;
83 chan0 {
84 led-cur = /bits/ 8 <0x2f>;
85 max-cur = /bits/ 8 <0x5f>;
86 };
87 chan1 {
88 led-cur = /bits/ 8 <0x2f>;
89 max-cur = /bits/ 8 <0x5f>;
90 };
91 chan2 {
92 led-cur = /bits/ 8 <0x2f>;
93 max-cur = /bits/ 8 <0x5f>;
94 };
95 };
96 bh1780@29 {
97 compatible = "rohm,bh1780gli";
98 reg = <0x29>;
99 };
100 };
101
102 i2c@80110000 {
103 pinctrl-names = "default","sleep";
104 pinctrl-0 = <&i2c3_default_mode>;
105 pinctrl-1 = <&i2c3_sleep_mode>;
106 };
107
108 /* ST6G3244ME level translator for 1.8/2.9 V */
109 vmmci: regulator-gpio {
110 compatible = "regulator-gpio";
111
112 regulator-min-microvolt = <1800000>;
113 regulator-max-microvolt = <2900000>;
114 regulator-name = "mmci-reg";
115 regulator-type = "voltage";
116
117 startup-delay-us = <100>;
118
119 states = <1800000 0x1
120 2900000 0x0>;
121 };
122
123 // External Micro SD slot
124 sdi0_per1@80126000 {
125 arm,primecell-periphid = <0x10480180>;
126 max-frequency = <100000000>;
127 bus-width = <4>;
128 cap-sd-highspeed;
129 cap-mmc-highspeed;
130 sd-uhs-sdr12;
131 sd-uhs-sdr25;
132 full-pwr-cycle;
133 st,sig-dir-dat0;
134 st,sig-dir-dat2;
135 st,sig-dir-cmd;
136 st,sig-pin-fbclk;
137 vmmc-supply = <&ab8500_ldo_aux3_reg>;
138 vqmmc-supply = <&vmmci>;
139 pinctrl-names = "default", "sleep";
140 pinctrl-0 = <&sdi0_default_mode>;
141 pinctrl-1 = <&sdi0_sleep_mode>;
142
143 status = "okay";
144 };
145
146 // WLAN SDIO channel
147 sdi1_per2@80118000 {
148 arm,primecell-periphid = <0x10480180>;
149 max-frequency = <100000000>;
150 bus-width = <4>;
151 non-removable;
152 pinctrl-names = "default", "sleep";
153 pinctrl-0 = <&sdi1_default_mode>;
154 pinctrl-1 = <&sdi1_sleep_mode>;
155
156 status = "okay";
157 };
158
159 // PoP:ed eMMC
160 sdi2_per3@80005000 {
161 arm,primecell-periphid = <0x10480180>;
162 max-frequency = <100000000>;
163 bus-width = <8>;
164 cap-mmc-highspeed;
165 non-removable;
166 vmmc-supply = <&db8500_vsmps2_reg>;
167 pinctrl-names = "default", "sleep";
168 pinctrl-0 = <&sdi2_default_mode>;
169 pinctrl-1 = <&sdi2_sleep_mode>;
170
171 status = "okay";
172 };
173
174 // On-board eMMC
175 sdi4_per2@80114000 {
176 arm,primecell-periphid = <0x10480180>;
177 max-frequency = <100000000>;
178 bus-width = <8>;
179 cap-mmc-highspeed;
180 non-removable;
181 vmmc-supply = <&ab8500_ldo_aux2_reg>;
182 pinctrl-names = "default", "sleep";
183 pinctrl-0 = <&sdi4_default_mode>;
184 pinctrl-1 = <&sdi4_sleep_mode>;
185
186 status = "okay";
187 };
188
189 sound {
190 compatible = "stericsson,snd-soc-mop500";
191
192 stericsson,cpu-dai = <&msp1 &msp3>;
193 stericsson,audio-codec = <&codec>;
194 clocks = <&prcmu_clk PRCMU_SYSCLK>;
195 clock-names = "sysclk";
196 };
197
198 msp0: msp@80123000 {
199 pinctrl-names = "default";
200 pinctrl-0 = <&msp0_default_mode>;
201 status = "okay";
202 };
203
204 msp1: msp@80124000 {
205 pinctrl-names = "default";
206 pinctrl-0 = <&msp1_default_mode>;
207 status = "okay";
208 };
209
210 msp2: msp@80117000 {
211 pinctrl-names = "default";
212 pinctrl-0 = <&msp2_default_mode>;
213 };
214
215 msp3: msp@80125000 {
216 status = "okay";
217 };
218
219 prcmu@80157000 {
220 ab8500 {
221 ab8500-gpio {
222 };
223
224 ab8500_usb {
225 pinctrl-names = "default", "sleep";
226 pinctrl-0 = <&musb_default_mode>;
227 pinctrl-1 = <&musb_sleep_mode>;
228 };
229
230 ab8500-regulators {
231 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
232 regulator-name = "V-DISPLAY";
233 };
234
235 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
236 regulator-name = "V-eMMC1";
237 };
238
239 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
240 regulator-name = "V-MMC-SD";
241 };
242
243 ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
244 regulator-name = "V-INTCORE";
245 };
246
247 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
248 regulator-name = "V-TVOUT";
249 };
250
251 ab8500_ldo_usb_reg: ab8500_ldo_usb {
252 regulator-name = "dummy";
253 };
254
255 ab8500_ldo_audio_reg: ab8500_ldo_audio {
256 regulator-name = "V-AUD";
257 };
258
259 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
260 regulator-name = "V-AMIC1";
261 };
262
263 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
264 regulator-name = "V-AMIC2";
265 };
266
267 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
268 regulator-name = "V-DMIC";
269 };
270
271 ab8500_ldo_ana_reg: ab8500_ldo_ana {
272 regulator-name = "V-CSI/DSI";
273 };
274 };
275 };
276 };
277
278 mcde@a0350000 {
279 pinctrl-names = "default", "sleep";
280 pinctrl-0 = <&lcd_default_mode>;
281 pinctrl-1 = <&lcd_sleep_mode>;
282 };
283 };
284 };