2 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
5 #include <dt-bindings/gpio/gpio.h>
6 #include "skeleton.dtsi"
13 reg = <0x00000000 0x04000000>,
14 <0x08000000 0x04000000>;
18 compatible = "arm,l210-cache";
19 reg = <0x10210000 0x1000>;
20 interrupt-parent = <&vica>;
27 /* Nomadik system timer */
28 compatible = "st,nomadik-mtu";
29 reg = <0x101e2000 0x1000>;
30 interrupt-parent = <&vica>;
32 clocks = <&timclk>, <&pclk>;
33 clock-names = "timclk", "apb_pclk";
38 reg = <0x101e3000 0x1000>;
39 interrupt-parent = <&vica>;
41 clocks = <&timclk>, <&pclk>;
42 clock-names = "timclk", "apb_pclk";
45 gpio0: gpio@101e4000 {
46 compatible = "st,nomadik-gpio";
47 reg = <0x101e4000 0x80>;
48 interrupt-parent = <&vica>;
51 #interrupt-cells = <2>;
58 gpio1: gpio@101e5000 {
59 compatible = "st,nomadik-gpio";
60 reg = <0x101e5000 0x80>;
61 interrupt-parent = <&vica>;
64 #interrupt-cells = <2>;
71 gpio2: gpio@101e6000 {
72 compatible = "st,nomadik-gpio";
73 reg = <0x101e6000 0x80>;
74 interrupt-parent = <&vica>;
77 #interrupt-cells = <2>;
84 gpio3: gpio@101e7000 {
85 compatible = "st,nomadik-gpio";
86 reg = <0x101e7000 0x80>;
87 interrupt-parent = <&vica>;
90 #interrupt-cells = <2>;
98 compatible = "stericsson,stn8815-pinctrl";
99 /* Pin configurations */
101 uart0_default_mux: uart0_mux {
109 uart1_default_mux: uart1_mux {
117 mmcsd_default_mux: mmcsd_mux {
119 ste,function = "mmcsd";
120 ste,pins = "mmcsd_a_1";
123 mmcsd_default_mode: mmcsd_default {
126 ste,pins = "GPIO8_B10";
130 /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR */
131 ste,pins = "GPIO10_C11", "GPIO15_A12",
136 /* MCCMD, MCDAT3-0, MCMSFBCLK */
137 ste,pins = "GPIO9_A10", "GPIO11_B11",
138 "GPIO12_A11", "GPIO13_C12",
139 "GPIO14_B12", "GPIO24_C15";
145 i2c0_default_mux: i2c0_mux {
147 ste,function = "i2c0";
148 ste,pins = "i2c0_a_1";
151 i2c0_default_mode: i2c0_default {
153 ste,pins = "GPIO62_D3", "GPIO63_D2";
159 i2c1_default_mux: i2c1_mux {
161 ste,function = "i2c1";
162 ste,pins = "i2c1_a_1";
165 i2c1_default_mode: i2c1_default {
167 ste,pins = "GPIO53_L4", "GPIO54_L3";
173 i2c2_default_mode: i2c2_default {
175 ste,pins = "GPIO73_C21", "GPIO74_C20";
183 compatible = "stericsson,nomadik-src";
184 reg = <0x101e0000 0x1000>;
189 * MXTAL "Main Chrystal" is a chrystal oscillator @19.2 MHz
190 * that is parent of TIMCLK, PLL1 and PLL2
194 compatible = "fixed-clock";
195 clock-frequency = <19200000>;
199 * The 2.4 MHz TIMCLK reference clock is active at
200 * boot time, this is actually the MXTALCLK @19.2 MHz
201 * divided by 8. This clock is used by the timers and
202 * watchdog. See page 105 ff.
204 timclk: timclk@2.4M {
206 compatible = "fixed-factor-clock";
212 /* PLL1 is locked to MXTALI and variable from 20.4 to 334 MHz */
215 compatible = "st,nomadik-pll-clock";
220 /* HCLK divides the PLL1 with 1,2,3 or 4 */
223 compatible = "st,nomadik-hclk-clock";
226 /* The PCLK domain uses HCLK right off */
229 compatible = "fixed-factor-clock";
235 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
238 compatible = "st,nomadik-pll-clock";
242 clk216: clk216@216M {
244 compatible = "fixed-factor-clock";
249 clk108: clk108@108M {
251 compatible = "fixed-factor-clock";
258 compatible = "fixed-factor-clock";
259 /* The data sheet does not say how this is derived */
266 compatible = "fixed-factor-clock";
267 /* The data sheet does not say how this is derived */
274 compatible = "fixed-factor-clock";
280 /* This apparently exists as well */
281 ulpiclk: ulpiclk@60M {
283 compatible = "fixed-clock";
284 clock-frequency = <60000000>;
288 * IP AMBA bus clocks, driving the bus side of the
289 * peripheral clocking, clock gates.
292 hclkdma0: hclkdma0@48M {
294 compatible = "st,nomadik-src-clock";
298 hclksmc: hclksmc@48M {
300 compatible = "st,nomadik-src-clock";
304 hclksdram: hclksdram@48M {
306 compatible = "st,nomadik-src-clock";
310 hclkdma1: hclkdma1@48M {
312 compatible = "st,nomadik-src-clock";
316 hclkclcd: hclkclcd@48M {
318 compatible = "st,nomadik-src-clock";
322 pclkirda: pclkirda@48M {
324 compatible = "st,nomadik-src-clock";
328 pclkssp: pclkssp@48M {
330 compatible = "st,nomadik-src-clock";
334 pclkuart0: pclkuart0@48M {
336 compatible = "st,nomadik-src-clock";
340 pclksdi: pclksdi@48M {
342 compatible = "st,nomadik-src-clock";
346 pclki2c0: pclki2c0@48M {
348 compatible = "st,nomadik-src-clock";
352 pclki2c1: pclki2c1@48M {
354 compatible = "st,nomadik-src-clock";
358 pclkuart1: pclkuart1@48M {
360 compatible = "st,nomadik-src-clock";
364 pclkmsp0: pclkmsp0@48M {
366 compatible = "st,nomadik-src-clock";
370 hclkusb: hclkusb@48M {
372 compatible = "st,nomadik-src-clock";
376 hclkdif: hclkdif@48M {
378 compatible = "st,nomadik-src-clock";
382 hclksaa: hclksaa@48M {
384 compatible = "st,nomadik-src-clock";
388 hclksva: hclksva@48M {
390 compatible = "st,nomadik-src-clock";
394 pclkhsi: pclkhsi@48M {
396 compatible = "st,nomadik-src-clock";
400 pclkxti: pclkxti@48M {
402 compatible = "st,nomadik-src-clock";
406 pclkuart2: pclkuart2@48M {
408 compatible = "st,nomadik-src-clock";
412 pclkmsp1: pclkmsp1@48M {
414 compatible = "st,nomadik-src-clock";
418 pclkmsp2: pclkmsp2@48M {
420 compatible = "st,nomadik-src-clock";
424 pclkowm: pclkowm@48M {
426 compatible = "st,nomadik-src-clock";
430 hclkhpi: hclkhpi@48M {
432 compatible = "st,nomadik-src-clock";
436 pclkske: pclkske@48M {
438 compatible = "st,nomadik-src-clock";
442 pclkhsem: pclkhsem@48M {
444 compatible = "st,nomadik-src-clock";
450 compatible = "st,nomadik-src-clock";
454 hclkhash: hclkhash@48M {
456 compatible = "st,nomadik-src-clock";
460 hclkcryp: hclkcryp@48M {
462 compatible = "st,nomadik-src-clock";
466 pclkmshc: pclkmshc@48M {
468 compatible = "st,nomadik-src-clock";
472 hclkusbm: hclkusbm@48M {
474 compatible = "st,nomadik-src-clock";
478 hclkrng: hclkrng@48M {
480 compatible = "st,nomadik-src-clock";
485 /* IP kernel clocks */
488 compatible = "st,nomadik-src-clock";
490 clocks = <&clk72 &clk48>;
492 irdaclk: irdaclk@48M {
494 compatible = "st,nomadik-src-clock";
498 sspiclk: sspiclk@48M {
500 compatible = "st,nomadik-src-clock";
504 uart0clk: uart0clk@48M {
506 compatible = "st,nomadik-src-clock";
511 /* Also called MCCLK in some documents */
513 compatible = "st,nomadik-src-clock";
517 i2c0clk: i2c0clk@48M {
519 compatible = "st,nomadik-src-clock";
523 i2c1clk: i2c1clk@48M {
525 compatible = "st,nomadik-src-clock";
529 uart1clk: uart1clk@48M {
531 compatible = "st,nomadik-src-clock";
535 mspclk0: mspclk0@48M {
537 compatible = "st,nomadik-src-clock";
543 compatible = "st,nomadik-src-clock";
545 clocks = <&clk48>; /* 48 MHz not ULPI */
549 compatible = "st,nomadik-src-clock";
553 ipi2cclk: ipi2cclk@48M {
555 compatible = "st,nomadik-src-clock";
557 clocks = <&clk48>; /* Guess */
559 ipbmcclk: ipbmcclk@48M {
561 compatible = "st,nomadik-src-clock";
563 clocks = <&clk48>; /* Guess */
565 hsiclkrx: hsiclkrx@216M {
567 compatible = "st,nomadik-src-clock";
571 hsiclktx: hsiclktx@108M {
573 compatible = "st,nomadik-src-clock";
577 uart2clk: uart2clk@48M {
579 compatible = "st,nomadik-src-clock";
583 mspclk1: mspclk1@48M {
585 compatible = "st,nomadik-src-clock";
589 mspclk2: mspclk2@48M {
591 compatible = "st,nomadik-src-clock";
597 compatible = "st,nomadik-src-clock";
599 clocks = <&clk48>; /* Guess */
603 compatible = "st,nomadik-src-clock";
605 clocks = <&clk48>; /* Guess */
609 compatible = "st,nomadik-src-clock";
611 clocks = <&clk48>; /* Guess */
613 pclkmsp3: pclkmsp3@48M {
615 compatible = "st,nomadik-src-clock";
619 mspclk3: mspclk3@48M {
621 compatible = "st,nomadik-src-clock";
625 mshcclk: mshcclk@48M {
627 compatible = "st,nomadik-src-clock";
629 clocks = <&clk48>; /* Guess */
631 usbmclk: usbmclk@48M {
633 compatible = "st,nomadik-src-clock";
635 /* Stated as "48 MHz not ULPI clock" */
638 rngcclk: rngcclk@48M {
640 compatible = "st,nomadik-src-clock";
642 clocks = <&clk48>; /* Guess */
646 /* A NAND flash of 128 MiB */
647 fsmc: flash@40000000 {
648 compatible = "stericsson,fsmc-nand";
649 #address-cells = <1>;
651 reg = <0x10100000 0x1000>, /* FSMC Register*/
652 <0x40000000 0x2000>, /* NAND Base DATA */
653 <0x41000000 0x2000>, /* NAND Base ADDR */
654 <0x40800000 0x2000>; /* NAND Base CMD */
655 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
658 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
661 label = "X-Loader(NAND)";
665 label = "MemInit(NAND)";
666 reg = <0x40000 0x40000>;
669 label = "BootLoader(NAND)";
670 reg = <0x80000 0x200000>;
673 label = "Kernel zImage(NAND)";
674 reg = <0x280000 0x300000>;
677 label = "Root Filesystem(NAND)";
678 reg = <0x580000 0x1600000>;
681 label = "User Filesystem(NAND)";
682 reg = <0x1b80000 0x6480000>;
686 external-bus@34000000 {
687 compatible = "simple-bus";
688 reg = <0x34000000 0x1000000>;
689 #address-cells = <1>;
691 ranges = <0 0x34000000 0x1000000>;
693 compatible = "smsc,lan91c111";
694 reg = <0x300 0x0fd00>;
698 /* I2C0 connected to the STw4811 power management chip */
700 compatible = "st,nomadik-i2c", "arm,primecell";
701 reg = <0x101f8000 0x1000>;
702 interrupt-parent = <&vica>;
704 clock-frequency = <100000>;
705 #address-cells = <1>;
707 clocks = <&i2c0clk>, <&pclki2c0>;
708 clock-names = "mclk", "apb_pclk";
709 pinctrl-names = "default";
710 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
713 compatible = "st,stw4811";
715 vmmc_regulator: vmmc {
716 compatible = "st,stw481x-vmmc";
717 regulator-name = "VMMC";
718 regulator-min-microvolt = <1800000>;
719 regulator-max-microvolt = <3300000>;
724 /* I2C1 connected to various sensors */
726 compatible = "st,nomadik-i2c", "arm,primecell";
727 reg = <0x101f7000 0x1000>;
728 interrupt-parent = <&vica>;
730 clock-frequency = <100000>;
731 #address-cells = <1>;
733 clocks = <&i2c1clk>, <&pclki2c1>;
734 clock-names = "mclk", "apb_pclk";
735 pinctrl-names = "default";
736 pinctrl-0 = <&i2c1_default_mux>, <&i2c1_default_mode>;
739 compatible = "st,camera";
743 compatible = "st,stw5095";
747 compatible = "st,lis3lv02dl";
752 /* I2C2 connected to the USB portions of the STw4811 only */
754 compatible = "i2c-gpio";
755 gpios = <&gpio2 10 0>, /* sda */
756 <&gpio2 9 0>; /* scl */
757 #address-cells = <1>;
759 pinctrl-names = "default";
760 pinctrl-0 = <&i2c2_default_mode>;
763 compatible = "st,stw4811-usb";
769 compatible = "arm,amba-bus";
770 #address-cells = <1>;
774 vica: intc@10140000 {
775 compatible = "arm,versatile-vic";
776 interrupt-controller;
777 #interrupt-cells = <1>;
778 reg = <0x10140000 0x20>;
781 vicb: intc@10140020 {
782 compatible = "arm,versatile-vic";
783 interrupt-controller;
784 #interrupt-cells = <1>;
785 reg = <0x10140020 0x20>;
788 uart0: uart@101fd000 {
789 compatible = "arm,pl011", "arm,primecell";
790 reg = <0x101fd000 0x1000>;
791 interrupt-parent = <&vica>;
793 clocks = <&uart0clk>, <&pclkuart0>;
794 clock-names = "uartclk", "apb_pclk";
795 pinctrl-names = "default";
796 pinctrl-0 = <&uart0_default_mux>;
799 uart1: uart@101fb000 {
800 compatible = "arm,pl011", "arm,primecell";
801 reg = <0x101fb000 0x1000>;
802 interrupt-parent = <&vica>;
804 clocks = <&uart1clk>, <&pclkuart1>;
805 clock-names = "uartclk", "apb_pclk";
806 pinctrl-names = "default";
807 pinctrl-0 = <&uart1_default_mux>;
810 uart2: uart@101f2000 {
811 compatible = "arm,pl011", "arm,primecell";
812 reg = <0x101f2000 0x1000>;
813 interrupt-parent = <&vica>;
815 clocks = <&uart2clk>, <&pclkuart2>;
816 clock-names = "uartclk", "apb_pclk";
821 compatible = "arm,primecell";
822 reg = <0x101b0000 0x1000>;
823 clocks = <&rngcclk>, <&hclkrng>;
824 clock-names = "rng", "apb_pclk";
828 compatible = "arm,pl031", "arm,primecell";
829 reg = <0x101e8000 0x1000>;
831 clock-names = "apb_pclk";
832 interrupt-parent = <&vica>;
836 mmcsd: sdi@101f6000 {
837 compatible = "arm,pl18x", "arm,primecell";
838 reg = <0x101f6000 0x1000>;
839 clocks = <&sdiclk>, <&pclksdi>;
840 clock-names = "mclk", "apb_pclk";
841 interrupt-parent = <&vica>;
843 max-frequency = <48000000>;
847 cd-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
848 pinctrl-names = "default";
849 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
850 vmmc-supply = <&vmmc_regulator>;