2 * Copyright (C) 2012 STMicroelectronics Limited.
3 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * publishhed by the Free Software Foundation.
9 #include "stih41x.dtsi"
10 #include "stih416-clock.dtsi"
11 #include "stih416-pinctrl.dtsi"
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/reset-controller/stih416-resets.h>
17 L2: cache-controller {
18 compatible = "arm,pl310-cache";
19 reg = <0xfffe2000 0x1000>;
20 arm,data-latency = <3 3 3>;
21 arm,tag-latency = <2 2 2>;
29 interrupt-parent = <&intc>;
31 compatible = "simple-bus";
34 compatible = "st,stih416-restart";
35 st,syscfg = <&syscfg_sbc>;
39 powerdown: powerdown-controller {
41 compatible = "st,stih416-powerdown";
44 softreset: softreset-controller {
46 compatible = "st,stih416-softreset";
49 syscfg_sbc:sbc-syscfg@fe600000{
50 compatible = "st,stih416-sbc-syscfg", "syscon";
51 reg = <0xfe600000 0x1000>;
54 syscfg_front:front-syscfg@fee10000{
55 compatible = "st,stih416-front-syscfg", "syscon";
56 reg = <0xfee10000 0x1000>;
59 syscfg_rear:rear-syscfg@fe830000{
60 compatible = "st,stih416-rear-syscfg", "syscon";
61 reg = <0xfe830000 0x1000>;
65 syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
66 compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
67 reg = <0xfddf0000 0x1000>;
70 syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
71 compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
72 reg = <0xfd6a0000 0x1000>;
75 syscfg_cpu:cpu-syscfg@fdde0000{
76 compatible = "st,stih416-cpu-syscfg", "syscon";
77 reg = <0xfdde0000 0x1000>;
80 syscfg_compo:compo-syscfg@fd320000{
81 compatible = "st,stih416-compo-syscfg", "syscon";
82 reg = <0xfd320000 0x1000>;
85 syscfg_transport:transport-syscfg@fd690000{
86 compatible = "st,stih416-transport-syscfg", "syscon";
87 reg = <0xfd690000 0x1000>;
90 syscfg_lpm:lpm-syscfg@fe4b5100{
91 compatible = "st,stih416-lpm-syscfg", "syscon";
92 reg = <0xfe4b5100 0x8>;
95 serial2: serial@fed32000{
96 compatible = "st,asc";
98 reg = <0xfed32000 0x2c>;
99 interrupts = <0 197 0>;
100 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
106 sbc_serial1: serial@fe531000 {
107 compatible = "st,asc";
109 reg = <0xfe531000 0x2c>;
110 interrupts = <0 210 0>;
111 pinctrl-names = "default";
112 pinctrl-0 = <&pinctrl_sbc_serial1>;
113 clocks = <&clk_sysin>;
117 compatible = "st,comms-ssc4-i2c";
118 reg = <0xfed40000 0x110>;
119 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
120 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
122 clock-frequency = <400000>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_i2c0_default>;
130 compatible = "st,comms-ssc4-i2c";
131 reg = <0xfed41000 0x110>;
132 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
133 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
135 clock-frequency = <400000>;
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_i2c1_default>;
143 compatible = "st,comms-ssc4-i2c";
144 reg = <0xfe540000 0x110>;
145 interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
146 clocks = <&clk_sysin>;
148 clock-frequency = <400000>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
156 compatible = "st,comms-ssc4-i2c";
157 reg = <0xfe541000 0x110>;
158 interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
159 clocks = <&clk_sysin>;
161 clock-frequency = <400000>;
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_sbc_i2c1_default>;
168 ethernet0: dwmac@fe810000 {
169 device_type = "network";
170 compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
172 reg = <0xfe810000 0x8000>;
173 reg-names = "stmmaceth";
175 interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
176 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
181 st,syscon = <&syscfg_rear 0x8bc>;
182 resets = <&softreset STIH416_ETH0_SOFTRESET>;
183 reset-names = "stmmaceth";
184 pinctrl-names = "default";
185 pinctrl-0 = <&pinctrl_mii0>;
186 clock-names = "stmmaceth", "sti-ethclk";
187 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
190 ethernet1: dwmac@fef08000 {
191 device_type = "network";
192 compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
194 reg = <0xfef08000 0x8000>;
195 reg-names = "stmmaceth";
196 interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
197 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
202 st,syscon = <&syscfg_sbc 0x7f0>;
204 resets = <&softreset STIH416_ETH1_SOFTRESET>;
205 reset-names = "stmmaceth";
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_mii1>;
208 clock-names = "stmmaceth", "sti-ethclk";
209 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
213 compatible = "st,comms-irb";
214 reg = <0xfe518000 0x234>;
215 interrupts = <0 203 0>;
216 rx-mode = "infrared";
217 clocks = <&clk_sysin>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_ir>;
220 resets = <&softreset STIH416_IRB_SOFTRESET>;
224 spifsm: spifsm@fe902000 {
225 compatible = "st,spi-fsm";
226 reg = <0xfe902000 0x1000>;
227 pinctrl-0 = <&pinctrl_fsm>;
229 st,syscfg = <&syscfg_rear>;
230 st,boot-device-reg = <0x958>;
231 st,boot-device-spi = <0x1a>;
236 keyscan: keyscan@fe4b0000 {
237 compatible = "st,sti-keyscan";
239 reg = <0xfe4b0000 0x2000>;
240 interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
241 clocks = <&clk_sysin>;
242 pinctrl-names = "default";
243 pinctrl-0 = <&pinctrl_keyscan>;
244 resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
245 <&softreset STIH416_KEYSCAN_SOFTRESET>;
249 compatible = "st,stih416-sas-thermal";
250 clock-names = "thermal";
251 clocks = <&clockgen_c_vcc 14>;
257 compatible = "st,stih416-mpe-thermal";
258 reg = <0xfdfe8000 0x10>;
259 clocks = <&clockgen_e 3>;
260 clock-names = "thermal";
261 interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
266 mmc0: sdhci@fe81e000 {
267 compatible = "st,sdhci";
269 reg = <0xfe81e000 0x1000>;
270 interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
271 interrupt-names = "mmcirq";
272 pinctrl-names = "default";
273 pinctrl-0 = <&pinctrl_mmc0>;
275 clocks = <&clk_s_a1_ls 1>;
278 mmc1: sdhci@fe81f000 {
279 compatible = "st,sdhci";
281 reg = <0xfe81f000 0x1000>;
282 interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>;
283 interrupt-names = "mmcirq";
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_mmc1>;
287 clocks = <&clk_s_a1_ls 8>;
290 miphy365x_phy: phy@fe382000 {
291 compatible = "st,miphy365x-phy";
292 st,syscfg = <&syscfg_rear 0x824 0x828>;
293 #address-cells = <1>;
297 phy_port0: port@fe382000 {
299 reg = <0xfe382000 0x100>, <0xfe394000 0x100>;
300 reg-names = "sata", "pcie";
303 phy_port1: port@fe38a000 {
305 reg = <0xfe38a000 0x100>, <0xfe804000 0x100>;
306 reg-names = "sata", "pcie";
310 sata0: sata@fe380000 {
311 compatible = "st,sti-ahci";
312 reg = <0xfe380000 0x1000>;
313 interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
314 interrupt-names = "hostc";
315 phys = <&phy_port0 PHY_TYPE_SATA>;
316 phy-names = "sata-phy";
317 resets = <&powerdown STIH416_SATA0_POWERDOWN>,
318 <&softreset STIH416_SATA0_SOFTRESET>;
319 reset-names = "pwr-dwn", "sw-rst";
320 clock-names = "ahci_clk";
321 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
327 compatible = "st,stih416-usb-phy";
329 st,syscfg = <&syscfg_rear>;
330 clocks = <&clk_sysin>;
331 clock-names = "osc_phy";
334 ehci0: usb@fe1ffe00 {
335 compatible = "st,st-ehci-300x";
336 reg = <0xfe1ffe00 0x100>;
337 interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_usb0>;
340 clocks = <&clk_s_a1_ls 0>,
342 clock-names = "ic", "clk48";
345 resets = <&powerdown STIH416_USB0_POWERDOWN>,
346 <&softreset STIH416_USB0_SOFTRESET>;
347 reset-names = "power", "softreset";
350 ohci0: usb@fe1ffc00 {
351 compatible = "st,st-ohci-300x";
352 reg = <0xfe1ffc00 0x100>;
353 interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
354 clocks = <&clk_s_a1_ls 0>,
356 clock-names = "ic", "clk48";
360 resets = <&powerdown STIH416_USB0_POWERDOWN>,
361 <&softreset STIH416_USB0_SOFTRESET>;
362 reset-names = "power", "softreset";
365 ehci1: usb@fe203e00 {
366 compatible = "st,st-ehci-300x";
367 reg = <0xfe203e00 0x100>;
368 interrupts = <GIC_SPI 150 IRQ_TYPE_NONE>;
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_usb1>;
371 clocks = <&clk_s_a1_ls 0>,
373 clock-names = "ic", "clk48";
376 resets = <&powerdown STIH416_USB1_POWERDOWN>,
377 <&softreset STIH416_USB1_SOFTRESET>;
378 reset-names = "power", "softreset";
381 ohci1: usb@fe203c00 {
382 compatible = "st,st-ohci-300x";
383 reg = <0xfe203c00 0x100>;
384 interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
385 clocks = <&clk_s_a1_ls 0>,
387 clock-names = "ic", "clk48";
390 resets = <&powerdown STIH416_USB1_POWERDOWN>,
391 <&softreset STIH416_USB1_SOFTRESET>;
392 reset-names = "power", "softreset";
395 ehci2: usb@fe303e00 {
396 compatible = "st,st-ehci-300x";
397 reg = <0xfe303e00 0x100>;
398 interrupts = <GIC_SPI 152 IRQ_TYPE_NONE>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_usb2>;
401 clocks = <&clk_s_a1_ls 0>,
403 clock-names = "ic", "clk48";
406 resets = <&powerdown STIH416_USB2_POWERDOWN>,
407 <&softreset STIH416_USB2_SOFTRESET>;
408 reset-names = "power", "softreset";
411 ohci2: usb@fe303c00 {
412 compatible = "st,st-ohci-300x";
413 reg = <0xfe303c00 0x100>;
414 interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
415 clocks = <&clk_s_a1_ls 0>,
417 clock-names = "ic", "clk48";
420 resets = <&powerdown STIH416_USB2_POWERDOWN>,
421 <&softreset STIH416_USB2_SOFTRESET>;
422 reset-names = "power", "softreset";
425 ehci3: usb@fe343e00 {
426 compatible = "st,st-ehci-300x";
427 reg = <0xfe343e00 0x100>;
428 interrupts = <GIC_SPI 154 IRQ_TYPE_NONE>;
429 pinctrl-names = "default";
430 pinctrl-0 = <&pinctrl_usb3>;
431 clocks = <&clk_s_a1_ls 0>,
433 clock-names = "ic", "clk48";
436 resets = <&powerdown STIH416_USB3_POWERDOWN>,
437 <&softreset STIH416_USB3_SOFTRESET>;
438 reset-names = "power", "softreset";
441 ohci3: usb@fe343c00 {
442 compatible = "st,st-ohci-300x";
443 reg = <0xfe343c00 0x100>;
444 interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>;
445 clocks = <&clk_s_a1_ls 0>,
447 clock-names = "ic", "clk48";
450 resets = <&powerdown STIH416_USB3_POWERDOWN>,
451 <&softreset STIH416_USB3_SOFTRESET>;
452 reset-names = "power", "softreset";
457 compatible = "st,sti-pwm";
460 reg = <0xfed10000 0x68>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_pwm0_chan0_default
464 &pinctrl_pwm0_chan1_default
465 &pinctrl_pwm0_chan2_default
466 &pinctrl_pwm0_chan3_default>;
469 clocks = <&clk_sysin>;
470 st,pwm-num-chan = <4>;
475 compatible = "st,sti-pwm";
478 reg = <0xfe510000 0x68>;
480 pinctrl-names = "default";
481 pinctrl-0 = <&pinctrl_pwm1_chan0_default
483 * Shared with SBC_OBS_NOTRST. Don't
484 * enable unless you really know what
487 * &pinctrl_pwm1_chan1_default
489 &pinctrl_pwm1_chan2_default
490 &pinctrl_pwm1_chan3_default>;
493 clocks = <&clk_sysin>;
494 st,pwm-num-chan = <3>;