arch/arm/boot/dts/stm32h743.dtsi

   1 /*
   2  * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPL or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This file is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "skeleton.dtsi"
  44 #include "armv7-m.dtsi"
  45 #include <dt-bindings/clock/stm32h7-clks.h>
  46 #include <dt-bindings/mfd/stm32h7-rcc.h>
  47 #include <dt-bindings/interrupt-controller/irq.h>
  48
  49 / {
  50         clocks {
  51                 clk_hse: clk-hse {
  52                         #clock-cells = <0>;
  53                         compatible = "fixed-clock";
  54                         clock-frequency = <0>;
  55                 };
  56
  57                 clk_lse: clk-lse {
  58                         #clock-cells = <0>;
  59                         compatible = "fixed-clock";
  60                         clock-frequency = <32768>;
  61                 };
  62
  63                 clk_i2s: i2s_ckin {
  64                         #clock-cells = <0>;
  65                         compatible = "fixed-clock";
  66                         clock-frequency = <0>;
  67                 };
  68         };
  69
  70         soc {
  71                 timer5: timer@40000c00 {
  72                         compatible = "st,stm32-timer";
  73                         reg = <0x40000c00 0x400>;
  74                         interrupts = <50>;
  75                         clocks = <&rcc TIM5_CK>;
  76                 };
  77
  78                 lptimer1: timer@40002400 {
  79                         #address-cells = <1>;
  80                         #size-cells = <0>;
  81                         compatible = "st,stm32-lptimer";
  82                         reg = <0x40002400 0x400>;
  83                         clocks = <&rcc LPTIM1_CK>;
  84                         clock-names = "mux";
  85                         status = "disabled";
  86
  87                         pwm {
  88                                 compatible = "st,stm32-pwm-lp";
  89                                 status = "disabled";
  90                         };
  91
  92                         trigger@0 {
  93                                 compatible = "st,stm32-lptimer-trigger";
  94                                 reg = <0>;
  95                                 status = "disabled";
  96                         };
  97
  98                         counter {
  99                                 compatible = "st,stm32-lptimer-counter";
 100                                 status = "disabled";
 101                         };
 102                 };
 103
 104                 spi2: spi@40003800 {
 105                         #address-cells = <1>;
 106                         #size-cells = <0>;
 107                         compatible = "st,stm32h7-spi";
 108                         reg = <0x40003800 0x400>;
 109                         interrupts = <36>;
 110                         clocks = <&rcc SPI2_CK>;
 111                         status = "disabled";
 112
 113                 };
 114
 115                 spi3: spi@40003c00 {
 116                         #address-cells = <1>;
 117                         #size-cells = <0>;
 118                         compatible = "st,stm32h7-spi";
 119                         reg = <0x40003c00 0x400>;
 120                         interrupts = <51>;
 121                         clocks = <&rcc SPI3_CK>;
 122                         status = "disabled";
 123                 };
 124
 125                 usart2: serial@40004400 {
 126                         compatible = "st,stm32f7-uart";
 127                         reg = <0x40004400 0x400>;
 128                         interrupts = <38>;
 129                         status = "disabled";
 130                         clocks = <&rcc USART2_CK>;
 131                 };
 132
 133                 dac: dac@40007400 {
 134                         compatible = "st,stm32h7-dac-core";
 135                         reg = <0x40007400 0x400>;
 136                         clocks = <&rcc DAC12_CK>;
 137                         clock-names = "pclk";
 138                         #address-cells = <1>;
 139                         #size-cells = <0>;
 140                         status = "disabled";
 141
 142                         dac1: dac@1 {
 143                                 compatible = "st,stm32-dac";
 144                                 #io-channels-cells = <1>;
 145                                 reg = <1>;
 146                                 status = "disabled";
 147                         };
 148
 149                         dac2: dac@2 {
 150                                 compatible = "st,stm32-dac";
 151                                 #io-channels-cells = <1>;
 152                                 reg = <2>;
 153                                 status = "disabled";
 154                         };
 155                 };
 156
 157                 usart1: serial@40011000 {
 158                         compatible = "st,stm32f7-uart";
 159                         reg = <0x40011000 0x400>;
 160                         interrupts = <37>;
 161                         status = "disabled";
 162                         clocks = <&rcc USART1_CK>;
 163                 };
 164
 165                 spi1: spi@40013000 {
 166                         #address-cells = <1>;
 167                         #size-cells = <0>;
 168                         compatible = "st,stm32h7-spi";
 169                         reg = <0x40013000 0x400>;
 170                         interrupts = <35>;
 171                         clocks = <&rcc SPI1_CK>;
 172                         status = "disabled";
 173                 };
 174
 175                 spi4: spi@40013400 {
 176                         #address-cells = <1>;
 177                         #size-cells = <0>;
 178                         compatible = "st,stm32h7-spi";
 179                         reg = <0x40013400 0x400>;
 180                         interrupts = <84>;
 181                         clocks = <&rcc SPI4_CK>;
 182                         status = "disabled";
 183                 };
 184
 185                 spi5: spi@40015000 {
 186                         #address-cells = <1>;
 187                         #size-cells = <0>;
 188                         compatible = "st,stm32h7-spi";
 189                         reg = <0x40015000 0x400>;
 190                         interrupts = <85>;
 191                         clocks = <&rcc SPI5_CK>;
 192                         status = "disabled";
 193                 };
 194
 195                 dma1: dma@40020000 {
 196                         compatible = "st,stm32-dma";
 197                         reg = <0x40020000 0x400>;
 198                         interrupts = <11>,
 199                                      <12>,
 200                                      <13>,
 201                                      <14>,
 202                                      <15>,
 203                                      <16>,
 204                                      <17>,
 205                                      <47>;
 206                         clocks = <&rcc DMA1_CK>;
 207                         #dma-cells = <4>;
 208                         st,mem2mem;
 209                         dma-requests = <8>;
 210                         status = "disabled";
 211                 };
 212
 213                 dma2: dma@40020400 {
 214                         compatible = "st,stm32-dma";
 215                         reg = <0x40020400 0x400>;
 216                         interrupts = <56>,
 217                                      <57>,
 218                                      <58>,
 219                                      <59>,
 220                                      <60>,
 221                                      <68>,
 222                                      <69>,
 223                                      <70>;
 224                         clocks = <&rcc DMA2_CK>;
 225                         #dma-cells = <4>;
 226                         st,mem2mem;
 227                         dma-requests = <8>;
 228                         status = "disabled";
 229                 };
 230
 231                 dmamux1: dma-router@40020800 {
 232                         compatible = "st,stm32h7-dmamux";
 233                         reg = <0x40020800 0x1c>;
 234                         #dma-cells = <3>;
 235                         dma-channels = <16>;
 236                         dma-requests = <128>;
 237                         dma-masters = <&dma1 &dma2>;
 238                         clocks = <&rcc DMA1_CK>;
 239                 };
 240
 241                 adc_12: adc@40022000 {
 242                         compatible = "st,stm32h7-adc-core";
 243                         reg = <0x40022000 0x400>;
 244                         interrupts = <18>;
 245                         clocks = <&rcc ADC12_CK>;
 246                         clock-names = "bus";
 247                         interrupt-controller;
 248                         #interrupt-cells = <1>;
 249                         #address-cells = <1>;
 250                         #size-cells = <0>;
 251                         status = "disabled";
 252
 253                         adc1: adc@0 {
 254                                 compatible = "st,stm32h7-adc";
 255                                 #io-channel-cells = <1>;
 256                                 reg = <0x0>;
 257                                 interrupt-parent = <&adc_12>;
 258                                 interrupts = <0>;
 259                                 status = "disabled";
 260                         };
 261
 262                         adc2: adc@100 {
 263                                 compatible = "st,stm32h7-adc";
 264                                 #io-channel-cells = <1>;
 265                                 reg = <0x100>;
 266                                 interrupt-parent = <&adc_12>;
 267                                 interrupts = <1>;
 268                                 status = "disabled";
 269                         };
 270                 };
 271
 272                 usbotg_hs: usb@40040000 {
 273                         compatible = "st,stm32f7-hsotg";
 274                         reg = <0x40040000 0x40000>;
 275                         interrupts = <77>;
 276                         clocks = <&rcc USB1OTG_CK>;
 277                         clock-names = "otg";
 278                         g-rx-fifo-size = <256>;
 279                         g-np-tx-fifo-size = <32>;
 280                         g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
 281                         status = "disabled";
 282                 };
 283
 284                 usbotg_fs: usb@40080000 {
 285                         compatible = "st,stm32f4x9-fsotg";
 286                         reg = <0x40080000 0x40000>;
 287                         interrupts = <101>;
 288                         clocks = <&rcc USB2OTG_CK>;
 289                         clock-names = "otg";
 290                         status = "disabled";
 291                 };
 292
 293                 mdma1: dma@52000000 {
 294                         compatible = "st,stm32h7-mdma";
 295                         reg = <0x52000000 0x1000>;
 296                         interrupts = <122>;
 297                         clocks = <&rcc MDMA_CK>;
 298                         #dma-cells = <5>;
 299                         dma-channels = <16>;
 300                         dma-requests = <32>;
 301                 };
 302
 303                 exti: interrupt-controller@58000000 {
 304                         compatible = "st,stm32h7-exti";
 305                         interrupt-controller;
 306                         #interrupt-cells = <2>;
 307                         reg = <0x58000000 0x400>;
 308                         interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <62>, <76>;
 309                 };
 310
 311                 syscfg: system-config@58000400 {
 312                         compatible = "syscon";
 313                         reg = <0x58000400 0x400>;
 314                 };
 315
 316                 spi6: spi@58001400 {
 317                         #address-cells = <1>;
 318                         #size-cells = <0>;
 319                         compatible = "st,stm32h7-spi";
 320                         reg = <0x58001400 0x400>;
 321                         interrupts = <86>;
 322                         clocks = <&rcc SPI6_CK>;
 323                         status = "disabled";
 324                 };
 325
 326                 lptimer2: timer@58002400 {
 327                         #address-cells = <1>;
 328                         #size-cells = <0>;
 329                         compatible = "st,stm32-lptimer";
 330                         reg = <0x58002400 0x400>;
 331                         clocks = <&rcc LPTIM2_CK>;
 332                         clock-names = "mux";
 333                         status = "disabled";
 334
 335                         pwm {
 336                                 compatible = "st,stm32-pwm-lp";
 337                                 status = "disabled";
 338                         };
 339
 340                         trigger@1 {
 341                                 compatible = "st,stm32-lptimer-trigger";
 342                                 reg = <1>;
 343                                 status = "disabled";
 344                         };
 345
 346                         counter {
 347                                 compatible = "st,stm32-lptimer-counter";
 348                                 status = "disabled";
 349                         };
 350                 };
 351
 352                 lptimer3: timer@58002800 {
 353                         #address-cells = <1>;
 354                         #size-cells = <0>;
 355                         compatible = "st,stm32-lptimer";
 356                         reg = <0x58002800 0x400>;
 357                         clocks = <&rcc LPTIM3_CK>;
 358                         clock-names = "mux";
 359                         status = "disabled";
 360
 361                         pwm {
 362                                 compatible = "st,stm32-pwm-lp";
 363                                 status = "disabled";
 364                         };
 365
 366                         trigger@2 {
 367                                 compatible = "st,stm32-lptimer-trigger";
 368                                 reg = <2>;
 369                                 status = "disabled";
 370                         };
 371                 };
 372
 373                 lptimer4: timer@58002c00 {
 374                         #address-cells = <1>;
 375                         #size-cells = <0>;
 376                         compatible = "st,stm32-lptimer";
 377                         reg = <0x58002c00 0x400>;
 378                         clocks = <&rcc LPTIM4_CK>;
 379                         clock-names = "mux";
 380                         status = "disabled";
 381
 382                         pwm {
 383                                 compatible = "st,stm32-pwm-lp";
 384                                 status = "disabled";
 385                         };
 386                 };
 387
 388                 lptimer5: timer@58003000 {
 389                         #address-cells = <1>;
 390                         #size-cells = <0>;
 391                         compatible = "st,stm32-lptimer";
 392                         reg = <0x58003000 0x400>;
 393                         clocks = <&rcc LPTIM5_CK>;
 394                         clock-names = "mux";
 395                         status = "disabled";
 396
 397                         pwm {
 398                                 compatible = "st,stm32-pwm-lp";
 399                                 status = "disabled";
 400                         };
 401                 };
 402
 403                 vrefbuf: regulator@58003c00 {
 404                         compatible = "st,stm32-vrefbuf";
 405                         reg = <0x58003C00 0x8>;
 406                         clocks = <&rcc VREF_CK>;
 407                         regulator-min-microvolt = <1500000>;
 408                         regulator-max-microvolt = <2500000>;
 409                         status = "disabled";
 410                 };
 411
 412                 rtc: rtc@58004000 {
 413                         compatible = "st,stm32h7-rtc";
 414                         reg = <0x58004000 0x400>;
 415                         clocks = <&rcc RTCAPB_CK>, <&rcc RTC_CK>;
 416                         clock-names = "pclk", "rtc_ck";
 417                         assigned-clocks = <&rcc RTC_CK>;
 418                         assigned-clock-parents = <&rcc LSE_CK>;
 419                         interrupt-parent = <&exti>;
 420                         interrupts = <17 IRQ_TYPE_EDGE_RISING>;
 421                         interrupt-names = "alarm";
 422                         st,syscfg = <&pwrcfg>;
 423                         status = "disabled";
 424                 };
 425
 426                 rcc: reset-clock-controller@58024400 {
 427                         compatible = "st,stm32h743-rcc", "st,stm32-rcc";
 428                         reg = <0x58024400 0x400>;
 429                         #clock-cells = <1>;
 430                         #reset-cells = <1>;
 431                         clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
 432                         st,syscfg = <&pwrcfg>;
 433                 };
 434
 435                 pwrcfg: power-config@58024800 {
 436                         compatible = "syscon";
 437                         reg = <0x58024800 0x400>;
 438                 };
 439
 440                 adc_3: adc@58026000 {
 441                         compatible = "st,stm32h7-adc-core";
 442                         reg = <0x58026000 0x400>;
 443                         interrupts = <127>;
 444                         clocks = <&rcc ADC3_CK>;
 445                         clock-names = "bus";
 446                         interrupt-controller;
 447                         #interrupt-cells = <1>;
 448                         #address-cells = <1>;
 449                         #size-cells = <0>;
 450                         status = "disabled";
 451
 452                         adc3: adc@0 {
 453                                 compatible = "st,stm32h7-adc";
 454                                 #io-channel-cells = <1>;
 455                                 reg = <0x0>;
 456                                 interrupt-parent = <&adc_3>;
 457                                 interrupts = <0>;
 458                                 status = "disabled";
 459                         };
 460                 };
 461         };
 462 };
 463
 464 &systick {
 465         clock-frequency = <250000000>;
 466         status = "okay";
 467 };