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1 /*
2 * Copyright 2013 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45 #include "skeleton.dtsi"
46
47 #include "sun5i.dtsi"
48
49 #include <dt-bindings/dma/sun4i-a10.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
51
52 / {
53 interrupt-parent = <&intc>;
54
55 aliases {
56 ethernet0 = &emac;
57 };
58
59 chosen {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 ranges;
63
64 framebuffer@0 {
65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
67 allwinner,pipeline = "de_be0-lcd0-hdmi";
68 clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_HDMI>,
69 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DRAM_DE_BE>,
70 <&ccu CLK_DE_BE>, <&ccu CLK_HDMI>;
71 status = "disabled";
72 };
73
74 framebuffer@1 {
75 compatible = "allwinner,simple-framebuffer",
76 "simple-framebuffer";
77 allwinner,pipeline = "de_be0-lcd0";
78 clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
79 <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
80 status = "disabled";
81 };
82
83 framebuffer@2 {
84 compatible = "allwinner,simple-framebuffer",
85 "simple-framebuffer";
86 allwinner,pipeline = "de_be0-lcd0-tve0";
87 clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
88 <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
89 <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
90 status = "disabled";
91 };
92 };
93
94 soc@01c00000 {
95 emac: ethernet@01c0b000 {
96 compatible = "allwinner,sun4i-a10-emac";
97 reg = <0x01c0b000 0x1000>;
98 interrupts = <55>;
99 clocks = <&ccu CLK_AHB_EMAC>;
100 allwinner,sram = <&emac_sram 1>;
101 status = "disabled";
102 };
103
104 mdio: mdio@01c0b080 {
105 compatible = "allwinner,sun4i-a10-mdio";
106 reg = <0x01c0b080 0x14>;
107 status = "disabled";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 };
111
112 pwm: pwm@01c20e00 {
113 compatible = "allwinner,sun5i-a10s-pwm";
114 reg = <0x01c20e00 0xc>;
115 clocks = <&ccu CLK_HOSC>;
116 #pwm-cells = <3>;
117 status = "disabled";
118 };
119
120 uart0: serial@01c28000 {
121 compatible = "snps,dw-apb-uart";
122 reg = <0x01c28000 0x400>;
123 interrupts = <1>;
124 reg-shift = <2>;
125 reg-io-width = <4>;
126 clocks = <&ccu CLK_APB1_UART0>;
127 status = "disabled";
128 };
129
130 uart2: serial@01c28800 {
131 compatible = "snps,dw-apb-uart";
132 reg = <0x01c28800 0x400>;
133 interrupts = <3>;
134 reg-shift = <2>;
135 reg-io-width = <4>;
136 clocks = <&ccu CLK_APB1_UART2>;
137 status = "disabled";
138 };
139 };
140 };
141
142 &ccu {
143 compatible = "allwinner,sun5i-a10s-ccu";
144 };
145
146 &pio {
147 compatible = "allwinner,sun5i-a10s-pinctrl";
148
149 uart0_pins_a: uart0@0 {
150 pins = "PB19", "PB20";
151 function = "uart0";
152 };
153
154 uart2_pins_a: uart2@0 {
155 pins = "PC18", "PC19";
156 function = "uart2";
157 };
158
159 emac_pins_a: emac0@0 {
160 pins = "PA0", "PA1", "PA2",
161 "PA3", "PA4", "PA5", "PA6",
162 "PA7", "PA8", "PA9", "PA10",
163 "PA11", "PA12", "PA13", "PA14",
164 "PA15", "PA16";
165 function = "emac";
166 };
167
168 emac_pins_b: emac0@1 {
169 pins = "PD6", "PD7", "PD10",
170 "PD11", "PD12", "PD13", "PD14",
171 "PD15", "PD18", "PD19", "PD20",
172 "PD21", "PD22", "PD23", "PD24",
173 "PD25", "PD26", "PD27";
174 function = "emac";
175 };
176
177 mmc1_pins_a: mmc1@0 {
178 pins = "PG3", "PG4", "PG5",
179 "PG6", "PG7", "PG8";
180 function = "mmc1";
181 drive-strength = <30>;
182 };
183
184 spi2_pins_b: spi2@1 {
185 pins = "PB12", "PB13", "PB14";
186 function = "spi2";
187 };
188
189 spi2_cs0_pins_b: spi2_cs0@1 {
190 pins = "PB11";
191 function = "spi2";
192 };
193 };
194
195 &sram_a {
196 emac_sram: sram-section@8000 {
197 compatible = "allwinner,sun4i-a10-sram-a3-a4";
198 reg = <0x8000 0x4000>;
199 status = "disabled";
200 };
201 };