arch/arm/boot/dts/tegra30-cardhu.dtsi

   1 #include <dt-bindings/input/input.h>
   2 #include "tegra30.dtsi"
   3
   4 /**
   5  * This file contains common DT entry for all fab version of Cardhu.
   6  * There is multiple fab version of Cardhu starting from A01 to A07.
   7  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
   8  * A02 will have different sets of GPIOs for fixed regulator compare to
   9  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
  10  * compatible with fab version A04. Based on Cardhu fab version, the
  11  * related dts file need to be chosen like for Cardhu fab version A02,
  12  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
  13  * tegra30-cardhu-a04.dts.
  14  * The identification of board is done in two ways, by looking the sticker
  15  * on PCB and by reading board id eeprom.
  16  * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
  17  * number is the fab version like here it is 002 and hence fab version A02.
  18  * The (downstream internal) U-Boot of Cardhu display the board-id as
  19  * follows:
  20  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
  21  * In this Fab version is 02 i.e. A02.
  22  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
  23  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
  24  * wide.
  25  */
  26
  27 / {
  28         model = "NVIDIA Tegra30 Cardhu evaluation board";
  29         compatible = "nvidia,cardhu", "nvidia,tegra30";
  30
  31         aliases {
  32                 rtc0 = "/i2c@7000d000/tps65911@2d";
  33                 rtc1 = "/rtc@7000e000";
  34                 serial0 = &uarta;
  35                 serial1 = &uartc;
  36         };
  37
  38         memory {
  39                 reg = <0x80000000 0x40000000>;
  40         };
  41
  42         pcie-controller@00003000 {
  43                 status = "okay";
  44
  45                 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
  46                 avdd-pexb-supply = <&ldo1_reg>;
  47                 vdd-pexb-supply = <&ldo1_reg>;
  48                 avdd-pex-pll-supply = <&ldo1_reg>;
  49                 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
  50                 vddio-pex-ctl-supply = <&sys_3v3_reg>;
  51                 avdd-plle-supply = <&ldo2_reg>;
  52
  53                 pci@1,0 {
  54                         nvidia,num-lanes = <4>;
  55                 };
  56
  57                 pci@2,0 {
  58                         nvidia,num-lanes = <1>;
  59                 };
  60
  61                 pci@3,0 {
  62                         status = "okay";
  63                         nvidia,num-lanes = <1>;
  64                 };
  65         };
  66
  67         host1x@50000000 {
  68                 dc@54200000 {
  69                         rgb {
  70                                 status = "okay";
  71
  72                                 nvidia,panel = <&panel>;
  73                         };
  74                 };
  75         };
  76
  77         pinmux@70000868 {
  78                 pinctrl-names = "default";
  79                 pinctrl-0 = <&state_default>;
  80
  81                 state_default: pinmux {
  82                         sdmmc1_clk_pz0 {
  83                                 nvidia,pins = "sdmmc1_clk_pz0";
  84                                 nvidia,function = "sdmmc1";
  85                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  86                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  87                         };
  88                         sdmmc1_cmd_pz1 {
  89                                 nvidia,pins =   "sdmmc1_cmd_pz1",
  90                                                 "sdmmc1_dat0_py7",
  91                                                 "sdmmc1_dat1_py6",
  92                                                 "sdmmc1_dat2_py5",
  93                                                 "sdmmc1_dat3_py4";
  94                                 nvidia,function = "sdmmc1";
  95                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
  96                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  97                         };
  98                         sdmmc3_clk_pa6 {
  99                                 nvidia,pins = "sdmmc3_clk_pa6";
 100                                 nvidia,function = "sdmmc3";
 101                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 102                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 103                         };
 104                         sdmmc3_cmd_pa7 {
 105                                 nvidia,pins =   "sdmmc3_cmd_pa7",
 106                                                 "sdmmc3_dat0_pb7",
 107                                                 "sdmmc3_dat1_pb6",
 108                                                 "sdmmc3_dat2_pb5",
 109                                                 "sdmmc3_dat3_pb4";
 110                                 nvidia,function = "sdmmc3";
 111                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 112                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 113                         };
 114                         sdmmc4_clk_pcc4 {
 115                                 nvidia,pins =   "sdmmc4_clk_pcc4",
 116                                                 "sdmmc4_rst_n_pcc3";
 117                                 nvidia,function = "sdmmc4";
 118                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 119                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 120                         };
 121                         sdmmc4_dat0_paa0 {
 122                                 nvidia,pins =   "sdmmc4_dat0_paa0",
 123                                                 "sdmmc4_dat1_paa1",
 124                                                 "sdmmc4_dat2_paa2",
 125                                                 "sdmmc4_dat3_paa3",
 126                                                 "sdmmc4_dat4_paa4",
 127                                                 "sdmmc4_dat5_paa5",
 128                                                 "sdmmc4_dat6_paa6",
 129                                                 "sdmmc4_dat7_paa7";
 130                                 nvidia,function = "sdmmc4";
 131                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 132                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 133                         };
 134                         dap2_fs_pa2 {
 135                                 nvidia,pins =   "dap2_fs_pa2",
 136                                                 "dap2_sclk_pa3",
 137                                                 "dap2_din_pa4",
 138                                                 "dap2_dout_pa5";
 139                                 nvidia,function = "i2s1";
 140                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 141                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 142                         };
 143                         sdio3 {
 144                                 nvidia,pins = "drive_sdio3";
 145                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 146                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 147                                 nvidia,pull-down-strength = <46>;
 148                                 nvidia,pull-up-strength = <42>;
 149                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
 150                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
 151                         };
 152                         uart3_txd_pw6 {
 153                                 nvidia,pins =   "uart3_txd_pw6",
 154                                                 "uart3_cts_n_pa1",
 155                                                 "uart3_rts_n_pc0",
 156                                                 "uart3_rxd_pw7";
 157                                 nvidia,function = "uartc";
 158                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 159                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 160                         };
 161                 };
 162         };
 163
 164         serial@70006000 {
 165                 status = "okay";
 166         };
 167
 168         serial@70006200 {
 169                 compatible = "nvidia,tegra30-hsuart";
 170                 status = "okay";
 171         };
 172
 173         pwm@7000a000 {
 174                 status = "okay";
 175         };
 176
 177         panelddc: i2c@7000c000 {
 178                 status = "okay";
 179                 clock-frequency = <100000>;
 180         };
 181
 182         i2c@7000c400 {
 183                 status = "okay";
 184                 clock-frequency = <100000>;
 185         };
 186
 187         i2c@7000c500 {
 188                 status = "okay";
 189                 clock-frequency = <100000>;
 190
 191                 /* ALS and Proximity sensor */
 192                 isl29028@44 {
 193                         compatible = "isil,isl29028";
 194                         reg = <0x44>;
 195                         interrupt-parent = <&gpio>;
 196                         interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
 197                 };
 198
 199                 i2cmux@70 {
 200                         compatible = "nxp,pca9546";
 201                         #address-cells = <1>;
 202                         #size-cells = <0>;
 203                         reg = <0x70>;
 204                 };
 205         };
 206
 207         i2c@7000c700 {
 208                 status = "okay";
 209                 clock-frequency = <100000>;
 210         };
 211
 212         i2c@7000d000 {
 213                 status = "okay";
 214                 clock-frequency = <100000>;
 215
 216                 wm8903: wm8903@1a {
 217                         compatible = "wlf,wm8903";
 218                         reg = <0x1a>;
 219                         interrupt-parent = <&gpio>;
 220                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
 221
 222                         gpio-controller;
 223                         #gpio-cells = <2>;
 224
 225                         micdet-cfg = <0>;
 226                         micdet-delay = <100>;
 227                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 228                 };
 229
 230                 pmic: tps65911@2d {
 231                         compatible = "ti,tps65911";
 232                         reg = <0x2d>;
 233
 234                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 235                         #interrupt-cells = <2>;
 236                         interrupt-controller;
 237
 238                         ti,system-power-controller;
 239
 240                         #gpio-cells = <2>;
 241                         gpio-controller;
 242
 243                         vcc1-supply = <&vdd_ac_bat_reg>;
 244                         vcc2-supply = <&vdd_ac_bat_reg>;
 245                         vcc3-supply = <&vio_reg>;
 246                         vcc4-supply = <&vdd_5v0_reg>;
 247                         vcc5-supply = <&vdd_ac_bat_reg>;
 248                         vcc6-supply = <&vdd2_reg>;
 249                         vcc7-supply = <&vdd_ac_bat_reg>;
 250                         vccio-supply = <&vdd_ac_bat_reg>;
 251
 252                         regulators {
 253                                 vdd1_reg: vdd1 {
 254                                         regulator-name = "vddio_ddr_1v2";
 255                                         regulator-min-microvolt = <1200000>;
 256                                         regulator-max-microvolt = <1200000>;
 257                                         regulator-always-on;
 258                                 };
 259
 260                                 vdd2_reg: vdd2 {
 261                                         regulator-name = "vdd_1v5_gen";
 262                                         regulator-min-microvolt = <1500000>;
 263                                         regulator-max-microvolt = <1500000>;
 264                                         regulator-always-on;
 265                                 };
 266
 267                                 vddctrl_reg: vddctrl {
 268                                         regulator-name = "vdd_cpu,vdd_sys";
 269                                         regulator-min-microvolt = <1000000>;
 270                                         regulator-max-microvolt = <1000000>;
 271                                         regulator-always-on;
 272                                 };
 273
 274                                 vio_reg: vio {
 275                                         regulator-name = "vdd_1v8_gen";
 276                                         regulator-min-microvolt = <1800000>;
 277                                         regulator-max-microvolt = <1800000>;
 278                                         regulator-always-on;
 279                                 };
 280
 281                                 ldo1_reg: ldo1 {
 282                                         regulator-name = "vdd_pexa,vdd_pexb";
 283                                         regulator-min-microvolt = <1050000>;
 284                                         regulator-max-microvolt = <1050000>;
 285                                 };
 286
 287                                 ldo2_reg: ldo2 {
 288                                         regulator-name = "vdd_sata,avdd_plle";
 289                                         regulator-min-microvolt = <1050000>;
 290                                         regulator-max-microvolt = <1050000>;
 291                                 };
 292
 293                                 /* LDO3 is not connected to anything */
 294
 295                                 ldo4_reg: ldo4 {
 296                                         regulator-name = "vdd_rtc";
 297                                         regulator-min-microvolt = <1200000>;
 298                                         regulator-max-microvolt = <1200000>;
 299                                         regulator-always-on;
 300                                 };
 301
 302                                 ldo5_reg: ldo5 {
 303                                         regulator-name = "vddio_sdmmc,avdd_vdac";
 304                                         regulator-min-microvolt = <3300000>;
 305                                         regulator-max-microvolt = <3300000>;
 306                                         regulator-always-on;
 307                                 };
 308
 309                                 ldo6_reg: ldo6 {
 310                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
 311                                         regulator-min-microvolt = <1200000>;
 312                                         regulator-max-microvolt = <1200000>;
 313                                 };
 314
 315                                 ldo7_reg: ldo7 {
 316                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
 317                                         regulator-min-microvolt = <1200000>;
 318                                         regulator-max-microvolt = <1200000>;
 319                                         regulator-always-on;
 320                                 };
 321
 322                                 ldo8_reg: ldo8 {
 323                                         regulator-name = "vdd_ddr_hs";
 324                                         regulator-min-microvolt = <1000000>;
 325                                         regulator-max-microvolt = <1000000>;
 326                                         regulator-always-on;
 327                                 };
 328                         };
 329                 };
 330
 331                 temperature-sensor@4c {
 332                         compatible = "onnn,nct1008";
 333                         reg = <0x4c>;
 334                         vcc-supply = <&sys_3v3_reg>;
 335                         interrupt-parent = <&gpio>;
 336                         interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
 337                 };
 338
 339                 tps62361@60 {
 340                         compatible = "ti,tps62361";
 341                         reg = <0x60>;
 342
 343                         regulator-name = "tps62361-vout";
 344                         regulator-min-microvolt = <500000>;
 345                         regulator-max-microvolt = <1500000>;
 346                         regulator-boot-on;
 347                         regulator-always-on;
 348                         ti,vsel0-state-high;
 349                         ti,vsel1-state-high;
 350                 };
 351         };
 352
 353         spi@7000da00 {
 354                 status = "okay";
 355                 spi-max-frequency = <25000000>;
 356                 spi-flash@1 {
 357                         compatible = "winbond,w25q32";
 358                         reg = <1>;
 359                         spi-max-frequency = <20000000>;
 360                 };
 361         };
 362
 363         pmc@7000e400 {
 364                 status = "okay";
 365                 nvidia,invert-interrupt;
 366                 nvidia,suspend-mode = <1>;
 367                 nvidia,cpu-pwr-good-time = <2000>;
 368                 nvidia,cpu-pwr-off-time = <200>;
 369                 nvidia,core-pwr-good-time = <3845 3845>;
 370                 nvidia,core-pwr-off-time = <0>;
 371                 nvidia,core-power-req-active-high;
 372                 nvidia,sys-clock-req-active-high;
 373         };
 374
 375         ahub@70080000 {
 376                 i2s@70080400 {
 377                         status = "okay";
 378                 };
 379         };
 380
 381         sdhci@78000000 {
 382                 status = "okay";
 383                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 384                 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 385                 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
 386                 bus-width = <4>;
 387         };
 388
 389         sdhci@78000600 {
 390                 status = "okay";
 391                 bus-width = <8>;
 392                 non-removable;
 393         };
 394
 395         usb@7d008000 {
 396                 status = "okay";
 397         };
 398
 399         usb-phy@7d008000 {
 400                 vbus-supply = <&usb3_vbus_reg>;
 401                 status = "okay";
 402         };
 403
 404         backlight: backlight {
 405                 compatible = "pwm-backlight";
 406
 407                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 408                 power-supply = <&vdd_bl_reg>;
 409                 pwms = <&pwm 0 5000000>;
 410
 411                 brightness-levels = <0 4 8 16 32 64 128 255>;
 412                 default-brightness-level = <6>;
 413         };
 414
 415         clocks {
 416                 compatible = "simple-bus";
 417                 #address-cells = <1>;
 418                 #size-cells = <0>;
 419
 420                 clk32k_in: clock@0 {
 421                         compatible = "fixed-clock";
 422                         reg=<0>;
 423                         #clock-cells = <0>;
 424                         clock-frequency = <32768>;
 425                 };
 426         };
 427
 428         panel: panel {
 429                 compatible = "chunghwa,claa101wb01", "simple-panel";
 430                 ddc-i2c-bus = <&panelddc>;
 431
 432                 power-supply = <&vdd_pnl1_reg>;
 433                 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
 434
 435                 backlight = <&backlight>;
 436         };
 437
 438         regulators {
 439                 compatible = "simple-bus";
 440                 #address-cells = <1>;
 441                 #size-cells = <0>;
 442
 443                 vdd_ac_bat_reg: regulator@0 {
 444                         compatible = "regulator-fixed";
 445                         reg = <0>;
 446                         regulator-name = "vdd_ac_bat";
 447                         regulator-min-microvolt = <5000000>;
 448                         regulator-max-microvolt = <5000000>;
 449                         regulator-always-on;
 450                 };
 451
 452                 cam_1v8_reg: regulator@1 {
 453                         compatible = "regulator-fixed";
 454                         reg = <1>;
 455                         regulator-name = "cam_1v8";
 456                         regulator-min-microvolt = <1800000>;
 457                         regulator-max-microvolt = <1800000>;
 458                         enable-active-high;
 459                         gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
 460                         vin-supply = <&vio_reg>;
 461                 };
 462
 463                 cp_5v_reg: regulator@2 {
 464                         compatible = "regulator-fixed";
 465                         reg = <2>;
 466                         regulator-name = "cp_5v";
 467                         regulator-min-microvolt = <5000000>;
 468                         regulator-max-microvolt = <5000000>;
 469                         regulator-boot-on;
 470                         regulator-always-on;
 471                         enable-active-high;
 472                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 473                 };
 474
 475                 emmc_3v3_reg: regulator@3 {
 476                         compatible = "regulator-fixed";
 477                         reg = <3>;
 478                         regulator-name = "emmc_3v3";
 479                         regulator-min-microvolt = <3300000>;
 480                         regulator-max-microvolt = <3300000>;
 481                         regulator-always-on;
 482                         regulator-boot-on;
 483                         enable-active-high;
 484                         gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
 485                         vin-supply = <&sys_3v3_reg>;
 486                 };
 487
 488                 modem_3v3_reg: regulator@4 {
 489                         compatible = "regulator-fixed";
 490                         reg = <4>;
 491                         regulator-name = "modem_3v3";
 492                         regulator-min-microvolt = <3300000>;
 493                         regulator-max-microvolt = <3300000>;
 494                         enable-active-high;
 495                         gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
 496                 };
 497
 498                 pex_hvdd_3v3_reg: regulator@5 {
 499                         compatible = "regulator-fixed";
 500                         reg = <5>;
 501                         regulator-name = "pex_hvdd_3v3";
 502                         regulator-min-microvolt = <3300000>;
 503                         regulator-max-microvolt = <3300000>;
 504                         enable-active-high;
 505                         gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
 506                         vin-supply = <&sys_3v3_reg>;
 507                 };
 508
 509                 vdd_cam1_ldo_reg: regulator@6 {
 510                         compatible = "regulator-fixed";
 511                         reg = <6>;
 512                         regulator-name = "vdd_cam1_ldo";
 513                         regulator-min-microvolt = <2800000>;
 514                         regulator-max-microvolt = <2800000>;
 515                         enable-active-high;
 516                         gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
 517                         vin-supply = <&sys_3v3_reg>;
 518                 };
 519
 520                 vdd_cam2_ldo_reg: regulator@7 {
 521                         compatible = "regulator-fixed";
 522                         reg = <7>;
 523                         regulator-name = "vdd_cam2_ldo";
 524                         regulator-min-microvolt = <2800000>;
 525                         regulator-max-microvolt = <2800000>;
 526                         enable-active-high;
 527                         gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
 528                         vin-supply = <&sys_3v3_reg>;
 529                 };
 530
 531                 vdd_cam3_ldo_reg: regulator@8 {
 532                         compatible = "regulator-fixed";
 533                         reg = <8>;
 534                         regulator-name = "vdd_cam3_ldo";
 535                         regulator-min-microvolt = <3300000>;
 536                         regulator-max-microvolt = <3300000>;
 537                         enable-active-high;
 538                         gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
 539                         vin-supply = <&sys_3v3_reg>;
 540                 };
 541
 542                 vdd_com_reg: regulator@9 {
 543                         compatible = "regulator-fixed";
 544                         reg = <9>;
 545                         regulator-name = "vdd_com";
 546                         regulator-min-microvolt = <3300000>;
 547                         regulator-max-microvolt = <3300000>;
 548                         regulator-always-on;
 549                         regulator-boot-on;
 550                         enable-active-high;
 551                         gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 552                         vin-supply = <&sys_3v3_reg>;
 553                 };
 554
 555                 vdd_fuse_3v3_reg: regulator@10 {
 556                         compatible = "regulator-fixed";
 557                         reg = <10>;
 558                         regulator-name = "vdd_fuse_3v3";
 559                         regulator-min-microvolt = <3300000>;
 560                         regulator-max-microvolt = <3300000>;
 561                         enable-active-high;
 562                         gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
 563                         vin-supply = <&sys_3v3_reg>;
 564                 };
 565
 566                 vdd_pnl1_reg: regulator@11 {
 567                         compatible = "regulator-fixed";
 568                         reg = <11>;
 569                         regulator-name = "vdd_pnl1";
 570                         regulator-min-microvolt = <3300000>;
 571                         regulator-max-microvolt = <3300000>;
 572                         regulator-always-on;
 573                         regulator-boot-on;
 574                         enable-active-high;
 575                         gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
 576                         vin-supply = <&sys_3v3_reg>;
 577                 };
 578
 579                 vdd_vid_reg: regulator@12 {
 580                         compatible = "regulator-fixed";
 581                         reg = <12>;
 582                         regulator-name = "vddio_vid";
 583                         regulator-min-microvolt = <5000000>;
 584                         regulator-max-microvolt = <5000000>;
 585                         enable-active-high;
 586                         gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
 587                         gpio-open-drain;
 588                         vin-supply = <&vdd_5v0_reg>;
 589                 };
 590         };
 591
 592         sound {
 593                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
 594                              "nvidia,tegra-audio-wm8903";
 595                 nvidia,model = "NVIDIA Tegra Cardhu";
 596
 597                 nvidia,audio-routing =
 598                         "Headphone Jack", "HPOUTR",
 599                         "Headphone Jack", "HPOUTL",
 600                         "Int Spk", "ROP",
 601                         "Int Spk", "RON",
 602                         "Int Spk", "LOP",
 603                         "Int Spk", "LON",
 604                         "Mic Jack", "MICBIAS",
 605                         "IN1L", "Mic Jack";
 606
 607                 nvidia,i2s-controller = <&tegra_i2s1>;
 608                 nvidia,audio-codec = <&wm8903>;
 609
 610                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 611                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 612                         GPIO_ACTIVE_HIGH>;
 613
 614                 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
 615                          <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 616                          <&tegra_car TEGRA30_CLK_EXTERN1>;
 617                 clock-names = "pll_a", "pll_a_out0", "mclk";
 618         };
 619
 620         gpio-keys {
 621                 compatible = "gpio-keys";
 622
 623                 power {
 624                         label = "Power";
 625                         interrupt-parent = <&pmic>;
 626                         interrupts = <2 0>;
 627                         linux,code = <KEY_POWER>;
 628                         debounce-interval = <100>;
 629                         gpio-key,wakeup;
 630                 };
 631
 632                 volume-down {
 633                         label = "Volume Down";
 634                         gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
 635                         linux,code = <KEY_VOLUMEDOWN>;
 636                         debounce-interval = <10>;
 637                 };
 638
 639                 volume-up {
 640                         label = "Volume Up";
 641                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
 642                         linux,code = <KEY_VOLUMEUP>;
 643                         debounce-interval = <10>;
 644                 };
 645         };
 646 };