arch/arm/boot/dts/uniphier-ph1-pro4.dtsi

   1 /*
   2  * Device Tree Source for UniPhier PH1-Pro4 SoC
   3  *
   4  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * This file is dual-licensed: you can use it either under the terms
   7  * of the GPL or the X11 license, at your option. Note that this dual
   8  * licensing only applies to this file, and not this project as a
   9  * whole.
  10  *
  11  *  a) This file is free software; you can redistribute it and/or
  12  *     modify it under the terms of the GNU General Public License as
  13  *     published by the Free Software Foundation; either version 2 of the
  14  *     License, or (at your option) any later version.
  15  *
  16  *     This file is distributed in the hope that it will be useful,
  17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *     GNU General Public License for more details.
  20  *
  21  * Or, alternatively,
  22  *
  23  *  b) Permission is hereby granted, free of charge, to any person
  24  *     obtaining a copy of this software and associated documentation
  25  *     files (the "Software"), to deal in the Software without
  26  *     restriction, including without limitation the rights to use,
  27  *     copy, modify, merge, publish, distribute, sublicense, and/or
  28  *     sell copies of the Software, and to permit persons to whom the
  29  *     Software is furnished to do so, subject to the following
  30  *     conditions:
  31  *
  32  *     The above copyright notice and this permission notice shall be
  33  *     included in all copies or substantial portions of the Software.
  34  *
  35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  42  *     OTHER DEALINGS IN THE SOFTWARE.
  43  */
  44
  45 /include/ "skeleton.dtsi"
  46
  47 / {
  48         compatible = "socionext,ph1-pro4";
  49
  50         cpus {
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53                 enable-method = "socionext,uniphier-smp";
  54
  55                 cpu@0 {
  56                         device_type = "cpu";
  57                         compatible = "arm,cortex-a9";
  58                         reg = <0>;
  59                 };
  60
  61                 cpu@1 {
  62                         device_type = "cpu";
  63                         compatible = "arm,cortex-a9";
  64                         reg = <1>;
  65                 };
  66         };
  67
  68         clocks {
  69                 arm_timer_clk: arm_timer_clk {
  70                         #clock-cells = <0>;
  71                         compatible = "fixed-clock";
  72                         clock-frequency = <50000000>;
  73                 };
  74         };
  75
  76         soc {
  77                 compatible = "simple-bus";
  78                 #address-cells = <1>;
  79                 #size-cells = <1>;
  80                 ranges;
  81                 interrupt-parent = <&intc>;
  82
  83                 extbus: extbus {
  84                         compatible = "simple-bus";
  85                         #address-cells = <2>;
  86                         #size-cells = <1>;
  87                 };
  88
  89                 system-bus-controller-misc@59800000 {
  90                         compatible = "socionext,uniphier-system-bus-controller-misc",
  91                                      "syscon";
  92                         reg = <0x59800000 0x2000>;
  93                 };
  94
  95                 timer@60000200 {
  96                         compatible = "arm,cortex-a9-global-timer";
  97                         reg = <0x60000200 0x20>;
  98                         interrupts = <1 11 0x304>;
  99                         clocks = <&arm_timer_clk>;
 100                 };
 101
 102                 timer@60000600 {
 103                         compatible = "arm,cortex-a9-twd-timer";
 104                         reg = <0x60000600 0x20>;
 105                         interrupts = <1 13 0x304>;
 106                         clocks = <&arm_timer_clk>;
 107                 };
 108
 109                 intc: interrupt-controller@60001000 {
 110                         compatible = "arm,cortex-a9-gic";
 111                         #interrupt-cells = <3>;
 112                         interrupt-controller;
 113                         reg = <0x60001000 0x1000>,
 114                               <0x60000100 0x100>;
 115                 };
 116         };
 117 };