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Merge remote-tracking branch 'mkp-scsi/4.5/scsi-fixes' into fixes
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1 /*
2 * Copyright 2014 Toradex AG
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 / {
11 bl: backlight {
12 compatible = "pwm-backlight";
13 pwms = <&pwm0 0 5000000 0>;
14 status = "disabled";
15 };
16 };
17
18 &adc0 {
19 status = "okay";
20 };
21
22 &adc1 {
23 status = "okay";
24 };
25
26 &can0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_flexcan0>;
29 status = "disabled";
30 };
31
32 &can1 {
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_flexcan1>;
35 status = "disabled";
36 };
37
38 &dspi1 {
39 bus-num = <1>;
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_dspi1>;
42 };
43
44 &edma0 {
45 status = "okay";
46 };
47
48 &esdhc1 {
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_esdhc1>;
51 bus-width = <4>;
52 cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
53 };
54
55 &fec1 {
56 phy-mode = "rmii";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_fec1>;
59 };
60
61 &i2c0 {
62 clock-frequency = <400000>;
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_i2c0>;
65 };
66
67 &nfc {
68 assigned-clocks = <&clks VF610_CLK_NFC>;
69 assigned-clock-rates = <33000000>;
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_nfc>;
72 status = "okay";
73
74 nand@0 {
75 compatible = "fsl,vf610-nfc-nandcs";
76 reg = <0>;
77 #address-cells = <1>;
78 #size-cells = <1>;
79 nand-bus-width = <8>;
80 nand-ecc-mode = "hw";
81 nand-ecc-strength = <32>;
82 nand-ecc-step-size = <2048>;
83 nand-on-flash-bbt;
84 };
85 };
86
87 &pwm0 {
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_pwm0>;
90 };
91
92 &pwm1 {
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_pwm1>;
95 };
96
97 &uart0 {
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_uart0>;
100 };
101
102 &uart1 {
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_uart1>;
105 };
106
107 &uart2 {
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_uart2>;
110 };
111
112 &usbdev0 {
113 disable-over-current;
114 status = "okay";
115 };
116
117 &usbh1 {
118 disable-over-current;
119 status = "okay";
120 };
121
122 &usbmisc0 {
123 status = "okay";
124 };
125
126 &usbmisc1 {
127 status = "okay";
128 };
129
130 &usbphy0 {
131 status = "okay";
132 };
133
134 &usbphy1 {
135 status = "okay";
136 };
137
138 &iomuxc {
139 vf610-colibri {
140 pinctrl_flexcan0: can0grp {
141 fsl,pins = <
142 VF610_PAD_PTB14__CAN0_RX 0x31F1
143 VF610_PAD_PTB15__CAN0_TX 0x31F2
144 >;
145 };
146
147 pinctrl_flexcan1: can1grp {
148 fsl,pins = <
149 VF610_PAD_PTB16__CAN1_RX 0x31F1
150 VF610_PAD_PTB17__CAN1_TX 0x31F2
151 >;
152 };
153
154 pinctrl_gpio_ext: gpio_ext {
155 fsl,pins = <
156 VF610_PAD_PTD10__GPIO_89 0x22ed /* EXT_IO_0 */
157 VF610_PAD_PTD9__GPIO_88 0x22ed /* EXT_IO_1 */
158 VF610_PAD_PTD26__GPIO_68 0x22ed /* EXT_IO_2 */
159 >;
160 };
161
162 pinctrl_dspi1: dspi1grp {
163 fsl,pins = <
164 VF610_PAD_PTD5__DSPI1_CS0 0x33e2
165 VF610_PAD_PTD6__DSPI1_SIN 0x33e1
166 VF610_PAD_PTD7__DSPI1_SOUT 0x33e2
167 VF610_PAD_PTD8__DSPI1_SCK 0x33e2
168 >;
169 };
170
171 pinctrl_esdhc1: esdhc1grp {
172 fsl,pins = <
173 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
174 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
175 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
176 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
177 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
178 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
179 VF610_PAD_PTB20__GPIO_42 0x219d
180 >;
181 };
182
183 pinctrl_fec1: fec1grp {
184 fsl,pins = <
185 VF610_PAD_PTA6__RMII_CLKOUT 0x30d2
186 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
187 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
188 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
189 VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
190 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
191 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
192 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
193 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
194 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
195 >;
196 };
197
198 pinctrl_i2c0: i2c0grp {
199 fsl,pins = <
200 VF610_PAD_PTB14__I2C0_SCL 0x37ff
201 VF610_PAD_PTB15__I2C0_SDA 0x37ff
202 >;
203 };
204
205 pinctrl_nfc: nfcgrp {
206 fsl,pins = <
207 VF610_PAD_PTD23__NF_IO7 0x28df
208 VF610_PAD_PTD22__NF_IO6 0x28df
209 VF610_PAD_PTD21__NF_IO5 0x28df
210 VF610_PAD_PTD20__NF_IO4 0x28df
211 VF610_PAD_PTD19__NF_IO3 0x28df
212 VF610_PAD_PTD18__NF_IO2 0x28df
213 VF610_PAD_PTD17__NF_IO1 0x28df
214 VF610_PAD_PTD16__NF_IO0 0x28df
215 VF610_PAD_PTB24__NF_WE_B 0x28c2
216 VF610_PAD_PTB25__NF_CE0_B 0x28c2
217 VF610_PAD_PTB27__NF_RE_B 0x28c2
218 VF610_PAD_PTC26__NF_RB_B 0x283d
219 VF610_PAD_PTC27__NF_ALE 0x28c2
220 VF610_PAD_PTC28__NF_CLE 0x28c2
221 >;
222 };
223
224 pinctrl_pwm0: pwm0grp {
225 fsl,pins = <
226 VF610_PAD_PTB0__FTM0_CH0 0x1182
227 VF610_PAD_PTB1__FTM0_CH1 0x1182
228 >;
229 };
230
231 pinctrl_pwm1: pwm1grp {
232 fsl,pins = <
233 VF610_PAD_PTB8__FTM1_CH0 0x1182
234 VF610_PAD_PTB9__FTM1_CH1 0x1182
235 >;
236 };
237
238 pinctrl_uart0: uart0grp {
239 fsl,pins = <
240 VF610_PAD_PTB10__UART0_TX 0x21a2
241 VF610_PAD_PTB11__UART0_RX 0x21a1
242 >;
243 };
244
245 pinctrl_uart1: uart1grp {
246 fsl,pins = <
247 VF610_PAD_PTB4__UART1_TX 0x21a2
248 VF610_PAD_PTB5__UART1_RX 0x21a1
249 >;
250 };
251
252 pinctrl_uart2: uart2grp {
253 fsl,pins = <
254 VF610_PAD_PTD0__UART2_TX 0x21a2
255 VF610_PAD_PTD1__UART2_RX 0x21a1
256 VF610_PAD_PTD2__UART2_RTS 0x21a2
257 VF610_PAD_PTD3__UART2_CTS 0x21a1
258 >;
259 };
260
261 pinctrl_usbh1_reg: gpio_usb_vbus {
262 fsl,pins = <
263 VF610_PAD_PTD4__GPIO_83 0x22ed
264 >;
265 };
266 };
267 };