arch/arm/boot/dts/zynq-zc702.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  *  Copyright (C) 2011 - 2014 Xilinx
   4  *  Copyright (C) 2012 National Instruments Corp.
   5  */
   6 /dts-v1/;
   7 #include "zynq-7000.dtsi"
   8
   9 / {
  10         model = "Xilinx ZC702 board";
  11         compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
  12
  13         aliases {
  14                 ethernet0 = &gem0;
  15                 i2c0 = &i2c0;
  16                 serial0 = &uart1;
  17                 mmc0 = &sdhci0;
  18         };
  19
  20         memory@0 {
  21                 device_type = "memory";
  22                 reg = <0x0 0x40000000>;
  23         };
  24
  25         chosen {
  26                 bootargs = "";
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         gpio-keys {
  31                 compatible = "gpio-keys";
  32                 autorepeat;
  33                 sw14 {
  34                         label = "sw14";
  35                         gpios = <&gpio0 12 0>;
  36                         linux,code = <108>; /* down */
  37                         wakeup-source;
  38                         autorepeat;
  39                 };
  40                 sw13 {
  41                         label = "sw13";
  42                         gpios = <&gpio0 14 0>;
  43                         linux,code = <103>; /* up */
  44                         wakeup-source;
  45                         autorepeat;
  46                 };
  47         };
  48
  49         leds {
  50                 compatible = "gpio-leds";
  51
  52                 ds23 {
  53                         label = "ds23";
  54                         gpios = <&gpio0 10 0>;
  55                         linux,default-trigger = "heartbeat";
  56                 };
  57         };
  58
  59         usb_phy0: phy0 {
  60                 compatible = "usb-nop-xceiv";
  61                 #phy-cells = <0>;
  62         };
  63 };
  64
  65 &amba {
  66         ocm: sram@fffc0000 {
  67                 compatible = "mmio-sram";
  68                 reg = <0xfffc0000 0x10000>;
  69         };
  70 };
  71
  72 &can0 {
  73         status = "okay";
  74         pinctrl-names = "default";
  75         pinctrl-0 = <&pinctrl_can0_default>;
  76 };
  77
  78 &clkc {
  79         ps-clk-frequency = <33333333>;
  80 };
  81
  82 &gem0 {
  83         status = "okay";
  84         phy-mode = "rgmii-id";
  85         phy-handle = <&ethernet_phy>;
  86         pinctrl-names = "default";
  87         pinctrl-0 = <&pinctrl_gem0_default>;
  88
  89         ethernet_phy: ethernet-phy@7 {
  90                 reg = <7>;
  91                 device_type = "ethernet-phy";
  92         };
  93 };
  94
  95 &gpio0 {
  96         pinctrl-names = "default";
  97         pinctrl-0 = <&pinctrl_gpio0_default>;
  98 };
  99
 100 &i2c0 {
 101         status = "okay";
 102         clock-frequency = <400000>;
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&pinctrl_i2c0_default>;
 105
 106         i2c-mux@74 {
 107                 compatible = "nxp,pca9548";
 108                 #address-cells = <1>;
 109                 #size-cells = <0>;
 110                 reg = <0x74>;
 111
 112                 i2c@0 {
 113                         #address-cells = <1>;
 114                         #size-cells = <0>;
 115                         reg = <0>;
 116                         si570: clock-generator@5d {
 117                                 #clock-cells = <0>;
 118                                 compatible = "silabs,si570";
 119                                 temperature-stability = <50>;
 120                                 reg = <0x5d>;
 121                                 factory-fout = <156250000>;
 122                                 clock-frequency = <148500000>;
 123                         };
 124                 };
 125
 126                 i2c@1 {
 127                         #address-cells = <1>;
 128                         #size-cells = <0>;
 129                         reg = <1>;
 130                         adv7511: hdmi-tx@39 {
 131                                 compatible = "adi,adv7511";
 132                                 reg = <0x39>;
 133                                 adi,input-depth = <8>;
 134                                 adi,input-colorspace = "yuv422";
 135                                 adi,input-clock = "1x";
 136                                 adi,input-style = <3>;
 137                                 adi,input-justification = "right";
 138                         };
 139                 };
 140
 141                 i2c@2 {
 142                         #address-cells = <1>;
 143                         #size-cells = <0>;
 144                         reg = <2>;
 145                         eeprom@54 {
 146                                 compatible = "atmel,24c08";
 147                                 reg = <0x54>;
 148                         };
 149                 };
 150
 151                 i2c@3 {
 152                         #address-cells = <1>;
 153                         #size-cells = <0>;
 154                         reg = <3>;
 155                         gpio@21 {
 156                                 compatible = "ti,tca6416";
 157                                 reg = <0x21>;
 158                                 gpio-controller;
 159                                 #gpio-cells = <2>;
 160                         };
 161                 };
 162
 163                 i2c@4 {
 164                         #address-cells = <1>;
 165                         #size-cells = <0>;
 166                         reg = <4>;
 167                         rtc@51 {
 168                                 compatible = "nxp,pcf8563";
 169                                 reg = <0x51>;
 170                         };
 171                 };
 172
 173                 i2c@7 {
 174                         #address-cells = <1>;
 175                         #size-cells = <0>;
 176                         reg = <7>;
 177                         hwmon@34 {
 178                                 compatible = "ti,ucd9248";
 179                                 reg = <0x34>;
 180                         };
 181                         hwmon@35 {
 182                                 compatible = "ti,ucd9248";
 183                                 reg = <0x35>;
 184                         };
 185                         hwmon@36 {
 186                                 compatible = "ti,ucd9248";
 187                                 reg = <0x36>;
 188                         };
 189                 };
 190         };
 191 };
 192
 193 &pinctrl0 {
 194         pinctrl_can0_default: can0-default {
 195                 mux {
 196                         function = "can0";
 197                         groups = "can0_9_grp";
 198                 };
 199
 200                 conf {
 201                         groups = "can0_9_grp";
 202                         slew-rate = <0>;
 203                         io-standard = <1>;
 204                 };
 205
 206                 conf-rx {
 207                         pins = "MIO46";
 208                         bias-high-impedance;
 209                 };
 210
 211                 conf-tx {
 212                         pins = "MIO47";
 213                         bias-disable;
 214                 };
 215         };
 216
 217         pinctrl_gem0_default: gem0-default {
 218                 mux {
 219                         function = "ethernet0";
 220                         groups = "ethernet0_0_grp";
 221                 };
 222
 223                 conf {
 224                         groups = "ethernet0_0_grp";
 225                         slew-rate = <0>;
 226                         io-standard = <4>;
 227                 };
 228
 229                 conf-rx {
 230                         pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
 231                         bias-high-impedance;
 232                         low-power-disable;
 233                 };
 234
 235                 conf-tx {
 236                         pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
 237                         bias-disable;
 238                         low-power-enable;
 239                 };
 240
 241                 mux-mdio {
 242                         function = "mdio0";
 243                         groups = "mdio0_0_grp";
 244                 };
 245
 246                 conf-mdio {
 247                         groups = "mdio0_0_grp";
 248                         slew-rate = <0>;
 249                         io-standard = <1>;
 250                         bias-disable;
 251                 };
 252         };
 253
 254         pinctrl_gpio0_default: gpio0-default {
 255                 mux {
 256                         function = "gpio0";
 257                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 258                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 259                                  "gpio0_13_grp", "gpio0_14_grp";
 260                 };
 261
 262                 conf {
 263                         groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
 264                                  "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
 265                                  "gpio0_13_grp", "gpio0_14_grp";
 266                         slew-rate = <0>;
 267                         io-standard = <1>;
 268                 };
 269
 270                 conf-pull-up {
 271                         pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
 272                         bias-pull-up;
 273                 };
 274
 275                 conf-pull-none {
 276                         pins = "MIO7", "MIO8";
 277                         bias-disable;
 278                 };
 279         };
 280
 281         pinctrl_i2c0_default: i2c0-default {
 282                 mux {
 283                         groups = "i2c0_10_grp";
 284                         function = "i2c0";
 285                 };
 286
 287                 conf {
 288                         groups = "i2c0_10_grp";
 289                         bias-pull-up;
 290                         slew-rate = <0>;
 291                         io-standard = <1>;
 292                 };
 293         };
 294
 295         pinctrl_sdhci0_default: sdhci0-default {
 296                 mux {
 297                         groups = "sdio0_2_grp";
 298                         function = "sdio0";
 299                 };
 300
 301                 conf {
 302                         groups = "sdio0_2_grp";
 303                         slew-rate = <0>;
 304                         io-standard = <1>;
 305                         bias-disable;
 306                 };
 307
 308                 mux-cd {
 309                         groups = "gpio0_0_grp";
 310                         function = "sdio0_cd";
 311                 };
 312
 313                 conf-cd {
 314                         groups = "gpio0_0_grp";
 315                         bias-high-impedance;
 316                         bias-pull-up;
 317                         slew-rate = <0>;
 318                         io-standard = <1>;
 319                 };
 320
 321                 mux-wp {
 322                         groups = "gpio0_15_grp";
 323                         function = "sdio0_wp";
 324                 };
 325
 326                 conf-wp {
 327                         groups = "gpio0_15_grp";
 328                         bias-high-impedance;
 329                         bias-pull-up;
 330                         slew-rate = <0>;
 331                         io-standard = <1>;
 332                 };
 333         };
 334
 335         pinctrl_uart1_default: uart1-default {
 336                 mux {
 337                         groups = "uart1_10_grp";
 338                         function = "uart1";
 339                 };
 340
 341                 conf {
 342                         groups = "uart1_10_grp";
 343                         slew-rate = <0>;
 344                         io-standard = <1>;
 345                 };
 346
 347                 conf-rx {
 348                         pins = "MIO49";
 349                         bias-high-impedance;
 350                 };
 351
 352                 conf-tx {
 353                         pins = "MIO48";
 354                         bias-disable;
 355                 };
 356         };
 357
 358         pinctrl_usb0_default: usb0-default {
 359                 mux {
 360                         groups = "usb0_0_grp";
 361                         function = "usb0";
 362                 };
 363
 364                 conf {
 365                         groups = "usb0_0_grp";
 366                         slew-rate = <0>;
 367                         io-standard = <1>;
 368                 };
 369
 370                 conf-rx {
 371                         pins = "MIO29", "MIO31", "MIO36";
 372                         bias-high-impedance;
 373                 };
 374
 375                 conf-tx {
 376                         pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
 377                                "MIO35", "MIO37", "MIO38", "MIO39";
 378                         bias-disable;
 379                 };
 380         };
 381 };
 382
 383 &sdhci0 {
 384         status = "okay";
 385         pinctrl-names = "default";
 386         pinctrl-0 = <&pinctrl_sdhci0_default>;
 387 };
 388
 389 &uart1 {
 390         status = "okay";
 391         pinctrl-names = "default";
 392         pinctrl-0 = <&pinctrl_uart1_default>;
 393 };
 394
 395 &usb0 {
 396         status = "okay";
 397         dr_mode = "host";
 398         usb-phy = <&usb_phy0>;
 399         pinctrl-names = "default";
 400         pinctrl-0 = <&pinctrl_usb0_default>;
 401 };