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1 # SPDX-License-Identifier: GPL-2.0
2
3 menuconfig ARM_CRYPTO
4 bool "ARM Accelerated Cryptographic Algorithms"
5 depends on ARM
6 help
7 Say Y here to choose from a selection of cryptographic algorithms
8 implemented using ARM specific CPU features or instructions.
9
10 if ARM_CRYPTO
11
12 config CRYPTO_SHA1_ARM
13 tristate "SHA1 digest algorithm (ARM-asm)"
14 select CRYPTO_SHA1
15 select CRYPTO_HASH
16 help
17 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
18 using optimized ARM assembler.
19
20 config CRYPTO_SHA1_ARM_NEON
21 tristate "SHA1 digest algorithm (ARM NEON)"
22 depends on KERNEL_MODE_NEON
23 select CRYPTO_SHA1_ARM
24 select CRYPTO_SHA1
25 select CRYPTO_HASH
26 help
27 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
28 using optimized ARM NEON assembly, when NEON instructions are
29 available.
30
31 config CRYPTO_SHA1_ARM_CE
32 tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)"
33 depends on KERNEL_MODE_NEON
34 select CRYPTO_SHA1_ARM
35 select CRYPTO_HASH
36 help
37 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
38 using special ARMv8 Crypto Extensions.
39
40 config CRYPTO_SHA2_ARM_CE
41 tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)"
42 depends on KERNEL_MODE_NEON
43 select CRYPTO_SHA256_ARM
44 select CRYPTO_HASH
45 help
46 SHA-256 secure hash standard (DFIPS 180-2) implemented
47 using special ARMv8 Crypto Extensions.
48
49 config CRYPTO_SHA256_ARM
50 tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
51 select CRYPTO_HASH
52 depends on !CPU_V7M
53 help
54 SHA-256 secure hash standard (DFIPS 180-2) implemented
55 using optimized ARM assembler and NEON, when available.
56
57 config CRYPTO_SHA512_ARM
58 tristate "SHA-384/512 digest algorithm (ARM-asm and NEON)"
59 select CRYPTO_HASH
60 depends on !CPU_V7M
61 help
62 SHA-512 secure hash standard (DFIPS 180-2) implemented
63 using optimized ARM assembler and NEON, when available.
64
65 config CRYPTO_AES_ARM
66 tristate "Scalar AES cipher for ARM"
67 select CRYPTO_ALGAPI
68 select CRYPTO_AES
69 help
70 Use optimized AES assembler routines for ARM platforms.
71
72 config CRYPTO_AES_ARM_BS
73 tristate "Bit sliced AES using NEON instructions"
74 depends on KERNEL_MODE_NEON
75 select CRYPTO_BLKCIPHER
76 select CRYPTO_SIMD
77 select CRYPTO_AES
78 help
79 Use a faster and more secure NEON based implementation of AES in CBC,
80 CTR and XTS modes
81
82 Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
83 and for XTS mode encryption, CBC and XTS mode decryption speedup is
84 around 25%. (CBC encryption speed is not affected by this driver.)
85 This implementation does not rely on any lookup tables so it is
86 believed to be invulnerable to cache timing attacks.
87
88 config CRYPTO_AES_ARM_CE
89 tristate "Accelerated AES using ARMv8 Crypto Extensions"
90 depends on KERNEL_MODE_NEON
91 select CRYPTO_BLKCIPHER
92 select CRYPTO_SIMD
93 help
94 Use an implementation of AES in CBC, CTR and XTS modes that uses
95 ARMv8 Crypto Extensions
96
97 config CRYPTO_GHASH_ARM_CE
98 tristate "PMULL-accelerated GHASH using NEON/ARMv8 Crypto Extensions"
99 depends on KERNEL_MODE_NEON
100 select CRYPTO_HASH
101 select CRYPTO_CRYPTD
102 help
103 Use an implementation of GHASH (used by the GCM AEAD chaining mode)
104 that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
105 that is part of the ARMv8 Crypto Extensions, or a slower variant that
106 uses the vmull.p8 instruction that is part of the basic NEON ISA.
107
108 config CRYPTO_CRCT10DIF_ARM_CE
109 tristate "CRCT10DIF digest algorithm using PMULL instructions"
110 depends on KERNEL_MODE_NEON && CRC_T10DIF
111 select CRYPTO_HASH
112
113 config CRYPTO_CRC32_ARM_CE
114 tristate "CRC32(C) digest algorithm using CRC and/or PMULL instructions"
115 depends on KERNEL_MODE_NEON && CRC32
116 select CRYPTO_HASH
117
118 config CRYPTO_CHACHA20_NEON
119 tristate "NEON accelerated ChaCha20 symmetric cipher"
120 depends on KERNEL_MODE_NEON
121 select CRYPTO_BLKCIPHER
122 select CRYPTO_CHACHA20
123
124 endif