arch/arm/include/asm/dma-mapping.h

   1 #ifndef ASMARM_DMA_MAPPING_H
   2 #define ASMARM_DMA_MAPPING_H
   3
   4 #ifdef __KERNEL__
   5
   6 #include <linux/mm_types.h>
   7 #include <linux/scatterlist.h>
   8 #include <linux/dma-attrs.h>
   9 #include <linux/dma-debug.h>
  10
  11 #include <asm-generic/dma-coherent.h>
  12 #include <asm/memory.h>
  13 #include <asm/cacheflush.h>
  14
  15 #include <xen/xen.h>
  16 #include <asm/xen/hypervisor.h>
  17
  18 #define DMA_ERROR_CODE  (~0)
  19 extern struct dma_map_ops arm_dma_ops;
  20 extern struct dma_map_ops arm_coherent_dma_ops;
  21
  22 static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)
  23 {
  24         if (dev && dev->archdata.dma_ops)
  25                 return dev->archdata.dma_ops;
  26         return &arm_dma_ops;
  27 }
  28
  29 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  30 {
  31         if (xen_initial_domain())
  32                 return xen_dma_ops;
  33         else
  34                 return __generic_dma_ops(dev);
  35 }
  36
  37 static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
  38 {
  39         BUG_ON(!dev);
  40         dev->archdata.dma_ops = ops;
  41 }
  42
  43 #include <asm-generic/dma-mapping-common.h>
  44
  45 static inline int dma_set_mask(struct device *dev, u64 mask)
  46 {
  47         return get_dma_ops(dev)->set_dma_mask(dev, mask);
  48 }
  49
  50 #ifdef __arch_page_to_dma
  51 #error Please update to __arch_pfn_to_dma
  52 #endif
  53
  54 /*
  55  * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
  56  * functions used internally by the DMA-mapping API to provide DMA
  57  * addresses. They must not be used by drivers.
  58  */
  59 #ifndef __arch_pfn_to_dma
  60 static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
  61 {
  62         return (dma_addr_t)__pfn_to_bus(pfn);
  63 }
  64
  65 static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
  66 {
  67         return __bus_to_pfn(addr);
  68 }
  69
  70 static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  71 {
  72         return (void *)__bus_to_virt((unsigned long)addr);
  73 }
  74
  75 static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  76 {
  77         return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
  78 }
  79 #else
  80 static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
  81 {
  82         return __arch_pfn_to_dma(dev, pfn);
  83 }
  84
  85 static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
  86 {
  87         return __arch_dma_to_pfn(dev, addr);
  88 }
  89
  90 static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
  91 {
  92         return __arch_dma_to_virt(dev, addr);
  93 }
  94
  95 static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
  96 {
  97         return __arch_virt_to_dma(dev, addr);
  98 }
  99 #endif
 100
 101 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
 102 {
 103         unsigned int offset = paddr & ~PAGE_MASK;
 104         return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
 105 }
 106
 107 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
 108 {
 109         unsigned int offset = dev_addr & ~PAGE_MASK;
 110         return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
 111 }
 112
 113 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
 114 {
 115         u64 limit, mask;
 116
 117         if (dev->dma_mask)
 118                 mask = *dev->dma_mask;
 119         else
 120                 mask = dev->coherent_dma_mask;
 121
 122         if (mask == 0)
 123                 return 0;
 124
 125         limit = (mask + 1) & ~mask;
 126         if (limit && size > limit)
 127                 return 0;
 128
 129         if ((addr | (addr + size - 1)) & ~mask)
 130                 return 0;
 131
 132         return 1;
 133 }
 134
 135 static inline void dma_mark_clean(void *addr, size_t size) { }
 136
 137 /*
 138  * DMA errors are defined by all-bits-set in the DMA address.
 139  */
 140 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 141 {
 142         debug_dma_mapping_error(dev, dma_addr);
 143         return dma_addr == DMA_ERROR_CODE;
 144 }
 145
 146 /*
 147  * Dummy noncoherent implementation.  We don't provide a dma_cache_sync
 148  * function so drivers using this API are highlighted with build warnings.
 149  */
 150 static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
 151                 dma_addr_t *handle, gfp_t gfp)
 152 {
 153         return NULL;
 154 }
 155
 156 static inline void dma_free_noncoherent(struct device *dev, size_t size,
 157                 void *cpu_addr, dma_addr_t handle)
 158 {
 159 }
 160
 161 extern int dma_supported(struct device *dev, u64 mask);
 162
 163 extern int arm_dma_set_mask(struct device *dev, u64 dma_mask);
 164
 165 /**
 166  * arm_dma_alloc - allocate consistent memory for DMA
 167  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 168  * @size: required memory size
 169  * @handle: bus-specific DMA address
 170  * @attrs: optinal attributes that specific mapping properties
 171  *
 172  * Allocate some memory for a device for performing DMA.  This function
 173  * allocates pages, and will return the CPU-viewed address, and sets @handle
 174  * to be the device-viewed address.
 175  */
 176 extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
 177                            gfp_t gfp, struct dma_attrs *attrs);
 178
 179 #define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
 180
 181 static inline void *dma_alloc_attrs(struct device *dev, size_t size,
 182                                        dma_addr_t *dma_handle, gfp_t flag,
 183                                        struct dma_attrs *attrs)
 184 {
 185         struct dma_map_ops *ops = get_dma_ops(dev);
 186         void *cpu_addr;
 187         BUG_ON(!ops);
 188
 189         cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
 190         debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
 191         return cpu_addr;
 192 }
 193
 194 /**
 195  * arm_dma_free - free memory allocated by arm_dma_alloc
 196  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 197  * @size: size of memory originally requested in dma_alloc_coherent
 198  * @cpu_addr: CPU-view address returned from dma_alloc_coherent
 199  * @handle: device-view address returned from dma_alloc_coherent
 200  * @attrs: optinal attributes that specific mapping properties
 201  *
 202  * Free (and unmap) a DMA buffer previously allocated by
 203  * arm_dma_alloc().
 204  *
 205  * References to memory and mappings associated with cpu_addr/handle
 206  * during and after this call executing are illegal.
 207  */
 208 extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
 209                          dma_addr_t handle, struct dma_attrs *attrs);
 210
 211 #define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL)
 212
 213 static inline void dma_free_attrs(struct device *dev, size_t size,
 214                                      void *cpu_addr, dma_addr_t dma_handle,
 215                                      struct dma_attrs *attrs)
 216 {
 217         struct dma_map_ops *ops = get_dma_ops(dev);
 218         BUG_ON(!ops);
 219
 220         debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
 221         ops->free(dev, size, cpu_addr, dma_handle, attrs);
 222 }
 223
 224 /**
 225  * arm_dma_mmap - map a coherent DMA allocation into user space
 226  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 227  * @vma: vm_area_struct describing requested user mapping
 228  * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
 229  * @handle: device-view address returned from dma_alloc_coherent
 230  * @size: size of memory originally requested in dma_alloc_coherent
 231  * @attrs: optinal attributes that specific mapping properties
 232  *
 233  * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
 234  * into user space.  The coherent DMA buffer must not be freed by the
 235  * driver until the user space mapping has been released.
 236  */
 237 extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
 238                         void *cpu_addr, dma_addr_t dma_addr, size_t size,
 239                         struct dma_attrs *attrs);
 240
 241 static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
 242                                        dma_addr_t *dma_handle, gfp_t flag)
 243 {
 244         DEFINE_DMA_ATTRS(attrs);
 245         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
 246         return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs);
 247 }
 248
 249 static inline void dma_free_writecombine(struct device *dev, size_t size,
 250                                      void *cpu_addr, dma_addr_t dma_handle)
 251 {
 252         DEFINE_DMA_ATTRS(attrs);
 253         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
 254         return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
 255 }
 256
 257 /*
 258  * This can be called during early boot to increase the size of the atomic
 259  * coherent DMA pool above the default value of 256KiB. It must be called
 260  * before postcore_initcall.
 261  */
 262 extern void __init init_dma_coherent_pool_size(unsigned long size);
 263
 264 /*
 265  * For SA-1111, IXP425, and ADI systems  the dma-mapping functions are "magic"
 266  * and utilize bounce buffers as needed to work around limited DMA windows.
 267  *
 268  * On the SA-1111, a bug limits DMA to only certain regions of RAM.
 269  * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
 270  * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
 271  *
 272  * The following are helper functions used by the dmabounce subystem
 273  *
 274  */
 275
 276 /**
 277  * dmabounce_register_dev
 278  *
 279  * @dev: valid struct device pointer
 280  * @small_buf_size: size of buffers to use with small buffer pool
 281  * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
 282  * @needs_bounce_fn: called to determine whether buffer needs bouncing
 283  *
 284  * This function should be called by low-level platform code to register
 285  * a device as requireing DMA buffer bouncing. The function will allocate
 286  * appropriate DMA pools for the device.
 287  */
 288 extern int dmabounce_register_dev(struct device *, unsigned long,
 289                 unsigned long, int (*)(struct device *, dma_addr_t, size_t));
 290
 291 /**
 292  * dmabounce_unregister_dev
 293  *
 294  * @dev: valid struct device pointer
 295  *
 296  * This function should be called by low-level platform code when device
 297  * that was previously registered with dmabounce_register_dev is removed
 298  * from the system.
 299  *
 300  */
 301 extern void dmabounce_unregister_dev(struct device *);
 302
 303
 304
 305 /*
 306  * The scatter list versions of the above methods.
 307  */
 308 extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
 309                 enum dma_data_direction, struct dma_attrs *attrs);
 310 extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
 311                 enum dma_data_direction, struct dma_attrs *attrs);
 312 extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
 313                 enum dma_data_direction);
 314 extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
 315                 enum dma_data_direction);
 316 extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
 317                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 318                 struct dma_attrs *attrs);
 319
 320 #endif /* __KERNEL__ */
 321 #endif