arch/arm/include/asm/kvm_mmu.h

   1 /*
   2  * Copyright (C) 2012 - Virtual Open Systems and Columbia University
   3  * Author: Christoffer Dall <c.dall@virtualopensystems.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License, version 2, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  17  */
  18
  19 #ifndef __ARM_KVM_MMU_H__
  20 #define __ARM_KVM_MMU_H__
  21
  22 #include <asm/memory.h>
  23 #include <asm/page.h>
  24
  25 /*
  26  * We directly use the kernel VA for the HYP, as we can directly share
  27  * the mapping (HTTBR "covers" TTBR1).
  28  */
  29 #define kern_hyp_va(kva)        (kva)
  30
  31 /* Contrary to arm64, there is no need to generate a PC-relative address */
  32 #define hyp_symbol_addr(s)                                              \
  33         ({                                                              \
  34                 typeof(s) *addr = &(s);                                 \
  35                 addr;                                                   \
  36         })
  37
  38 /*
  39  * KVM_MMU_CACHE_MIN_PAGES is the number of stage2 page table translation levels.
  40  */
  41 #define KVM_MMU_CACHE_MIN_PAGES 2
  42
  43 #ifndef __ASSEMBLY__
  44
  45 #include <linux/highmem.h>
  46 #include <asm/cacheflush.h>
  47 #include <asm/pgalloc.h>
  48 #include <asm/stage2_pgtable.h>
  49
  50 int create_hyp_mappings(void *from, void *to, pgprot_t prot);
  51 int create_hyp_io_mappings(void *from, void *to, phys_addr_t);
  52 void free_hyp_pgds(void);
  53
  54 void stage2_unmap_vm(struct kvm *kvm);
  55 int kvm_alloc_stage2_pgd(struct kvm *kvm);
  56 void kvm_free_stage2_pgd(struct kvm *kvm);
  57 int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
  58                           phys_addr_t pa, unsigned long size, bool writable);
  59
  60 int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run);
  61
  62 void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu);
  63
  64 phys_addr_t kvm_mmu_get_httbr(void);
  65 phys_addr_t kvm_get_idmap_vector(void);
  66 int kvm_mmu_init(void);
  67 void kvm_clear_hyp_idmap(void);
  68
  69 static inline void kvm_set_pmd(pmd_t *pmd, pmd_t new_pmd)
  70 {
  71         *pmd = new_pmd;
  72         dsb(ishst);
  73 }
  74
  75 static inline void kvm_set_pte(pte_t *pte, pte_t new_pte)
  76 {
  77         *pte = new_pte;
  78         dsb(ishst);
  79 }
  80
  81 static inline pte_t kvm_s2pte_mkwrite(pte_t pte)
  82 {
  83         pte_val(pte) |= L_PTE_S2_RDWR;
  84         return pte;
  85 }
  86
  87 static inline pmd_t kvm_s2pmd_mkwrite(pmd_t pmd)
  88 {
  89         pmd_val(pmd) |= L_PMD_S2_RDWR;
  90         return pmd;
  91 }
  92
  93 static inline void kvm_set_s2pte_readonly(pte_t *pte)
  94 {
  95         pte_val(*pte) = (pte_val(*pte) & ~L_PTE_S2_RDWR) | L_PTE_S2_RDONLY;
  96 }
  97
  98 static inline bool kvm_s2pte_readonly(pte_t *pte)
  99 {
 100         return (pte_val(*pte) & L_PTE_S2_RDWR) == L_PTE_S2_RDONLY;
 101 }
 102
 103 static inline void kvm_set_s2pmd_readonly(pmd_t *pmd)
 104 {
 105         pmd_val(*pmd) = (pmd_val(*pmd) & ~L_PMD_S2_RDWR) | L_PMD_S2_RDONLY;
 106 }
 107
 108 static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
 109 {
 110         return (pmd_val(*pmd) & L_PMD_S2_RDWR) == L_PMD_S2_RDONLY;
 111 }
 112
 113 static inline bool kvm_page_empty(void *ptr)
 114 {
 115         struct page *ptr_page = virt_to_page(ptr);
 116         return page_count(ptr_page) == 1;
 117 }
 118
 119 #define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep)
 120 #define kvm_pmd_table_empty(kvm, pmdp) kvm_page_empty(pmdp)
 121 #define kvm_pud_table_empty(kvm, pudp) false
 122
 123 #define hyp_pte_table_empty(ptep) kvm_page_empty(ptep)
 124 #define hyp_pmd_table_empty(pmdp) kvm_page_empty(pmdp)
 125 #define hyp_pud_table_empty(pudp) false
 126
 127 struct kvm;
 128
 129 #define kvm_flush_dcache_to_poc(a,l)    __cpuc_flush_dcache_area((a), (l))
 130
 131 static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu)
 132 {
 133         return (vcpu_cp15(vcpu, c1_SCTLR) & 0b101) == 0b101;
 134 }
 135
 136 static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu,
 137                                                kvm_pfn_t pfn,
 138                                                unsigned long size)
 139 {
 140         /*
 141          * If we are going to insert an instruction page and the icache is
 142          * either VIPT or PIPT, there is a potential problem where the host
 143          * (or another VM) may have used the same page as this guest, and we
 144          * read incorrect data from the icache.  If we're using a PIPT cache,
 145          * we can invalidate just that page, but if we are using a VIPT cache
 146          * we need to invalidate the entire icache - damn shame - as written
 147          * in the ARM ARM (DDI 0406C.b - Page B3-1393).
 148          *
 149          * VIVT caches are tagged using both the ASID and the VMID and doesn't
 150          * need any kind of flushing (DDI 0406C.b - Page B3-1392).
 151          *
 152          * We need to do this through a kernel mapping (using the
 153          * user-space mapping has proved to be the wrong
 154          * solution). For that, we need to kmap one page at a time,
 155          * and iterate over the range.
 156          */
 157
 158         VM_BUG_ON(size & ~PAGE_MASK);
 159
 160         while (size) {
 161                 void *va = kmap_atomic_pfn(pfn);
 162
 163                 kvm_flush_dcache_to_poc(va, PAGE_SIZE);
 164
 165                 if (icache_is_pipt())
 166                         __cpuc_coherent_user_range((unsigned long)va,
 167                                                    (unsigned long)va + PAGE_SIZE);
 168
 169                 size -= PAGE_SIZE;
 170                 pfn++;
 171
 172                 kunmap_atomic(va);
 173         }
 174
 175         if (!icache_is_pipt() && !icache_is_vivt_asid_tagged()) {
 176                 /* any kind of VIPT cache */
 177                 __flush_icache_all();
 178         }
 179 }
 180
 181 static inline void __kvm_flush_dcache_pte(pte_t pte)
 182 {
 183         void *va = kmap_atomic(pte_page(pte));
 184
 185         kvm_flush_dcache_to_poc(va, PAGE_SIZE);
 186
 187         kunmap_atomic(va);
 188 }
 189
 190 static inline void __kvm_flush_dcache_pmd(pmd_t pmd)
 191 {
 192         unsigned long size = PMD_SIZE;
 193         kvm_pfn_t pfn = pmd_pfn(pmd);
 194
 195         while (size) {
 196                 void *va = kmap_atomic_pfn(pfn);
 197
 198                 kvm_flush_dcache_to_poc(va, PAGE_SIZE);
 199
 200                 pfn++;
 201                 size -= PAGE_SIZE;
 202
 203                 kunmap_atomic(va);
 204         }
 205 }
 206
 207 static inline void __kvm_flush_dcache_pud(pud_t pud)
 208 {
 209 }
 210
 211 #define kvm_virt_to_phys(x)             virt_to_idmap((unsigned long)(x))
 212
 213 void kvm_set_way_flush(struct kvm_vcpu *vcpu);
 214 void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled);
 215
 216 static inline bool __kvm_cpu_uses_extended_idmap(void)
 217 {
 218         return false;
 219 }
 220
 221 static inline void __kvm_extend_hypmap(pgd_t *boot_hyp_pgd,
 222                                        pgd_t *hyp_pgd,
 223                                        pgd_t *merged_hyp_pgd,
 224                                        unsigned long hyp_idmap_start) { }
 225
 226 static inline unsigned int kvm_get_vmid_bits(void)
 227 {
 228         return 8;
 229 }
 230
 231 /*
 232  * We are not in the kvm->srcu critical section most of the time, so we take
 233  * the SRCU read lock here. Since we copy the data from the user page, we
 234  * can immediately drop the lock again.
 235  */
 236 static inline int kvm_read_guest_lock(struct kvm *kvm,
 237                                       gpa_t gpa, void *data, unsigned long len)
 238 {
 239         int srcu_idx = srcu_read_lock(&kvm->srcu);
 240         int ret = kvm_read_guest(kvm, gpa, data, len);
 241
 242         srcu_read_unlock(&kvm->srcu, srcu_idx);
 243
 244         return ret;
 245 }
 246
 247 static inline void *kvm_get_hyp_vector(void)
 248 {
 249         switch(read_cpuid_part()) {
 250 #ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
 251         case ARM_CPU_PART_CORTEX_A12:
 252         case ARM_CPU_PART_CORTEX_A17:
 253         {
 254                 extern char __kvm_hyp_vector_bp_inv[];
 255                 return kvm_ksym_ref(__kvm_hyp_vector_bp_inv);
 256         }
 257
 258         case ARM_CPU_PART_BRAHMA_B15:
 259         case ARM_CPU_PART_CORTEX_A15:
 260         {
 261                 extern char __kvm_hyp_vector_ic_inv[];
 262                 return kvm_ksym_ref(__kvm_hyp_vector_ic_inv);
 263         }
 264 #endif
 265         default:
 266         {
 267                 extern char __kvm_hyp_vector[];
 268                 return kvm_ksym_ref(__kvm_hyp_vector);
 269         }
 270         }
 271 }
 272
 273 static inline int kvm_map_vectors(void)
 274 {
 275         return 0;
 276 }
 277
 278 static inline int hyp_map_aux_data(void)
 279 {
 280         return 0;
 281 }
 282
 283 #endif  /* !__ASSEMBLY__ */
 284
 285 #endif /* __ARM_KVM_MMU_H__ */