]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/arm/mach-at91rm9200/devices.c
Merge Zaurus branch
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-at91rm9200 / devices.c
1 /*
2 * arch/arm/mach-at91rm9200/devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/config.h>
17 #include <linux/platform_device.h>
18
19 #include <asm/arch/hardware.h>
20 #include <asm/arch/board.h>
21 #include <asm/arch/gpio.h>
22
23 #include "generic.h"
24
25 #define SZ_512 0x00000200
26 #define SZ_256 0x00000100
27 #define SZ_16 0x00000010
28
29 /* --------------------------------------------------------------------
30 * USB Host
31 * -------------------------------------------------------------------- */
32
33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34 static u64 ohci_dmamask = 0xffffffffUL;
35 static struct at91_usbh_data usbh_data;
36
37 static struct resource at91_usbh_resources[] = {
38 [0] = {
39 .start = AT91_UHP_BASE,
40 .end = AT91_UHP_BASE + SZ_1M - 1,
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .start = AT91_ID_UHP,
45 .end = AT91_ID_UHP,
46 .flags = IORESOURCE_IRQ,
47 },
48 };
49
50 static struct platform_device at91rm9200_usbh_device = {
51 .name = "at91_ohci",
52 .id = -1,
53 .dev = {
54 .dma_mask = &ohci_dmamask,
55 .coherent_dma_mask = 0xffffffff,
56 .platform_data = &usbh_data,
57 },
58 .resource = at91_usbh_resources,
59 .num_resources = ARRAY_SIZE(at91_usbh_resources),
60 };
61
62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
63 {
64 if (!data)
65 return;
66
67 usbh_data = *data;
68 platform_device_register(&at91rm9200_usbh_device);
69 }
70 #else
71 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
72 #endif
73
74
75 /* --------------------------------------------------------------------
76 * USB Device (Gadget)
77 * -------------------------------------------------------------------- */
78
79 #ifdef CONFIG_USB_GADGET_AT91
80 static struct at91_udc_data udc_data;
81
82 static struct resource at91_udc_resources[] = {
83 [0] = {
84 .start = AT91_BASE_UDP,
85 .end = AT91_BASE_UDP + SZ_16K - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = AT91_ID_UDP,
90 .end = AT91_ID_UDP,
91 .flags = IORESOURCE_IRQ,
92 },
93 };
94
95 static struct platform_device at91rm9200_udc_device = {
96 .name = "at91_udc",
97 .id = -1,
98 .dev = {
99 .platform_data = &udc_data,
100 },
101 .resource = at91_udc_resources,
102 .num_resources = ARRAY_SIZE(at91_udc_resources),
103 };
104
105 void __init at91_add_device_udc(struct at91_udc_data *data)
106 {
107 if (!data)
108 return;
109
110 if (data->vbus_pin) {
111 at91_set_gpio_input(data->vbus_pin, 0);
112 at91_set_deglitch(data->vbus_pin, 1);
113 }
114 if (data->pullup_pin)
115 at91_set_gpio_output(data->pullup_pin, 0);
116
117 udc_data = *data;
118 platform_device_register(&at91rm9200_udc_device);
119 }
120 #else
121 void __init at91_add_device_udc(struct at91_udc_data *data) {}
122 #endif
123
124
125 /* --------------------------------------------------------------------
126 * Ethernet
127 * -------------------------------------------------------------------- */
128
129 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
130 static u64 eth_dmamask = 0xffffffffUL;
131 static struct at91_eth_data eth_data;
132
133 static struct resource at91_eth_resources[] = {
134 [0] = {
135 .start = AT91_BASE_EMAC,
136 .end = AT91_BASE_EMAC + SZ_16K - 1,
137 .flags = IORESOURCE_MEM,
138 },
139 [1] = {
140 .start = AT91_ID_EMAC,
141 .end = AT91_ID_EMAC,
142 .flags = IORESOURCE_IRQ,
143 },
144 };
145
146 static struct platform_device at91rm9200_eth_device = {
147 .name = "at91_ether",
148 .id = -1,
149 .dev = {
150 .dma_mask = &eth_dmamask,
151 .coherent_dma_mask = 0xffffffff,
152 .platform_data = &eth_data,
153 },
154 .resource = at91_eth_resources,
155 .num_resources = ARRAY_SIZE(at91_eth_resources),
156 };
157
158 void __init at91_add_device_eth(struct at91_eth_data *data)
159 {
160 if (!data)
161 return;
162
163 if (data->phy_irq_pin) {
164 at91_set_gpio_input(data->phy_irq_pin, 0);
165 at91_set_deglitch(data->phy_irq_pin, 1);
166 }
167
168 /* Pins used for MII and RMII */
169 at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
170 at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
171 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
172 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
173 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
174 at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
175 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
176 at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
177 at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
178 at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
179
180 if (!data->is_rmii) {
181 at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
182 at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
183 at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
184 at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
185 at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
186 at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
187 at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
188 at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
189 }
190
191 eth_data = *data;
192 platform_device_register(&at91rm9200_eth_device);
193 }
194 #else
195 void __init at91_add_device_eth(struct at91_eth_data *data) {}
196 #endif
197
198
199 /* --------------------------------------------------------------------
200 * Compact Flash / PCMCIA
201 * -------------------------------------------------------------------- */
202
203 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
204 static struct at91_cf_data cf_data;
205
206 static struct resource at91_cf_resources[] = {
207 [0] = {
208 .start = AT91_CF_BASE,
209 /* ties up CS4, CS5 and CS6 */
210 .end = AT91_CF_BASE + (0x30000000 - 1),
211 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
212 },
213 };
214
215 static struct platform_device at91rm9200_cf_device = {
216 .name = "at91_cf",
217 .id = -1,
218 .dev = {
219 .platform_data = &cf_data,
220 },
221 .resource = at91_cf_resources,
222 .num_resources = ARRAY_SIZE(at91_cf_resources),
223 };
224
225 void __init at91_add_device_cf(struct at91_cf_data *data)
226 {
227 if (!data)
228 return;
229
230 /* input/irq */
231 if (data->irq_pin) {
232 at91_set_gpio_input(data->irq_pin, 1);
233 at91_set_deglitch(data->irq_pin, 1);
234 }
235 at91_set_gpio_input(data->det_pin, 1);
236 at91_set_deglitch(data->det_pin, 1);
237
238 /* outputs, initially off */
239 if (data->vcc_pin)
240 at91_set_gpio_output(data->vcc_pin, 0);
241 at91_set_gpio_output(data->rst_pin, 0);
242
243 /* force poweron defaults for these pins ... */
244 at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
245 at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
246 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
247 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
248
249 cf_data = *data;
250 platform_device_register(&at91rm9200_cf_device);
251 }
252 #else
253 void __init at91_add_device_cf(struct at91_cf_data *data) {}
254 #endif
255
256
257 /* --------------------------------------------------------------------
258 * MMC / SD
259 * -------------------------------------------------------------------- */
260
261 #if defined(CONFIG_MMC_AT91RM9200) || defined(CONFIG_MMC_AT91RM9200_MODULE)
262 static u64 mmc_dmamask = 0xffffffffUL;
263 static struct at91_mmc_data mmc_data;
264
265 static struct resource at91_mmc_resources[] = {
266 [0] = {
267 .start = AT91_BASE_MCI,
268 .end = AT91_BASE_MCI + SZ_16K - 1,
269 .flags = IORESOURCE_MEM,
270 },
271 [1] = {
272 .start = AT91_ID_MCI,
273 .end = AT91_ID_MCI,
274 .flags = IORESOURCE_IRQ,
275 },
276 };
277
278 static struct platform_device at91rm9200_mmc_device = {
279 .name = "at91_mci",
280 .id = -1,
281 .dev = {
282 .dma_mask = &mmc_dmamask,
283 .coherent_dma_mask = 0xffffffff,
284 .platform_data = &mmc_data,
285 },
286 .resource = at91_mmc_resources,
287 .num_resources = ARRAY_SIZE(at91_mmc_resources),
288 };
289
290 void __init at91_add_device_mmc(struct at91_mmc_data *data)
291 {
292 if (!data)
293 return;
294
295 /* input/irq */
296 if (data->det_pin) {
297 at91_set_gpio_input(data->det_pin, 1);
298 at91_set_deglitch(data->det_pin, 1);
299 }
300 if (data->wp_pin)
301 at91_set_gpio_input(data->wp_pin, 1);
302
303 /* CLK */
304 at91_set_A_periph(AT91_PIN_PA27, 0);
305
306 if (data->is_b) {
307 /* CMD */
308 at91_set_B_periph(AT91_PIN_PA8, 0);
309
310 /* DAT0, maybe DAT1..DAT3 */
311 at91_set_B_periph(AT91_PIN_PA9, 0);
312 if (data->wire4) {
313 at91_set_B_periph(AT91_PIN_PA10, 0);
314 at91_set_B_periph(AT91_PIN_PA11, 0);
315 at91_set_B_periph(AT91_PIN_PA12, 0);
316 }
317 } else {
318 /* CMD */
319 at91_set_A_periph(AT91_PIN_PA28, 0);
320
321 /* DAT0, maybe DAT1..DAT3 */
322 at91_set_A_periph(AT91_PIN_PA29, 0);
323 if (data->wire4) {
324 at91_set_B_periph(AT91_PIN_PB3, 0);
325 at91_set_B_periph(AT91_PIN_PB4, 0);
326 at91_set_B_periph(AT91_PIN_PB5, 0);
327 }
328 }
329
330 mmc_data = *data;
331 platform_device_register(&at91rm9200_mmc_device);
332 }
333 #else
334 void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
335 #endif
336
337
338 /* --------------------------------------------------------------------
339 * NAND / SmartMedia
340 * -------------------------------------------------------------------- */
341
342 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
343 static struct at91_nand_data nand_data;
344
345 static struct resource at91_nand_resources[] = {
346 {
347 .start = AT91_SMARTMEDIA_BASE,
348 .end = AT91_SMARTMEDIA_BASE + SZ_8M - 1,
349 .flags = IORESOURCE_MEM,
350 }
351 };
352
353 static struct platform_device at91_nand_device = {
354 .name = "at91_nand",
355 .id = -1,
356 .dev = {
357 .platform_data = &nand_data,
358 },
359 .resource = at91_nand_resources,
360 .num_resources = ARRAY_SIZE(at91_nand_resources),
361 };
362
363 void __init at91_add_device_nand(struct at91_nand_data *data)
364 {
365 if (!data)
366 return;
367
368 /* enable pin */
369 if (data->enable_pin)
370 at91_set_gpio_output(data->enable_pin, 1);
371
372 /* ready/busy pin */
373 if (data->rdy_pin)
374 at91_set_gpio_input(data->rdy_pin, 1);
375
376 /* card detect pin */
377 if (data->det_pin)
378 at91_set_gpio_input(data->det_pin, 1);
379
380 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
381 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
382
383 nand_data = *data;
384 platform_device_register(&at91_nand_device);
385 }
386 #else
387 void __init at91_add_device_nand(struct at91_nand_data *data) {}
388 #endif
389
390
391 /* --------------------------------------------------------------------
392 * TWI (i2c)
393 * -------------------------------------------------------------------- */
394
395 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
396 static struct platform_device at91rm9200_twi_device = {
397 .name = "at91_i2c",
398 .id = -1,
399 .num_resources = 0,
400 };
401
402 void __init at91_add_device_i2c(void)
403 {
404 /* pins used for TWI interface */
405 at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
406 at91_set_multi_drive(AT91_PIN_PA25, 1);
407
408 at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
409 at91_set_multi_drive(AT91_PIN_PA26, 1);
410
411 platform_device_register(&at91rm9200_twi_device);
412 }
413 #else
414 void __init at91_add_device_i2c(void) {}
415 #endif
416
417
418 /* --------------------------------------------------------------------
419 * SPI
420 * -------------------------------------------------------------------- */
421
422 #if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
423 static u64 spi_dmamask = 0xffffffffUL;
424
425 static struct resource at91_spi_resources[] = {
426 [0] = {
427 .start = AT91_BASE_SPI,
428 .end = AT91_BASE_SPI + SZ_16K - 1,
429 .flags = IORESOURCE_MEM,
430 },
431 [1] = {
432 .start = AT91_ID_SPI,
433 .end = AT91_ID_SPI,
434 .flags = IORESOURCE_IRQ,
435 },
436 };
437
438 static struct platform_device at91rm9200_spi_device = {
439 .name = "at91_spi",
440 .id = 0,
441 .dev = {
442 .dma_mask = &spi_dmamask,
443 .coherent_dma_mask = 0xffffffff,
444 },
445 .resource = at91_spi_resources,
446 .num_resources = ARRAY_SIZE(at91_spi_resources),
447 };
448
449 static const unsigned at91_spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
450
451 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
452 {
453 int i;
454 unsigned long cs_pin;
455
456 at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
457 at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
458 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
459
460 /* Enable SPI chip-selects */
461 for (i = 0; i < nr_devices; i++) {
462 if (devices[i].controller_data)
463 cs_pin = (unsigned long) devices[i].controller_data;
464 else
465 cs_pin = at91_spi_standard_cs[devices[i].chip_select];
466
467 #ifdef CONFIG_SPI_AT91_MANUAL_CS
468 at91_set_gpio_output(cs_pin, 1);
469 #else
470 at91_set_A_periph(cs_pin, 0);
471 #endif
472
473 /* pass chip-select pin to driver */
474 devices[i].controller_data = (void *) cs_pin;
475 }
476
477 spi_register_board_info(devices, nr_devices);
478 at91_clock_associate("spi0_clk", &at91rm9200_spi_device.dev, "spi");
479 platform_device_register(&at91rm9200_spi_device);
480 }
481 #else
482 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
483 #endif
484
485
486 /* --------------------------------------------------------------------
487 * RTC
488 * -------------------------------------------------------------------- */
489
490 #if defined(CONFIG_RTC_DRV_AT91) || defined(CONFIG_RTC_DRV_AT91_MODULE)
491 static struct platform_device at91rm9200_rtc_device = {
492 .name = "at91_rtc",
493 .id = -1,
494 .num_resources = 0,
495 };
496
497 static void __init at91_add_device_rtc(void)
498 {
499 platform_device_register(&at91rm9200_rtc_device);
500 }
501 #else
502 static void __init at91_add_device_rtc(void) {}
503 #endif
504
505
506 /* --------------------------------------------------------------------
507 * Watchdog
508 * -------------------------------------------------------------------- */
509
510 #if defined(CONFIG_AT91_WATCHDOG) || defined(CONFIG_AT91_WATCHDOG_MODULE)
511 static struct platform_device at91rm9200_wdt_device = {
512 .name = "at91_wdt",
513 .id = -1,
514 .num_resources = 0,
515 };
516
517 static void __init at91_add_device_watchdog(void)
518 {
519 platform_device_register(&at91rm9200_wdt_device);
520 }
521 #else
522 static void __init at91_add_device_watchdog(void) {}
523 #endif
524
525
526 /* --------------------------------------------------------------------
527 * LEDs
528 * -------------------------------------------------------------------- */
529
530 #if defined(CONFIG_LEDS)
531 u8 at91_leds_cpu;
532 u8 at91_leds_timer;
533
534 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
535 {
536 at91_leds_cpu = cpu_led;
537 at91_leds_timer = timer_led;
538 }
539 #else
540 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
541 #endif
542
543
544 /* --------------------------------------------------------------------
545 * UART
546 * -------------------------------------------------------------------- */
547
548 #if defined(CONFIG_SERIAL_AT91)
549 static struct resource dbgu_resources[] = {
550 [0] = {
551 .start = AT91_VA_BASE_SYS + AT91_DBGU,
552 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
553 .flags = IORESOURCE_MEM,
554 },
555 [1] = {
556 .start = AT91_ID_SYS,
557 .end = AT91_ID_SYS,
558 .flags = IORESOURCE_IRQ,
559 },
560 };
561
562 static struct at91_uart_data dbgu_data = {
563 .use_dma_tx = 0,
564 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
565 };
566
567 static struct platform_device at91rm9200_dbgu_device = {
568 .name = "at91_usart",
569 .id = 0,
570 .dev = {
571 .platform_data = &dbgu_data,
572 .coherent_dma_mask = 0xffffffff,
573 },
574 .resource = dbgu_resources,
575 .num_resources = ARRAY_SIZE(dbgu_resources),
576 };
577
578 static inline void configure_dbgu_pins(void)
579 {
580 at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
581 at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
582 }
583
584 static struct resource uart0_resources[] = {
585 [0] = {
586 .start = AT91_BASE_US0,
587 .end = AT91_BASE_US0 + SZ_16K - 1,
588 .flags = IORESOURCE_MEM,
589 },
590 [1] = {
591 .start = AT91_ID_US0,
592 .end = AT91_ID_US0,
593 .flags = IORESOURCE_IRQ,
594 },
595 };
596
597 static struct at91_uart_data uart0_data = {
598 .use_dma_tx = 1,
599 .use_dma_rx = 1,
600 };
601
602 static struct platform_device at91rm9200_uart0_device = {
603 .name = "at91_usart",
604 .id = 1,
605 .dev = {
606 .platform_data = &uart0_data,
607 .coherent_dma_mask = 0xffffffff,
608 },
609 .resource = uart0_resources,
610 .num_resources = ARRAY_SIZE(uart0_resources),
611 };
612
613 static inline void configure_usart0_pins(void)
614 {
615 at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
616 at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
617 at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
618
619 /*
620 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
621 * We need to drive the pin manually. Default is off (RTS is active low).
622 */
623 at91_set_gpio_output(AT91_PIN_PA21, 1);
624 }
625
626 static struct resource uart1_resources[] = {
627 [0] = {
628 .start = AT91_BASE_US1,
629 .end = AT91_BASE_US1 + SZ_16K - 1,
630 .flags = IORESOURCE_MEM,
631 },
632 [1] = {
633 .start = AT91_ID_US1,
634 .end = AT91_ID_US1,
635 .flags = IORESOURCE_IRQ,
636 },
637 };
638
639 static struct at91_uart_data uart1_data = {
640 .use_dma_tx = 1,
641 .use_dma_rx = 1,
642 };
643
644 static struct platform_device at91rm9200_uart1_device = {
645 .name = "at91_usart",
646 .id = 2,
647 .dev = {
648 .platform_data = &uart1_data,
649 .coherent_dma_mask = 0xffffffff,
650 },
651 .resource = uart1_resources,
652 .num_resources = ARRAY_SIZE(uart1_resources),
653 };
654
655 static inline void configure_usart1_pins(void)
656 {
657 at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
658 at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
659 at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
660 at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
661 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
662 at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
663 at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
664 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
665 }
666
667 static struct resource uart2_resources[] = {
668 [0] = {
669 .start = AT91_BASE_US2,
670 .end = AT91_BASE_US2 + SZ_16K - 1,
671 .flags = IORESOURCE_MEM,
672 },
673 [1] = {
674 .start = AT91_ID_US2,
675 .end = AT91_ID_US2,
676 .flags = IORESOURCE_IRQ,
677 },
678 };
679
680 static struct at91_uart_data uart2_data = {
681 .use_dma_tx = 1,
682 .use_dma_rx = 1,
683 };
684
685 static struct platform_device at91rm9200_uart2_device = {
686 .name = "at91_usart",
687 .id = 3,
688 .dev = {
689 .platform_data = &uart2_data,
690 .coherent_dma_mask = 0xffffffff,
691 },
692 .resource = uart2_resources,
693 .num_resources = ARRAY_SIZE(uart2_resources),
694 };
695
696 static inline void configure_usart2_pins(void)
697 {
698 at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
699 at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
700 }
701
702 static struct resource uart3_resources[] = {
703 [0] = {
704 .start = AT91_BASE_US3,
705 .end = AT91_BASE_US3 + SZ_16K - 1,
706 .flags = IORESOURCE_MEM,
707 },
708 [1] = {
709 .start = AT91_ID_US3,
710 .end = AT91_ID_US3,
711 .flags = IORESOURCE_IRQ,
712 },
713 };
714
715 static struct at91_uart_data uart3_data = {
716 .use_dma_tx = 1,
717 .use_dma_rx = 1,
718 };
719
720 static struct platform_device at91rm9200_uart3_device = {
721 .name = "at91_usart",
722 .id = 4,
723 .dev = {
724 .platform_data = &uart3_data,
725 .coherent_dma_mask = 0xffffffff,
726 },
727 .resource = uart3_resources,
728 .num_resources = ARRAY_SIZE(uart3_resources),
729 };
730
731 static inline void configure_usart3_pins(void)
732 {
733 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
734 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
735 }
736
737 struct platform_device *at91_uarts[AT91_NR_UART]; /* the UARTs to use */
738 struct platform_device *at91_default_console_device; /* the serial console device */
739
740 void __init at91_init_serial(struct at91_uart_config *config)
741 {
742 int i;
743
744 /* Fill in list of supported UARTs */
745 for (i = 0; i < config->nr_tty; i++) {
746 switch (config->tty_map[i]) {
747 case 0:
748 configure_usart0_pins();
749 at91_uarts[i] = &at91rm9200_uart0_device;
750 at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart");
751 break;
752 case 1:
753 configure_usart1_pins();
754 at91_uarts[i] = &at91rm9200_uart1_device;
755 at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart");
756 break;
757 case 2:
758 configure_usart2_pins();
759 at91_uarts[i] = &at91rm9200_uart2_device;
760 at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart");
761 break;
762 case 3:
763 configure_usart3_pins();
764 at91_uarts[i] = &at91rm9200_uart3_device;
765 at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart");
766 break;
767 case 4:
768 configure_dbgu_pins();
769 at91_uarts[i] = &at91rm9200_dbgu_device;
770 at91_clock_associate("mck", &at91rm9200_dbgu_device.dev, "usart");
771 break;
772 default:
773 continue;
774 }
775 at91_uarts[i]->id = i; /* update ID number to mapped ID */
776 }
777
778 /* Set serial console device */
779 if (config->console_tty < AT91_NR_UART)
780 at91_default_console_device = at91_uarts[config->console_tty];
781 if (!at91_default_console_device)
782 printk(KERN_INFO "AT91: No default serial console defined.\n");
783 }
784
785 void __init at91_add_device_serial(void)
786 {
787 int i;
788
789 for (i = 0; i < AT91_NR_UART; i++) {
790 if (at91_uarts[i])
791 platform_device_register(at91_uarts[i]);
792 }
793 }
794 #else
795 void __init at91_init_serial(struct at91_uart_config *config) {}
796 void __init at91_add_device_serial(void) {}
797 #endif
798
799
800 /* -------------------------------------------------------------------- */
801
802 /*
803 * These devices are always present and don't need any board-specific
804 * setup.
805 */
806 static int __init at91_add_standard_devices(void)
807 {
808 at91_add_device_rtc();
809 at91_add_device_watchdog();
810 return 0;
811 }
812
813 arch_initcall(at91_add_standard_devices);