arch/arm/mach-davinci/board-dm646x-evm.c

   1 /*
   2  * TI DaVinci DM646X EVM board
   3  *
   4  * Derived from: arch/arm/mach-davinci/board-evm.c
   5  * Copyright (C) 2006 Texas Instruments.
   6  *
   7  * (C) 2007-2008, MontaVista Software, Inc.
   8  *
   9  * This file is licensed under the terms of the GNU General Public License
  10  * version 2. This program is licensed "as is" without any warranty of any
  11  * kind, whether express or implied.
  12  *
  13  */
  14
  15 /**************************************************************************
  16  * Included Files
  17  **************************************************************************/
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/leds.h>
  22 #include <linux/gpio.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/i2c.h>
  25 #include <linux/platform_data/at24.h>
  26 #include <linux/platform_data/pcf857x.h>
  27
  28 #include <media/i2c/tvp514x.h>
  29 #include <media/i2c/adv7343.h>
  30
  31 #include <linux/mtd/mtd.h>
  32 #include <linux/mtd/rawnand.h>
  33 #include <linux/mtd/partitions.h>
  34 #include <linux/clk.h>
  35 #include <linux/export.h>
  36 #include <linux/platform_data/gpio-davinci.h>
  37 #include <linux/platform_data/i2c-davinci.h>
  38 #include <linux/platform_data/mtd-davinci.h>
  39 #include <linux/platform_data/mtd-davinci-aemif.h>
  40
  41 #include <asm/mach-types.h>
  42 #include <asm/mach/arch.h>
  43
  44 #include <mach/common.h>
  45 #include <mach/irqs.h>
  46 #include <mach/serial.h>
  47 #include <mach/clock.h>
  48
  49 #include "davinci.h"
  50 #include "clock.h"
  51
  52 #define NAND_BLOCK_SIZE         SZ_128K
  53
  54 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
  55  * and U-Boot environment this avoids dependency on any particular combination
  56  * of UBL, U-Boot or flashing tools etc.
  57  */
  58 static struct mtd_partition davinci_nand_partitions[] = {
  59         {
  60                 /* UBL, U-Boot with environment */
  61                 .name           = "bootloader",
  62                 .offset         = MTDPART_OFS_APPEND,
  63                 .size           = 16 * NAND_BLOCK_SIZE,
  64                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
  65         }, {
  66                 .name           = "kernel",
  67                 .offset         = MTDPART_OFS_APPEND,
  68                 .size           = SZ_4M,
  69                 .mask_flags     = 0,
  70         }, {
  71                 .name           = "filesystem",
  72                 .offset         = MTDPART_OFS_APPEND,
  73                 .size           = MTDPART_SIZ_FULL,
  74                 .mask_flags     = 0,
  75         }
  76 };
  77
  78 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
  79         .wsetup         = 29,
  80         .wstrobe        = 24,
  81         .whold          = 14,
  82         .rsetup         = 19,
  83         .rstrobe        = 33,
  84         .rhold          = 0,
  85         .ta             = 29,
  86 };
  87
  88 static struct davinci_nand_pdata davinci_nand_data = {
  89         .mask_cle               = 0x80000,
  90         .mask_ale               = 0x40000,
  91         .parts                  = davinci_nand_partitions,
  92         .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
  93         .ecc_mode               = NAND_ECC_HW,
  94         .ecc_bits               = 1,
  95         .options                = 0,
  96 };
  97
  98 static struct resource davinci_nand_resources[] = {
  99         {
 100                 .start          = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
 101                 .end            = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
 102                 .flags          = IORESOURCE_MEM,
 103         }, {
 104                 .start          = DM646X_ASYNC_EMIF_CONTROL_BASE,
 105                 .end            = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 106                 .flags          = IORESOURCE_MEM,
 107         },
 108 };
 109
 110 static struct platform_device davinci_nand_device = {
 111         .name                   = "davinci_nand",
 112         .id                     = 0,
 113
 114         .num_resources          = ARRAY_SIZE(davinci_nand_resources),
 115         .resource               = davinci_nand_resources,
 116
 117         .dev                    = {
 118                 .platform_data  = &davinci_nand_data,
 119         },
 120 };
 121
 122 #define HAS_ATA         (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
 123                          IS_ENABLED(CONFIG_PATA_BK3710))
 124
 125 #ifdef CONFIG_I2C
 126 /* CPLD Register 0 bits to control ATA */
 127 #define DM646X_EVM_ATA_RST              BIT(0)
 128 #define DM646X_EVM_ATA_PWD              BIT(1)
 129
 130 /* CPLD Register 0 Client: used for I/O Control */
 131 static int cpld_reg0_probe(struct i2c_client *client,
 132                            const struct i2c_device_id *id)
 133 {
 134         if (HAS_ATA) {
 135                 u8 data;
 136                 struct i2c_msg msg[2] = {
 137                         {
 138                                 .addr = client->addr,
 139                                 .flags = I2C_M_RD,
 140                                 .len = 1,
 141                                 .buf = &data,
 142                         },
 143                         {
 144                                 .addr = client->addr,
 145                                 .flags = 0,
 146                                 .len = 1,
 147                                 .buf = &data,
 148                         },
 149                 };
 150
 151                 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
 152                 i2c_transfer(client->adapter, msg, 1);
 153                 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
 154                 i2c_transfer(client->adapter, msg + 1, 1);
 155         }
 156
 157         return 0;
 158 }
 159
 160 static const struct i2c_device_id cpld_reg_ids[] = {
 161         { "cpld_reg0", 0, },
 162         { },
 163 };
 164
 165 static struct i2c_driver dm6467evm_cpld_driver = {
 166         .driver.name    = "cpld_reg0",
 167         .id_table       = cpld_reg_ids,
 168         .probe          = cpld_reg0_probe,
 169 };
 170
 171 /* LEDS */
 172
 173 static struct gpio_led evm_leds[] = {
 174         { .name = "DS1", .active_low = 1, },
 175         { .name = "DS2", .active_low = 1, },
 176         { .name = "DS3", .active_low = 1, },
 177         { .name = "DS4", .active_low = 1, },
 178 };
 179
 180 static const struct gpio_led_platform_data evm_led_data = {
 181         .num_leds = ARRAY_SIZE(evm_leds),
 182         .leds     = evm_leds,
 183 };
 184
 185 static struct platform_device *evm_led_dev;
 186
 187 static int evm_led_setup(struct i2c_client *client, int gpio,
 188                         unsigned int ngpio, void *c)
 189 {
 190         struct gpio_led *leds = evm_leds;
 191         int status;
 192
 193         while (ngpio--) {
 194                 leds->gpio = gpio++;
 195                 leds++;
 196         }
 197
 198         evm_led_dev = platform_device_alloc("leds-gpio", 0);
 199         platform_device_add_data(evm_led_dev, &evm_led_data,
 200                                 sizeof(evm_led_data));
 201
 202         evm_led_dev->dev.parent = &client->dev;
 203         status = platform_device_add(evm_led_dev);
 204         if (status < 0) {
 205                 platform_device_put(evm_led_dev);
 206                 evm_led_dev = NULL;
 207         }
 208         return status;
 209 }
 210
 211 static int evm_led_teardown(struct i2c_client *client, int gpio,
 212                                 unsigned ngpio, void *c)
 213 {
 214         if (evm_led_dev) {
 215                 platform_device_unregister(evm_led_dev);
 216                 evm_led_dev = NULL;
 217         }
 218         return 0;
 219 }
 220
 221 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
 222
 223 static int evm_sw_setup(struct i2c_client *client, int gpio,
 224                         unsigned ngpio, void *c)
 225 {
 226         int status;
 227         int i;
 228         char label[10];
 229
 230         for (i = 0; i < 4; ++i) {
 231                 snprintf(label, 10, "user_sw%d", i);
 232                 status = gpio_request(gpio, label);
 233                 if (status)
 234                         goto out_free;
 235                 evm_sw_gpio[i] = gpio++;
 236
 237                 status = gpio_direction_input(evm_sw_gpio[i]);
 238                 if (status) {
 239                         gpio_free(evm_sw_gpio[i]);
 240                         evm_sw_gpio[i] = -EINVAL;
 241                         goto out_free;
 242                 }
 243
 244                 status = gpio_export(evm_sw_gpio[i], 0);
 245                 if (status) {
 246                         gpio_free(evm_sw_gpio[i]);
 247                         evm_sw_gpio[i] = -EINVAL;
 248                         goto out_free;
 249                 }
 250         }
 251         return status;
 252 out_free:
 253         for (i = 0; i < 4; ++i) {
 254                 if (evm_sw_gpio[i] != -EINVAL) {
 255                         gpio_free(evm_sw_gpio[i]);
 256                         evm_sw_gpio[i] = -EINVAL;
 257                 }
 258         }
 259         return status;
 260 }
 261
 262 static int evm_sw_teardown(struct i2c_client *client, int gpio,
 263                         unsigned ngpio, void *c)
 264 {
 265         int i;
 266
 267         for (i = 0; i < 4; ++i) {
 268                 if (evm_sw_gpio[i] != -EINVAL) {
 269                         gpio_unexport(evm_sw_gpio[i]);
 270                         gpio_free(evm_sw_gpio[i]);
 271                         evm_sw_gpio[i] = -EINVAL;
 272                 }
 273         }
 274         return 0;
 275 }
 276
 277 static int evm_pcf_setup(struct i2c_client *client, int gpio,
 278                         unsigned int ngpio, void *c)
 279 {
 280         int status;
 281
 282         if (ngpio < 8)
 283                 return -EINVAL;
 284
 285         status = evm_sw_setup(client, gpio, 4, c);
 286         if (status)
 287                 return status;
 288
 289         return evm_led_setup(client, gpio+4, 4, c);
 290 }
 291
 292 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
 293                         unsigned int ngpio, void *c)
 294 {
 295         BUG_ON(ngpio < 8);
 296
 297         evm_sw_teardown(client, gpio, 4, c);
 298         evm_led_teardown(client, gpio+4, 4, c);
 299
 300         return 0;
 301 }
 302
 303 static struct pcf857x_platform_data pcf_data = {
 304         .gpio_base      = DAVINCI_N_GPIO+1,
 305         .setup          = evm_pcf_setup,
 306         .teardown       = evm_pcf_teardown,
 307 };
 308
 309 /* Most of this EEPROM is unused, but U-Boot uses some data:
 310  *  - 0x7f00, 6 bytes Ethernet Address
 311  *  - ... newer boards may have more
 312  */
 313
 314 static struct at24_platform_data eeprom_info = {
 315         .byte_len       = (256*1024) / 8,
 316         .page_size      = 64,
 317         .flags          = AT24_FLAG_ADDR16,
 318         .setup          = davinci_get_mac_addr,
 319         .context        = (void *)0x7f00,
 320 };
 321 #endif
 322
 323 static u8 dm646x_iis_serializer_direction[] = {
 324        TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
 325 };
 326
 327 static u8 dm646x_dit_serializer_direction[] = {
 328        TX_MODE,
 329 };
 330
 331 static struct snd_platform_data dm646x_evm_snd_data[] = {
 332         {
 333                 .tx_dma_offset  = 0x400,
 334                 .rx_dma_offset  = 0x400,
 335                 .op_mode        = DAVINCI_MCASP_IIS_MODE,
 336                 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
 337                 .tdm_slots      = 2,
 338                 .serial_dir     = dm646x_iis_serializer_direction,
 339                 .asp_chan_q     = EVENTQ_0,
 340         },
 341         {
 342                 .tx_dma_offset  = 0x400,
 343                 .rx_dma_offset  = 0,
 344                 .op_mode        = DAVINCI_MCASP_DIT_MODE,
 345                 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
 346                 .tdm_slots      = 32,
 347                 .serial_dir     = dm646x_dit_serializer_direction,
 348                 .asp_chan_q     = EVENTQ_0,
 349         },
 350 };
 351
 352 #ifdef CONFIG_I2C
 353 static struct i2c_client *cpld_client;
 354
 355 static int cpld_video_probe(struct i2c_client *client,
 356                         const struct i2c_device_id *id)
 357 {
 358         cpld_client = client;
 359         return 0;
 360 }
 361
 362 static int cpld_video_remove(struct i2c_client *client)
 363 {
 364         cpld_client = NULL;
 365         return 0;
 366 }
 367
 368 static const struct i2c_device_id cpld_video_id[] = {
 369         { "cpld_video", 0 },
 370         { }
 371 };
 372
 373 static struct i2c_driver cpld_video_driver = {
 374         .driver = {
 375                 .name   = "cpld_video",
 376         },
 377         .probe          = cpld_video_probe,
 378         .remove         = cpld_video_remove,
 379         .id_table       = cpld_video_id,
 380 };
 381
 382 static void evm_init_cpld(void)
 383 {
 384         i2c_add_driver(&cpld_video_driver);
 385 }
 386
 387 static struct i2c_board_info __initdata i2c_info[] =  {
 388         {
 389                 I2C_BOARD_INFO("24c256", 0x50),
 390                 .platform_data  = &eeprom_info,
 391         },
 392         {
 393                 I2C_BOARD_INFO("pcf8574a", 0x38),
 394                 .platform_data  = &pcf_data,
 395         },
 396         {
 397                 I2C_BOARD_INFO("cpld_reg0", 0x3a),
 398         },
 399         {
 400                 I2C_BOARD_INFO("tlv320aic33", 0x18),
 401         },
 402         {
 403                 I2C_BOARD_INFO("cpld_video", 0x3b),
 404         },
 405 };
 406
 407 static struct davinci_i2c_platform_data i2c_pdata = {
 408         .bus_freq       = 100 /* kHz */,
 409         .bus_delay      = 0 /* usec */,
 410 };
 411
 412 #define VCH2CLK_MASK            (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
 413 #define VCH2CLK_SYSCLK8         (BIT(9))
 414 #define VCH2CLK_AUXCLK          (BIT(9) | BIT(8))
 415 #define VCH3CLK_MASK            (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
 416 #define VCH3CLK_SYSCLK8         (BIT(13))
 417 #define VCH3CLK_AUXCLK          (BIT(14) | BIT(13))
 418
 419 #define VIDCH2CLK               (BIT(10))
 420 #define VIDCH3CLK               (BIT(11))
 421 #define VIDCH1CLK               (BIT(4))
 422 #define TVP7002_INPUT           (BIT(4))
 423 #define TVP5147_INPUT           (~BIT(4))
 424 #define VPIF_INPUT_ONE_CHANNEL  (BIT(5))
 425 #define VPIF_INPUT_TWO_CHANNEL  (~BIT(5))
 426 #define TVP5147_CH0             "tvp514x-0"
 427 #define TVP5147_CH1             "tvp514x-1"
 428
 429 /* spin lock for updating above registers */
 430 static spinlock_t vpif_reg_lock;
 431
 432 static int set_vpif_clock(int mux_mode, int hd)
 433 {
 434         unsigned long flags;
 435         unsigned int value;
 436         int val = 0;
 437         int err = 0;
 438
 439         if (!cpld_client)
 440                 return -ENXIO;
 441
 442         /* disable the clock */
 443         spin_lock_irqsave(&vpif_reg_lock, flags);
 444         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 445         value |= (VIDCH3CLK | VIDCH2CLK);
 446         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 447         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 448
 449         val = i2c_smbus_read_byte(cpld_client);
 450         if (val < 0)
 451                 return val;
 452
 453         if (mux_mode == 1)
 454                 val &= ~0x40;
 455         else
 456                 val |= 0x40;
 457
 458         err = i2c_smbus_write_byte(cpld_client, val);
 459         if (err)
 460                 return err;
 461
 462         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 463         value &= ~(VCH2CLK_MASK);
 464         value &= ~(VCH3CLK_MASK);
 465
 466         if (hd >= 1)
 467                 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
 468         else
 469                 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
 470
 471         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 472
 473         spin_lock_irqsave(&vpif_reg_lock, flags);
 474         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 475         /* enable the clock */
 476         value &= ~(VIDCH3CLK | VIDCH2CLK);
 477         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 478         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 479
 480         return 0;
 481 }
 482
 483 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
 484         {
 485                 .name   = "adv7343",
 486                 .board_info = {
 487                         I2C_BOARD_INFO("adv7343", 0x2a),
 488                 },
 489         },
 490         {
 491                 .name   = "ths7303",
 492                 .board_info = {
 493                         I2C_BOARD_INFO("ths7303", 0x2c),
 494                 },
 495         },
 496 };
 497
 498 static const struct vpif_output dm6467_ch0_outputs[] = {
 499         {
 500                 .output = {
 501                         .index = 0,
 502                         .name = "Composite",
 503                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 504                         .capabilities = V4L2_OUT_CAP_STD,
 505                         .std = V4L2_STD_ALL,
 506                 },
 507                 .subdev_name = "adv7343",
 508                 .output_route = ADV7343_COMPOSITE_ID,
 509         },
 510         {
 511                 .output = {
 512                         .index = 1,
 513                         .name = "Component",
 514                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 515                         .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
 516                 },
 517                 .subdev_name = "adv7343",
 518                 .output_route = ADV7343_COMPONENT_ID,
 519         },
 520         {
 521                 .output = {
 522                         .index = 2,
 523                         .name = "S-Video",
 524                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 525                         .capabilities = V4L2_OUT_CAP_STD,
 526                         .std = V4L2_STD_ALL,
 527                 },
 528                 .subdev_name = "adv7343",
 529                 .output_route = ADV7343_SVIDEO_ID,
 530         },
 531 };
 532
 533 static struct vpif_display_config dm646x_vpif_display_config = {
 534         .set_clock      = set_vpif_clock,
 535         .subdevinfo     = dm646x_vpif_subdev,
 536         .subdev_count   = ARRAY_SIZE(dm646x_vpif_subdev),
 537         .chan_config[0] = {
 538                 .outputs = dm6467_ch0_outputs,
 539                 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
 540         },
 541         .card_name      = "DM646x EVM",
 542 };
 543
 544 /**
 545  * setup_vpif_input_path()
 546  * @channel: channel id (0 - CH0, 1 - CH1)
 547  * @sub_dev_name: ptr sub device name
 548  *
 549  * This will set vpif input to capture data from tvp514x or
 550  * tvp7002.
 551  */
 552 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
 553 {
 554         int err = 0;
 555         int val;
 556
 557         /* for channel 1, we don't do anything */
 558         if (channel != 0)
 559                 return 0;
 560
 561         if (!cpld_client)
 562                 return -ENXIO;
 563
 564         val = i2c_smbus_read_byte(cpld_client);
 565         if (val < 0)
 566                 return val;
 567
 568         if (!strcmp(sub_dev_name, TVP5147_CH0) ||
 569             !strcmp(sub_dev_name, TVP5147_CH1))
 570                 val &= TVP5147_INPUT;
 571         else
 572                 val |= TVP7002_INPUT;
 573
 574         err = i2c_smbus_write_byte(cpld_client, val);
 575         if (err)
 576                 return err;
 577         return 0;
 578 }
 579
 580 /**
 581  * setup_vpif_input_channel_mode()
 582  * @mux_mode:  mux mode. 0 - 1 channel or (1) - 2 channel
 583  *
 584  * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
 585  */
 586 static int setup_vpif_input_channel_mode(int mux_mode)
 587 {
 588         unsigned long flags;
 589         int err = 0;
 590         int val;
 591         u32 value;
 592
 593         if (!cpld_client)
 594                 return -ENXIO;
 595
 596         val = i2c_smbus_read_byte(cpld_client);
 597         if (val < 0)
 598                 return val;
 599
 600         spin_lock_irqsave(&vpif_reg_lock, flags);
 601         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 602         if (mux_mode) {
 603                 val &= VPIF_INPUT_TWO_CHANNEL;
 604                 value |= VIDCH1CLK;
 605         } else {
 606                 val |= VPIF_INPUT_ONE_CHANNEL;
 607                 value &= ~VIDCH1CLK;
 608         }
 609         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 610         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 611
 612         err = i2c_smbus_write_byte(cpld_client, val);
 613         if (err)
 614                 return err;
 615
 616         return 0;
 617 }
 618
 619 static struct tvp514x_platform_data tvp5146_pdata = {
 620         .clk_polarity = 0,
 621         .hs_polarity = 1,
 622         .vs_polarity = 1
 623 };
 624
 625 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 626
 627 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
 628         {
 629                 .name   = TVP5147_CH0,
 630                 .board_info = {
 631                         I2C_BOARD_INFO("tvp5146", 0x5d),
 632                         .platform_data = &tvp5146_pdata,
 633                 },
 634         },
 635         {
 636                 .name   = TVP5147_CH1,
 637                 .board_info = {
 638                         I2C_BOARD_INFO("tvp5146", 0x5c),
 639                         .platform_data = &tvp5146_pdata,
 640                 },
 641         },
 642 };
 643
 644 static struct vpif_input dm6467_ch0_inputs[] = {
 645         {
 646                 .input = {
 647                         .index = 0,
 648                         .name = "Composite",
 649                         .type = V4L2_INPUT_TYPE_CAMERA,
 650                         .capabilities = V4L2_IN_CAP_STD,
 651                         .std = TVP514X_STD_ALL,
 652                 },
 653                 .subdev_name = TVP5147_CH0,
 654                 .input_route = INPUT_CVBS_VI2B,
 655                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 656         },
 657 };
 658
 659 static struct vpif_input dm6467_ch1_inputs[] = {
 660        {
 661                 .input = {
 662                         .index = 0,
 663                         .name = "S-Video",
 664                         .type = V4L2_INPUT_TYPE_CAMERA,
 665                         .capabilities = V4L2_IN_CAP_STD,
 666                         .std = TVP514X_STD_ALL,
 667                 },
 668                 .subdev_name = TVP5147_CH1,
 669                 .input_route = INPUT_SVIDEO_VI2C_VI1C,
 670                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 671         },
 672 };
 673
 674 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
 675         .setup_input_path = setup_vpif_input_path,
 676         .setup_input_channel_mode = setup_vpif_input_channel_mode,
 677         .subdev_info = vpif_capture_sdev_info,
 678         .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
 679         .chan_config[0] = {
 680                 .inputs = dm6467_ch0_inputs,
 681                 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
 682                 .vpif_if = {
 683                         .if_type = VPIF_IF_BT656,
 684                         .hd_pol = 1,
 685                         .vd_pol = 1,
 686                         .fid_pol = 0,
 687                 },
 688         },
 689         .chan_config[1] = {
 690                 .inputs = dm6467_ch1_inputs,
 691                 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
 692                 .vpif_if = {
 693                         .if_type = VPIF_IF_BT656,
 694                         .hd_pol = 1,
 695                         .vd_pol = 1,
 696                         .fid_pol = 0,
 697                 },
 698         },
 699 };
 700
 701 static void __init evm_init_video(void)
 702 {
 703         spin_lock_init(&vpif_reg_lock);
 704
 705         dm646x_setup_vpif(&dm646x_vpif_display_config,
 706                           &dm646x_vpif_capture_cfg);
 707 }
 708
 709 static void __init evm_init_i2c(void)
 710 {
 711         davinci_init_i2c(&i2c_pdata);
 712         i2c_add_driver(&dm6467evm_cpld_driver);
 713         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 714         evm_init_cpld();
 715         evm_init_video();
 716 }
 717 #endif
 718
 719 #define DM6467T_EVM_REF_FREQ            33000000
 720
 721 static void __init davinci_map_io(void)
 722 {
 723         dm646x_init();
 724
 725         if (machine_is_davinci_dm6467tevm())
 726                 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
 727 }
 728
 729 #define DM646X_EVM_PHY_ID               "davinci_mdio-0:01"
 730 /*
 731  * The following EDMA channels/slots are not being used by drivers (for
 732  * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
 733  * reserved for codecs on the DSP side.
 734  */
 735 static const s16 dm646x_dma_rsv_chans[][2] = {
 736         /* (offset, number) */
 737         { 0,  4},
 738         {13,  3},
 739         {24,  4},
 740         {30,  2},
 741         {54,  3},
 742         {-1, -1}
 743 };
 744
 745 static const s16 dm646x_dma_rsv_slots[][2] = {
 746         /* (offset, number) */
 747         { 0,  4},
 748         {13,  3},
 749         {24,  4},
 750         {30,  2},
 751         {54,  3},
 752         {128, 384},
 753         {-1, -1}
 754 };
 755
 756 static struct edma_rsv_info dm646x_edma_rsv[] = {
 757         {
 758                 .rsv_chans      = dm646x_dma_rsv_chans,
 759                 .rsv_slots      = dm646x_dma_rsv_slots,
 760         },
 761 };
 762
 763 static __init void evm_init(void)
 764 {
 765         int ret;
 766         struct davinci_soc_info *soc_info = &davinci_soc_info;
 767
 768         ret = dm646x_gpio_register();
 769         if (ret)
 770                 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
 771
 772 #ifdef CONFIG_I2C
 773         evm_init_i2c();
 774 #endif
 775
 776         davinci_serial_init(dm646x_serial_device);
 777         dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
 778         dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
 779
 780         if (machine_is_davinci_dm6467tevm())
 781                 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
 782
 783         platform_device_register(&davinci_nand_device);
 784
 785         if (davinci_aemif_setup(&davinci_nand_device))
 786                 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
 787
 788         dm646x_init_edma(dm646x_edma_rsv);
 789
 790         if (HAS_ATA)
 791                 davinci_init_ide();
 792
 793         soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
 794 }
 795
 796 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
 797         .atag_offset  = 0x100,
 798         .map_io       = davinci_map_io,
 799         .init_irq     = davinci_irq_init,
 800         .init_time      = davinci_timer_init,
 801         .init_machine = evm_init,
 802         .init_late      = davinci_init_late,
 803         .dma_zone_size  = SZ_128M,
 804         .restart        = davinci_restart,
 805 MACHINE_END
 806
 807 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
 808         .atag_offset  = 0x100,
 809         .map_io       = davinci_map_io,
 810         .init_irq     = davinci_irq_init,
 811         .init_time      = davinci_timer_init,
 812         .init_machine = evm_init,
 813         .init_late      = davinci_init_late,
 814         .dma_zone_size  = SZ_128M,
 815         .restart        = davinci_restart,
 816 MACHINE_END
 817