arch/arm/mach-davinci/include/mach/hardware.h

   1 /*
   2  * Common hardware definitions
   3  *
   4  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
   5  *
   6  * 2007 (c) MontaVista Software, Inc. This file is licensed under
   7  * the terms of the GNU General Public License version 2. This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11 #ifndef __ASM_ARCH_HARDWARE_H
  12 #define __ASM_ARCH_HARDWARE_H
  13
  14 /*
  15  * Base register addresses
  16  */
  17 #define DAVINCI_DMA_3PCC_BASE                   (0x01C00000)
  18 #define DAVINCI_DMA_3PTC0_BASE                  (0x01C10000)
  19 #define DAVINCI_DMA_3PTC1_BASE                  (0x01C10400)
  20 #define DAVINCI_I2C_BASE                        (0x01C21000)
  21 #define DAVINCI_PWM0_BASE                       (0x01C22000)
  22 #define DAVINCI_PWM1_BASE                       (0x01C22400)
  23 #define DAVINCI_PWM2_BASE                       (0x01C22800)
  24 #define DAVINCI_SYSTEM_MODULE_BASE              (0x01C40000)
  25 #define DAVINCI_PLL_CNTRL0_BASE                 (0x01C40800)
  26 #define DAVINCI_PLL_CNTRL1_BASE                 (0x01C40C00)
  27 #define DAVINCI_PWR_SLEEP_CNTRL_BASE            (0x01C41000)
  28 #define DAVINCI_SYSTEM_DFT_BASE                 (0x01C42000)
  29 #define DAVINCI_IEEE1394_BASE                   (0x01C60000)
  30 #define DAVINCI_USB_OTG_BASE                    (0x01C64000)
  31 #define DAVINCI_CFC_ATA_BASE                    (0x01C66000)
  32 #define DAVINCI_SPI_BASE                        (0x01C66800)
  33 #define DAVINCI_GPIO_BASE                       (0x01C67000)
  34 #define DAVINCI_UHPI_BASE                       (0x01C67800)
  35 #define DAVINCI_VPSS_REGS_BASE                  (0x01C70000)
  36 #define DAVINCI_EMAC_CNTRL_REGS_BASE            (0x01C80000)
  37 #define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE    (0x01C81000)
  38 #define DAVINCI_EMAC_WRAPPER_RAM_BASE           (0x01C82000)
  39 #define DAVINCI_MDIO_CNTRL_REGS_BASE            (0x01C84000)
  40 #define DAVINCI_IMCOP_BASE                      (0x01CC0000)
  41 #define DAVINCI_ASYNC_EMIF_CNTRL_BASE           (0x01E00000)
  42 #define DAVINCI_VLYNQ_BASE                      (0x01E01000)
  43 #define DAVINCI_MCBSP_BASE                      (0x01E02000)
  44 #define DAVINCI_MMC_SD_BASE                     (0x01E10000)
  45 #define DAVINCI_MS_BASE                         (0x01E20000)
  46 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE        (0x02000000)
  47 #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE        (0x04000000)
  48 #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE        (0x06000000)
  49 #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE        (0x08000000)
  50 #define DAVINCI_VLYNQ_REMOTE_BASE               (0x0C000000)
  51
  52 #endif /* __ASM_ARCH_HARDWARE_H */