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Merge branch 'cleanup/io-pci' into next/cleanups
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1 /*
2 * arch/arm/mach-dove/common.c
3 *
4 * Core functions for Marvell Dove 88AP510 System On Chip
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/pci.h>
16 #include <linux/clk-provider.h>
17 #include <linux/ata_platform.h>
18 #include <linux/gpio.h>
19 #include <asm/page.h>
20 #include <asm/setup.h>
21 #include <asm/timex.h>
22 #include <asm/hardware/cache-tauros2.h>
23 #include <asm/mach/map.h>
24 #include <asm/mach/time.h>
25 #include <asm/mach/pci.h>
26 #include <mach/dove.h>
27 #include <mach/bridge-regs.h>
28 #include <asm/mach/arch.h>
29 #include <linux/irq.h>
30 #include <plat/time.h>
31 #include <plat/ehci-orion.h>
32 #include <plat/common.h>
33 #include <plat/addr-map.h>
34 #include "common.h"
35
36 static int get_tclk(void);
37
38 /*****************************************************************************
39 * I/O Address Mapping
40 ****************************************************************************/
41 static struct map_desc dove_io_desc[] __initdata = {
42 {
43 .virtual = DOVE_SB_REGS_VIRT_BASE,
44 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
45 .length = DOVE_SB_REGS_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = DOVE_NB_REGS_VIRT_BASE,
49 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
50 .length = DOVE_NB_REGS_SIZE,
51 .type = MT_DEVICE,
52 },
53 };
54
55 void __init dove_map_io(void)
56 {
57 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
58 }
59
60 /*****************************************************************************
61 * CLK tree
62 ****************************************************************************/
63 static struct clk *tclk;
64
65 static void __init clk_init(void)
66 {
67 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
68 get_tclk());
69
70 orion_clkdev_init(tclk);
71 }
72
73 /*****************************************************************************
74 * EHCI0
75 ****************************************************************************/
76 void __init dove_ehci0_init(void)
77 {
78 orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
79 }
80
81 /*****************************************************************************
82 * EHCI1
83 ****************************************************************************/
84 void __init dove_ehci1_init(void)
85 {
86 orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
87 }
88
89 /*****************************************************************************
90 * GE00
91 ****************************************************************************/
92 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
93 {
94 orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
95 IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);
96 }
97
98 /*****************************************************************************
99 * SoC RTC
100 ****************************************************************************/
101 void __init dove_rtc_init(void)
102 {
103 orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
104 }
105
106 /*****************************************************************************
107 * SATA
108 ****************************************************************************/
109 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
110 {
111 orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
112
113 }
114
115 /*****************************************************************************
116 * UART0
117 ****************************************************************************/
118 void __init dove_uart0_init(void)
119 {
120 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
121 IRQ_DOVE_UART_0, tclk);
122 }
123
124 /*****************************************************************************
125 * UART1
126 ****************************************************************************/
127 void __init dove_uart1_init(void)
128 {
129 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
130 IRQ_DOVE_UART_1, tclk);
131 }
132
133 /*****************************************************************************
134 * UART2
135 ****************************************************************************/
136 void __init dove_uart2_init(void)
137 {
138 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
139 IRQ_DOVE_UART_2, tclk);
140 }
141
142 /*****************************************************************************
143 * UART3
144 ****************************************************************************/
145 void __init dove_uart3_init(void)
146 {
147 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
148 IRQ_DOVE_UART_3, tclk);
149 }
150
151 /*****************************************************************************
152 * SPI
153 ****************************************************************************/
154 void __init dove_spi0_init(void)
155 {
156 orion_spi_init(DOVE_SPI0_PHYS_BASE);
157 }
158
159 void __init dove_spi1_init(void)
160 {
161 orion_spi_1_init(DOVE_SPI1_PHYS_BASE);
162 }
163
164 /*****************************************************************************
165 * I2C
166 ****************************************************************************/
167 void __init dove_i2c_init(void)
168 {
169 orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
170 }
171
172 /*****************************************************************************
173 * Time handling
174 ****************************************************************************/
175 void __init dove_init_early(void)
176 {
177 orion_time_set_base(TIMER_VIRT_BASE);
178 }
179
180 static int get_tclk(void)
181 {
182 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
183 return 166666667;
184 }
185
186 static void __init dove_timer_init(void)
187 {
188 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
189 IRQ_DOVE_BRIDGE, get_tclk());
190 }
191
192 struct sys_timer dove_timer = {
193 .init = dove_timer_init,
194 };
195
196 /*****************************************************************************
197 * XOR 0
198 ****************************************************************************/
199 void __init dove_xor0_init(void)
200 {
201 orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
202 IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
203 }
204
205 /*****************************************************************************
206 * XOR 1
207 ****************************************************************************/
208 void __init dove_xor1_init(void)
209 {
210 orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
211 IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
212 }
213
214 /*****************************************************************************
215 * SDIO
216 ****************************************************************************/
217 static u64 sdio_dmamask = DMA_BIT_MASK(32);
218
219 static struct resource dove_sdio0_resources[] = {
220 {
221 .start = DOVE_SDIO0_PHYS_BASE,
222 .end = DOVE_SDIO0_PHYS_BASE + 0xff,
223 .flags = IORESOURCE_MEM,
224 }, {
225 .start = IRQ_DOVE_SDIO0,
226 .end = IRQ_DOVE_SDIO0,
227 .flags = IORESOURCE_IRQ,
228 },
229 };
230
231 static struct platform_device dove_sdio0 = {
232 .name = "sdhci-dove",
233 .id = 0,
234 .dev = {
235 .dma_mask = &sdio_dmamask,
236 .coherent_dma_mask = DMA_BIT_MASK(32),
237 },
238 .resource = dove_sdio0_resources,
239 .num_resources = ARRAY_SIZE(dove_sdio0_resources),
240 };
241
242 void __init dove_sdio0_init(void)
243 {
244 platform_device_register(&dove_sdio0);
245 }
246
247 static struct resource dove_sdio1_resources[] = {
248 {
249 .start = DOVE_SDIO1_PHYS_BASE,
250 .end = DOVE_SDIO1_PHYS_BASE + 0xff,
251 .flags = IORESOURCE_MEM,
252 }, {
253 .start = IRQ_DOVE_SDIO1,
254 .end = IRQ_DOVE_SDIO1,
255 .flags = IORESOURCE_IRQ,
256 },
257 };
258
259 static struct platform_device dove_sdio1 = {
260 .name = "sdhci-dove",
261 .id = 1,
262 .dev = {
263 .dma_mask = &sdio_dmamask,
264 .coherent_dma_mask = DMA_BIT_MASK(32),
265 },
266 .resource = dove_sdio1_resources,
267 .num_resources = ARRAY_SIZE(dove_sdio1_resources),
268 };
269
270 void __init dove_sdio1_init(void)
271 {
272 platform_device_register(&dove_sdio1);
273 }
274
275 void __init dove_init(void)
276 {
277 printk(KERN_INFO "Dove 88AP510 SoC, ");
278 printk(KERN_INFO "TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000);
279
280 #ifdef CONFIG_CACHE_TAUROS2
281 tauros2_init();
282 #endif
283 dove_setup_cpu_mbus();
284
285 /* Setup root of clk tree */
286 clk_init();
287
288 /* internal devices that every board has */
289 dove_rtc_init();
290 dove_xor0_init();
291 dove_xor1_init();
292 }
293
294 void dove_restart(char mode, const char *cmd)
295 {
296 /*
297 * Enable soft reset to assert RSTOUTn.
298 */
299 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
300
301 /*
302 * Assert soft reset.
303 */
304 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
305
306 while (1)
307 ;
308 }