arch/arm/mach-dove/common.c

   1 /*
   2  * arch/arm/mach-dove/common.c
   3  *
   4  * Core functions for Marvell Dove 88AP510 System On Chip
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/delay.h>
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/pci.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/ata_platform.h>
  18 #include <linux/gpio.h>
  19 #include <linux/of.h>
  20 #include <linux/of_platform.h>
  21 #include <asm/page.h>
  22 #include <asm/setup.h>
  23 #include <asm/timex.h>
  24 #include <asm/hardware/cache-tauros2.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <asm/mach/pci.h>
  28 #include <mach/dove.h>
  29 #include <mach/pm.h>
  30 #include <mach/bridge-regs.h>
  31 #include <asm/mach/arch.h>
  32 #include <linux/irq.h>
  33 #include <plat/time.h>
  34 #include <linux/platform_data/usb-ehci-orion.h>
  35 #include <plat/irq.h>
  36 #include <plat/common.h>
  37 #include <plat/addr-map.h>
  38 #include "common.h"
  39
  40 /*****************************************************************************
  41  * I/O Address Mapping
  42  ****************************************************************************/
  43 static struct map_desc dove_io_desc[] __initdata = {
  44         {
  45                 .virtual        = (unsigned long) DOVE_SB_REGS_VIRT_BASE,
  46                 .pfn            = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
  47                 .length         = DOVE_SB_REGS_SIZE,
  48                 .type           = MT_DEVICE,
  49         }, {
  50                 .virtual        = (unsigned long) DOVE_NB_REGS_VIRT_BASE,
  51                 .pfn            = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
  52                 .length         = DOVE_NB_REGS_SIZE,
  53                 .type           = MT_DEVICE,
  54         },
  55 };
  56
  57 void __init dove_map_io(void)
  58 {
  59         iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
  60 }
  61
  62 /*****************************************************************************
  63  * CLK tree
  64  ****************************************************************************/
  65 static int dove_tclk;
  66
  67 static DEFINE_SPINLOCK(gating_lock);
  68 static struct clk *tclk;
  69
  70 static struct clk __init *dove_register_gate(const char *name,
  71                                              const char *parent, u8 bit_idx)
  72 {
  73         return clk_register_gate(NULL, name, parent, 0,
  74                                  (void __iomem *)CLOCK_GATING_CONTROL,
  75                                  bit_idx, 0, &gating_lock);
  76 }
  77
  78 static void __init dove_clk_init(void)
  79 {
  80         struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
  81         struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
  82         struct clk *xor0, *xor1, *ge, *gephy;
  83
  84         tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
  85                                        dove_tclk);
  86
  87         usb0 = dove_register_gate("usb0", "tclk", CLOCK_GATING_BIT_USB0);
  88         usb1 = dove_register_gate("usb1", "tclk", CLOCK_GATING_BIT_USB1);
  89         sata = dove_register_gate("sata", "tclk", CLOCK_GATING_BIT_SATA);
  90         pex0 = dove_register_gate("pex0", "tclk", CLOCK_GATING_BIT_PCIE0);
  91         pex1 = dove_register_gate("pex1", "tclk", CLOCK_GATING_BIT_PCIE1);
  92         sdio0 = dove_register_gate("sdio0", "tclk", CLOCK_GATING_BIT_SDIO0);
  93         sdio1 = dove_register_gate("sdio1", "tclk", CLOCK_GATING_BIT_SDIO1);
  94         nand = dove_register_gate("nand", "tclk", CLOCK_GATING_BIT_NAND);
  95         camera = dove_register_gate("camera", "tclk", CLOCK_GATING_BIT_CAMERA);
  96         i2s0 = dove_register_gate("i2s0", "tclk", CLOCK_GATING_BIT_I2S0);
  97         i2s1 = dove_register_gate("i2s1", "tclk", CLOCK_GATING_BIT_I2S1);
  98         crypto = dove_register_gate("crypto", "tclk", CLOCK_GATING_BIT_CRYPTO);
  99         ac97 = dove_register_gate("ac97", "tclk", CLOCK_GATING_BIT_AC97);
 100         pdma = dove_register_gate("pdma", "tclk", CLOCK_GATING_BIT_PDMA);
 101         xor0 = dove_register_gate("xor0", "tclk", CLOCK_GATING_BIT_XOR0);
 102         xor1 = dove_register_gate("xor1", "tclk", CLOCK_GATING_BIT_XOR1);
 103         gephy = dove_register_gate("gephy", "tclk", CLOCK_GATING_BIT_GIGA_PHY);
 104         ge = dove_register_gate("ge", "gephy", CLOCK_GATING_BIT_GBE);
 105
 106         orion_clkdev_add(NULL, "orion_spi.0", tclk);
 107         orion_clkdev_add(NULL, "orion_spi.1", tclk);
 108         orion_clkdev_add(NULL, "orion_wdt", tclk);
 109         orion_clkdev_add(NULL, "mv64xxx_i2c.0", tclk);
 110
 111         orion_clkdev_add(NULL, "orion-ehci.0", usb0);
 112         orion_clkdev_add(NULL, "orion-ehci.1", usb1);
 113         orion_clkdev_add(NULL, "mv643xx_eth_port.0", ge);
 114         orion_clkdev_add(NULL, "sata_mv.0", sata);
 115         orion_clkdev_add("0", "pcie", pex0);
 116         orion_clkdev_add("1", "pcie", pex1);
 117         orion_clkdev_add(NULL, "sdhci-dove.0", sdio0);
 118         orion_clkdev_add(NULL, "sdhci-dove.1", sdio1);
 119         orion_clkdev_add(NULL, "orion_nand", nand);
 120         orion_clkdev_add(NULL, "cafe1000-ccic.0", camera);
 121         orion_clkdev_add(NULL, "kirkwood-i2s.0", i2s0);
 122         orion_clkdev_add(NULL, "kirkwood-i2s.1", i2s1);
 123         orion_clkdev_add(NULL, "mv_crypto", crypto);
 124         orion_clkdev_add(NULL, "dove-ac97", ac97);
 125         orion_clkdev_add(NULL, "dove-pdma", pdma);
 126         orion_clkdev_add(NULL, "mv_xor_shared.0", xor0);
 127         orion_clkdev_add(NULL, "mv_xor_shared.1", xor1);
 128 }
 129
 130 /*****************************************************************************
 131  * EHCI0
 132  ****************************************************************************/
 133 void __init dove_ehci0_init(void)
 134 {
 135         orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
 136 }
 137
 138 /*****************************************************************************
 139  * EHCI1
 140  ****************************************************************************/
 141 void __init dove_ehci1_init(void)
 142 {
 143         orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
 144 }
 145
 146 /*****************************************************************************
 147  * GE00
 148  ****************************************************************************/
 149 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 150 {
 151         orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
 152                         IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
 153                         1600);
 154 }
 155
 156 /*****************************************************************************
 157  * SoC RTC
 158  ****************************************************************************/
 159 void __init dove_rtc_init(void)
 160 {
 161         orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
 162 }
 163
 164 /*****************************************************************************
 165  * SATA
 166  ****************************************************************************/
 167 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
 168 {
 169         orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
 170
 171 }
 172
 173 /*****************************************************************************
 174  * UART0
 175  ****************************************************************************/
 176 void __init dove_uart0_init(void)
 177 {
 178         orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
 179                          IRQ_DOVE_UART_0, tclk);
 180 }
 181
 182 /*****************************************************************************
 183  * UART1
 184  ****************************************************************************/
 185 void __init dove_uart1_init(void)
 186 {
 187         orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
 188                          IRQ_DOVE_UART_1, tclk);
 189 }
 190
 191 /*****************************************************************************
 192  * UART2
 193  ****************************************************************************/
 194 void __init dove_uart2_init(void)
 195 {
 196         orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
 197                          IRQ_DOVE_UART_2, tclk);
 198 }
 199
 200 /*****************************************************************************
 201  * UART3
 202  ****************************************************************************/
 203 void __init dove_uart3_init(void)
 204 {
 205         orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
 206                          IRQ_DOVE_UART_3, tclk);
 207 }
 208
 209 /*****************************************************************************
 210  * SPI
 211  ****************************************************************************/
 212 void __init dove_spi0_init(void)
 213 {
 214         orion_spi_init(DOVE_SPI0_PHYS_BASE);
 215 }
 216
 217 void __init dove_spi1_init(void)
 218 {
 219         orion_spi_1_init(DOVE_SPI1_PHYS_BASE);
 220 }
 221
 222 /*****************************************************************************
 223  * I2C
 224  ****************************************************************************/
 225 void __init dove_i2c_init(void)
 226 {
 227         orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
 228 }
 229
 230 /*****************************************************************************
 231  * Time handling
 232  ****************************************************************************/
 233 void __init dove_init_early(void)
 234 {
 235         orion_time_set_base(TIMER_VIRT_BASE);
 236 }
 237
 238 static int __init dove_find_tclk(void)
 239 {
 240         return 166666667;
 241 }
 242
 243 static void __init dove_timer_init(void)
 244 {
 245         dove_tclk = dove_find_tclk();
 246         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 247                         IRQ_DOVE_BRIDGE, dove_tclk);
 248 }
 249
 250 struct sys_timer dove_timer = {
 251         .init = dove_timer_init,
 252 };
 253
 254 /*****************************************************************************
 255  * Cryptographic Engines and Security Accelerator (CESA)
 256  ****************************************************************************/
 257 void __init dove_crypto_init(void)
 258 {
 259         orion_crypto_init(DOVE_CRYPT_PHYS_BASE, DOVE_CESA_PHYS_BASE,
 260                           DOVE_CESA_SIZE, IRQ_DOVE_CRYPTO);
 261 }
 262
 263 /*****************************************************************************
 264  * XOR 0
 265  ****************************************************************************/
 266 void __init dove_xor0_init(void)
 267 {
 268         orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
 269                         IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
 270 }
 271
 272 /*****************************************************************************
 273  * XOR 1
 274  ****************************************************************************/
 275 void __init dove_xor1_init(void)
 276 {
 277         orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
 278                         IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
 279 }
 280
 281 /*****************************************************************************
 282  * SDIO
 283  ****************************************************************************/
 284 static u64 sdio_dmamask = DMA_BIT_MASK(32);
 285
 286 static struct resource dove_sdio0_resources[] = {
 287         {
 288                 .start  = DOVE_SDIO0_PHYS_BASE,
 289                 .end    = DOVE_SDIO0_PHYS_BASE + 0xff,
 290                 .flags  = IORESOURCE_MEM,
 291         }, {
 292                 .start  = IRQ_DOVE_SDIO0,
 293                 .end    = IRQ_DOVE_SDIO0,
 294                 .flags  = IORESOURCE_IRQ,
 295         },
 296 };
 297
 298 static struct platform_device dove_sdio0 = {
 299         .name           = "sdhci-dove",
 300         .id             = 0,
 301         .dev            = {
 302                 .dma_mask               = &sdio_dmamask,
 303                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 304         },
 305         .resource       = dove_sdio0_resources,
 306         .num_resources  = ARRAY_SIZE(dove_sdio0_resources),
 307 };
 308
 309 void __init dove_sdio0_init(void)
 310 {
 311         platform_device_register(&dove_sdio0);
 312 }
 313
 314 static struct resource dove_sdio1_resources[] = {
 315         {
 316                 .start  = DOVE_SDIO1_PHYS_BASE,
 317                 .end    = DOVE_SDIO1_PHYS_BASE + 0xff,
 318                 .flags  = IORESOURCE_MEM,
 319         }, {
 320                 .start  = IRQ_DOVE_SDIO1,
 321                 .end    = IRQ_DOVE_SDIO1,
 322                 .flags  = IORESOURCE_IRQ,
 323         },
 324 };
 325
 326 static struct platform_device dove_sdio1 = {
 327         .name           = "sdhci-dove",
 328         .id             = 1,
 329         .dev            = {
 330                 .dma_mask               = &sdio_dmamask,
 331                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 332         },
 333         .resource       = dove_sdio1_resources,
 334         .num_resources  = ARRAY_SIZE(dove_sdio1_resources),
 335 };
 336
 337 void __init dove_sdio1_init(void)
 338 {
 339         platform_device_register(&dove_sdio1);
 340 }
 341
 342 void __init dove_init(void)
 343 {
 344         pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
 345                 (dove_tclk + 499999) / 1000000);
 346
 347 #ifdef CONFIG_CACHE_TAUROS2
 348         tauros2_init(0);
 349 #endif
 350         dove_setup_cpu_mbus();
 351
 352         /* Setup root of clk tree */
 353         dove_clk_init();
 354
 355         /* internal devices that every board has */
 356         dove_rtc_init();
 357         dove_xor0_init();
 358         dove_xor1_init();
 359 }
 360
 361 void dove_restart(char mode, const char *cmd)
 362 {
 363         /*
 364          * Enable soft reset to assert RSTOUTn.
 365          */
 366         writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
 367
 368         /*
 369          * Assert soft reset.
 370          */
 371         writel(SOFT_RESET, SYSTEM_SOFT_RESET);
 372
 373         while (1)
 374                 ;
 375 }
 376
 377 #if defined(CONFIG_MACH_DOVE_DT)
 378 /*
 379  * Auxdata required until real OF clock provider
 380  */
 381 struct of_dev_auxdata dove_auxdata_lookup[] __initdata = {
 382         OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
 383         OF_DEV_AUXDATA("marvell,orion-spi", 0xf1014600, "orion_spi.1", NULL),
 384         OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
 385         OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
 386                        NULL),
 387         OF_DEV_AUXDATA("marvell,orion-sata", 0xf10a0000, "sata_mv.0", NULL),
 388         OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1092000, "sdhci-dove.0", NULL),
 389         OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1090000, "sdhci-dove.1", NULL),
 390         {},
 391 };
 392
 393 static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
 394         .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
 395 };
 396
 397 static void __init dove_dt_init(void)
 398 {
 399         pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
 400                 (dove_tclk + 499999) / 1000000);
 401
 402 #ifdef CONFIG_CACHE_TAUROS2
 403         tauros2_init(0);
 404 #endif
 405         dove_setup_cpu_mbus();
 406
 407         /* Setup root of clk tree */
 408         dove_clk_init();
 409
 410         /* Internal devices not ported to DT yet */
 411         dove_rtc_init();
 412         dove_xor0_init();
 413         dove_xor1_init();
 414
 415         dove_ge00_init(&dove_dt_ge00_data);
 416         dove_ehci0_init();
 417         dove_ehci1_init();
 418         dove_pcie_init(1, 1);
 419
 420         of_platform_populate(NULL, of_default_bus_match_table,
 421                              dove_auxdata_lookup, NULL);
 422 }
 423
 424 static const char * const dove_dt_board_compat[] = {
 425         "marvell,dove",
 426         NULL
 427 };
 428
 429 DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
 430         .map_io         = dove_map_io,
 431         .init_early     = dove_init_early,
 432         .init_irq       = orion_dt_init_irq,
 433         .timer          = &dove_timer,
 434         .init_machine   = dove_dt_init,
 435         .restart        = dove_restart,
 436         .dt_compat      = dove_dt_board_compat,
 437 MACHINE_END
 438 #endif