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spi: ep93xx: Convert to use CS GPIO descriptors
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1 /*
2 * arch/arm/mach-ep93xx/ts72xx.c
3 * Technologic Systems TS72xx SBC support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/io.h>
19 #include <linux/mtd/platnand.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/flash.h>
22 #include <linux/spi/mmc_spi.h>
23 #include <linux/mmc/host.h>
24 #include <linux/platform_data/spi-ep93xx.h>
25 #include <linux/gpio/machine.h>
26
27 #include <mach/gpio-ep93xx.h>
28 #include <mach/hardware.h>
29 #include <mach/irqs.h>
30
31 #include <asm/mach-types.h>
32 #include <asm/mach/map.h>
33 #include <asm/mach/arch.h>
34
35 #include "soc.h"
36 #include "ts72xx.h"
37
38 /*************************************************************************
39 * IO map
40 *************************************************************************/
41 static struct map_desc ts72xx_io_desc[] __initdata = {
42 {
43 .virtual = (unsigned long)TS72XX_MODEL_VIRT_BASE,
44 .pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
45 .length = TS72XX_MODEL_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
49 .pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
50 .length = TS72XX_OPTIONS_SIZE,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
54 .pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
55 .length = TS72XX_OPTIONS2_SIZE,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = (unsigned long)TS72XX_CPLDVER_VIRT_BASE,
59 .pfn = __phys_to_pfn(TS72XX_CPLDVER_PHYS_BASE),
60 .length = TS72XX_CPLDVER_SIZE,
61 .type = MT_DEVICE,
62 }
63 };
64
65 static void __init ts72xx_map_io(void)
66 {
67 ep93xx_map_io();
68 iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
69 }
70
71
72 /*************************************************************************
73 * NAND flash
74 *************************************************************************/
75 #define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
76 #define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
77
78 static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
79 int cmd, unsigned int ctrl)
80 {
81 if (ctrl & NAND_CTRL_CHANGE) {
82 void __iomem *addr = chip->legacy.IO_ADDR_R;
83 unsigned char bits;
84
85 addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
86
87 bits = __raw_readb(addr) & ~0x07;
88 bits |= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
89 bits |= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
90 bits |= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
91
92 __raw_writeb(bits, addr);
93 }
94
95 if (cmd != NAND_CMD_NONE)
96 __raw_writeb(cmd, chip->legacy.IO_ADDR_W);
97 }
98
99 static int ts72xx_nand_device_ready(struct nand_chip *chip)
100 {
101 void __iomem *addr = chip->legacy.IO_ADDR_R;
102
103 addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
104
105 return !!(__raw_readb(addr) & 0x20);
106 }
107
108 #define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
109 #define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
110
111 static struct mtd_partition ts72xx_nand_parts[] = {
112 {
113 .name = "TS-BOOTROM",
114 .offset = 0,
115 .size = TS72XX_BOOTROM_PART_SIZE,
116 .mask_flags = MTD_WRITEABLE, /* force read-only */
117 }, {
118 .name = "Linux",
119 .offset = MTDPART_OFS_RETAIN,
120 .size = TS72XX_REDBOOT_PART_SIZE,
121 /* leave so much for last partition */
122 }, {
123 .name = "RedBoot",
124 .offset = MTDPART_OFS_APPEND,
125 .size = MTDPART_SIZ_FULL,
126 .mask_flags = MTD_WRITEABLE, /* force read-only */
127 },
128 };
129
130 static struct platform_nand_data ts72xx_nand_data = {
131 .chip = {
132 .nr_chips = 1,
133 .chip_offset = 0,
134 .chip_delay = 15,
135 },
136 .ctrl = {
137 .cmd_ctrl = ts72xx_nand_hwcontrol,
138 .dev_ready = ts72xx_nand_device_ready,
139 },
140 };
141
142 static struct resource ts72xx_nand_resource[] = {
143 {
144 .start = 0, /* filled in later */
145 .end = 0, /* filled in later */
146 .flags = IORESOURCE_MEM,
147 },
148 };
149
150 static struct platform_device ts72xx_nand_flash = {
151 .name = "gen_nand",
152 .id = -1,
153 .dev.platform_data = &ts72xx_nand_data,
154 .resource = ts72xx_nand_resource,
155 .num_resources = ARRAY_SIZE(ts72xx_nand_resource),
156 };
157
158 void __init ts72xx_register_flash(struct mtd_partition *parts, int n,
159 resource_size_t start)
160 {
161 /*
162 * TS7200 has NOR flash all other TS72xx board have NAND flash.
163 */
164 if (board_is_ts7200()) {
165 ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
166 } else {
167 ts72xx_nand_resource[0].start = start;
168 ts72xx_nand_resource[0].end = start + SZ_16M - 1;
169
170 ts72xx_nand_data.chip.partitions = parts;
171 ts72xx_nand_data.chip.nr_partitions = n;
172
173 platform_device_register(&ts72xx_nand_flash);
174 }
175 }
176
177 /*************************************************************************
178 * RTC M48T86
179 *************************************************************************/
180 #define TS72XX_RTC_INDEX_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x00800000)
181 #define TS72XX_RTC_DATA_PHYS_BASE (EP93XX_CS1_PHYS_BASE + 0x01700000)
182
183 static struct resource ts72xx_rtc_resources[] = {
184 DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01),
185 DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01),
186 };
187
188 static struct platform_device ts72xx_rtc_device = {
189 .name = "rtc-m48t86",
190 .id = -1,
191 .resource = ts72xx_rtc_resources,
192 .num_resources = ARRAY_SIZE(ts72xx_rtc_resources),
193 };
194
195 /*************************************************************************
196 * Watchdog (in CPLD)
197 *************************************************************************/
198 #define TS72XX_WDT_CONTROL_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03800000)
199 #define TS72XX_WDT_FEED_PHYS_BASE (EP93XX_CS2_PHYS_BASE + 0x03c00000)
200
201 static struct resource ts72xx_wdt_resources[] = {
202 DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01),
203 DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01),
204 };
205
206 static struct platform_device ts72xx_wdt_device = {
207 .name = "ts72xx-wdt",
208 .id = -1,
209 .resource = ts72xx_wdt_resources,
210 .num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
211 };
212
213 /*************************************************************************
214 * ETH
215 *************************************************************************/
216 static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
217 .phy_id = 1,
218 };
219
220 /*************************************************************************
221 * SPI SD/MMC host
222 *************************************************************************/
223 #define BK3_EN_SDCARD_PHYS_BASE 0x12400000
224 #define BK3_EN_SDCARD_PWR 0x0
225 #define BK3_DIS_SDCARD_PWR 0x0C
226 static void bk3_mmc_spi_setpower(struct device *dev, unsigned int vdd)
227 {
228 void __iomem *pwr_sd = ioremap(BK3_EN_SDCARD_PHYS_BASE, SZ_4K);
229
230 if (!pwr_sd) {
231 pr_err("Failed to enable SD card power!");
232 return;
233 }
234
235 pr_debug("%s: SD card pwr %s VDD:0x%x\n", __func__,
236 !!vdd ? "ON" : "OFF", vdd);
237
238 if (!!vdd)
239 __raw_writeb(BK3_EN_SDCARD_PWR, pwr_sd);
240 else
241 __raw_writeb(BK3_DIS_SDCARD_PWR, pwr_sd);
242
243 iounmap(pwr_sd);
244 }
245
246 static struct mmc_spi_platform_data bk3_spi_mmc_data = {
247 .detect_delay = 500,
248 .powerup_msecs = 100,
249 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
250 .caps = MMC_CAP_NONREMOVABLE,
251 .setpower = bk3_mmc_spi_setpower,
252 };
253
254 /*************************************************************************
255 * SPI Bus - SD card access
256 *************************************************************************/
257 static struct spi_board_info bk3_spi_board_info[] __initdata = {
258 {
259 .modalias = "mmc_spi",
260 .platform_data = &bk3_spi_mmc_data,
261 .max_speed_hz = 7.4E6,
262 .bus_num = 0,
263 .chip_select = 0,
264 .mode = SPI_MODE_0,
265 },
266 };
267
268 /*
269 * This is a stub -> the FGPIO[3] pin is not connected on the schematic
270 * The all work is performed automatically by !SPI_FRAME (SFRM1) and
271 * goes through CPLD
272 */
273 static struct gpiod_lookup_table bk3_spi_cs_gpio_table = {
274 .dev_id = "ep93xx-spi.0",
275 .table = {
276 GPIO_LOOKUP("F", 3, "cs", GPIO_ACTIVE_LOW),
277 { },
278 },
279 };
280
281 static struct ep93xx_spi_info bk3_spi_master __initdata = {
282 .use_dma = 1,
283 };
284
285 /*************************************************************************
286 * TS72XX support code
287 *************************************************************************/
288 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
289
290 /* Relative to EP93XX_CS1_PHYS_BASE */
291 #define TS73XX_FPGA_LOADER_BASE 0x03c00000
292
293 static struct resource ts73xx_fpga_resources[] = {
294 {
295 .start = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE,
296 .end = EP93XX_CS1_PHYS_BASE + TS73XX_FPGA_LOADER_BASE + 1,
297 .flags = IORESOURCE_MEM,
298 },
299 };
300
301 static struct platform_device ts73xx_fpga_device = {
302 .name = "ts73xx-fpga-mgr",
303 .id = -1,
304 .resource = ts73xx_fpga_resources,
305 .num_resources = ARRAY_SIZE(ts73xx_fpga_resources),
306 };
307
308 #endif
309
310 /*************************************************************************
311 * SPI Bus
312 *************************************************************************/
313 static struct spi_board_info ts72xx_spi_devices[] __initdata = {
314 {
315 .modalias = "tmp122",
316 .max_speed_hz = 2 * 1000 * 1000,
317 .bus_num = 0,
318 .chip_select = 0,
319 },
320 };
321
322 static struct gpiod_lookup_table ts72xx_spi_cs_gpio_table = {
323 .dev_id = "ep93xx-spi.0",
324 .table = {
325 /* DIO_17 */
326 GPIO_LOOKUP("F", 2, "cs", GPIO_ACTIVE_LOW),
327 { },
328 },
329 };
330
331 static struct ep93xx_spi_info ts72xx_spi_info __initdata = {
332 /* Intentionally left blank */
333 };
334
335 static void __init ts72xx_init_machine(void)
336 {
337 ep93xx_init_devices();
338 ts72xx_register_flash(ts72xx_nand_parts, ARRAY_SIZE(ts72xx_nand_parts),
339 is_ts9420_installed() ?
340 EP93XX_CS7_PHYS_BASE : EP93XX_CS6_PHYS_BASE);
341 platform_device_register(&ts72xx_rtc_device);
342 platform_device_register(&ts72xx_wdt_device);
343
344 ep93xx_register_eth(&ts72xx_eth_data, 1);
345 #if IS_ENABLED(CONFIG_FPGA_MGR_TS73XX)
346 if (board_is_ts7300())
347 platform_device_register(&ts73xx_fpga_device);
348 #endif
349 gpiod_add_lookup_table(&ts72xx_spi_cs_gpio_table);
350 ep93xx_register_spi(&ts72xx_spi_info, ts72xx_spi_devices,
351 ARRAY_SIZE(ts72xx_spi_devices));
352 }
353
354 MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
355 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
356 .atag_offset = 0x100,
357 .map_io = ts72xx_map_io,
358 .init_irq = ep93xx_init_irq,
359 .init_time = ep93xx_timer_init,
360 .init_machine = ts72xx_init_machine,
361 .init_late = ep93xx_init_late,
362 .restart = ep93xx_restart,
363 MACHINE_END
364
365 /*************************************************************************
366 * EP93xx I2S audio peripheral handling
367 *************************************************************************/
368 static struct resource ep93xx_i2s_resource[] = {
369 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
370 DEFINE_RES_IRQ_NAMED(IRQ_EP93XX_SAI, "spilink i2s slave"),
371 };
372
373 static struct platform_device ep93xx_i2s_device = {
374 .name = "ep93xx-spilink-i2s",
375 .id = -1,
376 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
377 .resource = ep93xx_i2s_resource,
378 };
379
380 /*************************************************************************
381 * BK3 support code
382 *************************************************************************/
383 static struct mtd_partition bk3_nand_parts[] = {
384 {
385 .name = "System",
386 .offset = 0x00000000,
387 .size = 0x01e00000,
388 }, {
389 .name = "Data",
390 .offset = 0x01e00000,
391 .size = 0x05f20000
392 }, {
393 .name = "RedBoot",
394 .offset = 0x07d20000,
395 .size = 0x002e0000,
396 .mask_flags = MTD_WRITEABLE, /* force RO */
397 },
398 };
399
400 static void __init bk3_init_machine(void)
401 {
402 ep93xx_init_devices();
403
404 ts72xx_register_flash(bk3_nand_parts, ARRAY_SIZE(bk3_nand_parts),
405 EP93XX_CS6_PHYS_BASE);
406
407 ep93xx_register_eth(&ts72xx_eth_data, 1);
408
409 gpiod_add_lookup_table(&bk3_spi_cs_gpio_table);
410 ep93xx_register_spi(&bk3_spi_master, bk3_spi_board_info,
411 ARRAY_SIZE(bk3_spi_board_info));
412
413 /* Configure ep93xx's I2S to use AC97 pins */
414 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
415 platform_device_register(&ep93xx_i2s_device);
416 }
417
418 MACHINE_START(BK3, "Liebherr controller BK3.1")
419 /* Maintainer: Lukasz Majewski <lukma@denx.de> */
420 .atag_offset = 0x100,
421 .map_io = ts72xx_map_io,
422 .init_irq = ep93xx_init_irq,
423 .init_time = ep93xx_timer_init,
424 .init_machine = bk3_init_machine,
425 .init_late = ep93xx_init_late,
426 .restart = ep93xx_restart,
427 MACHINE_END