1 /* linux/arch/arm/mach-exynos4/cpuidle.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/cpuidle.h>
14 #include <linux/cpu_pm.h>
16 #include <linux/export.h>
17 #include <linux/time.h>
19 #include <asm/proc-fns.h>
20 #include <asm/smp_scu.h>
21 #include <asm/suspend.h>
22 #include <asm/unified.h>
23 #include <asm/cpuidle.h>
24 #include <mach/regs-clock.h>
25 #include <mach/regs-pmu.h>
31 #define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
32 S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
33 (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
34 #define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
35 S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
36 (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
38 #define S5P_CHECK_AFTR 0xFCBA0D10
40 static int exynos4_enter_lowpower(struct cpuidle_device
*dev
,
41 struct cpuidle_driver
*drv
,
44 static DEFINE_PER_CPU(struct cpuidle_device
, exynos4_cpuidle_device
);
46 static struct cpuidle_driver exynos4_idle_driver
= {
47 .name
= "exynos4_idle",
50 [0] = ARM_CPUIDLE_WFI_STATE
,
52 .enter
= exynos4_enter_lowpower
,
54 .target_residency
= 100000,
55 .flags
= CPUIDLE_FLAG_TIME_VALID
,
57 .desc
= "ARM power down",
61 .safe_state_index
= 0,
64 /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
65 static void exynos4_set_wakeupmask(void)
67 __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK
);
70 static unsigned int g_pwr_ctrl
, g_diag_reg
;
72 static void save_cpu_arch_register(void)
74 /*read power control register*/
75 asm("mrc p15, 0, %0, c15, c0, 0" : "=r"(g_pwr_ctrl
) : : "cc");
76 /*read diagnostic register*/
77 asm("mrc p15, 0, %0, c15, c0, 1" : "=r"(g_diag_reg
) : : "cc");
81 static void restore_cpu_arch_register(void)
83 /*write power control register*/
84 asm("mcr p15, 0, %0, c15, c0, 0" : : "r"(g_pwr_ctrl
) : "cc");
85 /*write diagnostic register*/
86 asm("mcr p15, 0, %0, c15, c0, 1" : : "r"(g_diag_reg
) : "cc");
90 static int idle_finisher(unsigned long flags
)
96 static int exynos4_enter_core0_aftr(struct cpuidle_device
*dev
,
97 struct cpuidle_driver
*drv
,
102 exynos4_set_wakeupmask();
104 /* Set value of power down register for aftr mode */
105 exynos_sys_powerdown_conf(SYS_AFTR
);
107 __raw_writel(virt_to_phys(s3c_cpu_resume
), REG_DIRECTGO_ADDR
);
108 __raw_writel(S5P_CHECK_AFTR
, REG_DIRECTGO_FLAG
);
110 save_cpu_arch_register();
112 /* Setting Central Sequence Register for power down mode */
113 tmp
= __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION
);
114 tmp
&= ~S5P_CENTRAL_LOWPWR_CFG
;
115 __raw_writel(tmp
, S5P_CENTRAL_SEQ_CONFIGURATION
);
118 cpu_suspend(0, idle_finisher
);
121 if (!soc_is_exynos5250())
122 scu_enable(S5P_VA_SCU
);
126 restore_cpu_arch_register();
129 * If PMU failed while entering sleep mode, WFI will be
130 * ignored by PMU and then exiting cpu_do_idle().
131 * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
134 tmp
= __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION
);
135 if (!(tmp
& S5P_CENTRAL_LOWPWR_CFG
)) {
136 tmp
|= S5P_CENTRAL_LOWPWR_CFG
;
137 __raw_writel(tmp
, S5P_CENTRAL_SEQ_CONFIGURATION
);
140 /* Clear wakeup state register */
141 __raw_writel(0x0, S5P_WAKEUP_STAT
);
146 static int exynos4_enter_lowpower(struct cpuidle_device
*dev
,
147 struct cpuidle_driver
*drv
,
150 int new_index
= index
;
152 /* This mode only can be entered when other core's are offline */
153 if (num_online_cpus() > 1)
154 new_index
= drv
->safe_state_index
;
157 return arm_cpuidle_simple_enter(dev
, drv
, new_index
);
159 return exynos4_enter_core0_aftr(dev
, drv
, new_index
);
162 static void __init
exynos5_core_down_clk(void)
167 * Enable arm clock down (in idle) and set arm divider
168 * ratios in WFI/WFE state.
170 tmp
= PWR_CTRL1_CORE2_DOWN_RATIO
| \
171 PWR_CTRL1_CORE1_DOWN_RATIO
| \
172 PWR_CTRL1_DIV2_DOWN_EN
| \
173 PWR_CTRL1_DIV1_DOWN_EN
| \
174 PWR_CTRL1_USE_CORE1_WFE
| \
175 PWR_CTRL1_USE_CORE0_WFE
| \
176 PWR_CTRL1_USE_CORE1_WFI
| \
177 PWR_CTRL1_USE_CORE0_WFI
;
178 __raw_writel(tmp
, EXYNOS5_PWR_CTRL1
);
181 * Enable arm clock up (on exiting idle). Set arm divider
182 * ratios when not in idle along with the standby duration
185 tmp
= PWR_CTRL2_DIV2_UP_EN
| \
186 PWR_CTRL2_DIV1_UP_EN
| \
187 PWR_CTRL2_DUR_STANDBY2_VAL
| \
188 PWR_CTRL2_DUR_STANDBY1_VAL
| \
189 PWR_CTRL2_CORE2_UP_RATIO
| \
190 PWR_CTRL2_CORE1_UP_RATIO
;
191 __raw_writel(tmp
, EXYNOS5_PWR_CTRL2
);
194 static int __init
exynos4_init_cpuidle(void)
197 struct cpuidle_device
*device
;
199 if (soc_is_exynos5250())
200 exynos5_core_down_clk();
202 ret
= cpuidle_register_driver(&exynos4_idle_driver
);
204 printk(KERN_ERR
"CPUidle failed to register driver\n");
208 for_each_online_cpu(cpu_id
) {
209 device
= &per_cpu(exynos4_cpuidle_device
, cpu_id
);
210 device
->cpu
= cpu_id
;
212 /* Support IDLE only */
214 device
->state_count
= 1;
216 ret
= cpuidle_register_device(device
);
218 printk(KERN_ERR
"CPUidle register device failed\n");
225 device_initcall(exynos4_init_cpuidle
);