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1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/fb.h>
17 #include <linux/mfd/max8998.h>
18 #include <linux/regulator/machine.h>
19 #include <linux/regulator/fixed.h>
20 #include <linux/regulator/max8952.h>
21 #include <linux/mmc/host.h>
22 #include <linux/i2c-gpio.h>
23 #include <linux/i2c/mcs.h>
24 #include <linux/i2c/atmel_mxt_ts.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/hardware/gic.h>
28 #include <asm/mach-types.h>
29
30 #include <plat/regs-serial.h>
31 #include <plat/cpu.h>
32 #include <plat/devs.h>
33 #include <plat/iic.h>
34 #include <plat/gpio-cfg.h>
35 #include <plat/fb.h>
36 #include <plat/mfc.h>
37 #include <plat/sdhci.h>
38 #include <plat/pd.h>
39 #include <plat/regs-fb-v4.h>
40 #include <plat/fimc-core.h>
41 #include <plat/camport.h>
42 #include <plat/mipi_csis.h>
43
44 #include <mach/map.h>
45
46 #include <media/v4l2-mediabus.h>
47 #include <media/s5p_fimc.h>
48 #include <media/m5mols.h>
49
50 #include "common.h"
51
52 /* Following are default values for UCON, ULCON and UFCON UART registers */
53 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
54 S3C2410_UCON_RXILEVEL | \
55 S3C2410_UCON_TXIRQMODE | \
56 S3C2410_UCON_RXIRQMODE | \
57 S3C2410_UCON_RXFIFO_TOI | \
58 S3C2443_UCON_RXERR_IRQEN)
59
60 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
61
62 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
63 S5PV210_UFCON_TXTRIG256 | \
64 S5PV210_UFCON_RXTRIG256)
65
66 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
67 [0] = {
68 .hwport = 0,
69 .ucon = UNIVERSAL_UCON_DEFAULT,
70 .ulcon = UNIVERSAL_ULCON_DEFAULT,
71 .ufcon = UNIVERSAL_UFCON_DEFAULT,
72 },
73 [1] = {
74 .hwport = 1,
75 .ucon = UNIVERSAL_UCON_DEFAULT,
76 .ulcon = UNIVERSAL_ULCON_DEFAULT,
77 .ufcon = UNIVERSAL_UFCON_DEFAULT,
78 },
79 [2] = {
80 .hwport = 2,
81 .ucon = UNIVERSAL_UCON_DEFAULT,
82 .ulcon = UNIVERSAL_ULCON_DEFAULT,
83 .ufcon = UNIVERSAL_UFCON_DEFAULT,
84 },
85 [3] = {
86 .hwport = 3,
87 .ucon = UNIVERSAL_UCON_DEFAULT,
88 .ulcon = UNIVERSAL_ULCON_DEFAULT,
89 .ufcon = UNIVERSAL_UFCON_DEFAULT,
90 },
91 };
92
93 static struct regulator_consumer_supply max8952_consumer =
94 REGULATOR_SUPPLY("vdd_arm", NULL);
95
96 static struct max8952_platform_data universal_max8952_pdata __initdata = {
97 .gpio_vid0 = EXYNOS4_GPX0(3),
98 .gpio_vid1 = EXYNOS4_GPX0(4),
99 .gpio_en = -1, /* Not controllable, set "Always High" */
100 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
101 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
102 .sync_freq = 0, /* default: fastest */
103 .ramp_speed = 0, /* default: fastest */
104
105 .reg_data = {
106 .constraints = {
107 .name = "VARM_1.2V",
108 .min_uV = 770000,
109 .max_uV = 1400000,
110 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
111 .always_on = 1,
112 .boot_on = 1,
113 },
114 .num_consumer_supplies = 1,
115 .consumer_supplies = &max8952_consumer,
116 },
117 };
118
119 static struct regulator_consumer_supply lp3974_buck1_consumer =
120 REGULATOR_SUPPLY("vdd_int", NULL);
121
122 static struct regulator_consumer_supply lp3974_buck2_consumer =
123 REGULATOR_SUPPLY("vddg3d", NULL);
124
125 static struct regulator_consumer_supply lp3974_buck3_consumer =
126 REGULATOR_SUPPLY("vdet", "s5p-sdo");
127
128 static struct regulator_init_data lp3974_buck1_data = {
129 .constraints = {
130 .name = "VINT_1.1V",
131 .min_uV = 750000,
132 .max_uV = 1500000,
133 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
134 REGULATOR_CHANGE_STATUS,
135 .boot_on = 1,
136 .state_mem = {
137 .disabled = 1,
138 },
139 },
140 .num_consumer_supplies = 1,
141 .consumer_supplies = &lp3974_buck1_consumer,
142 };
143
144 static struct regulator_init_data lp3974_buck2_data = {
145 .constraints = {
146 .name = "VG3D_1.1V",
147 .min_uV = 750000,
148 .max_uV = 1500000,
149 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
150 REGULATOR_CHANGE_STATUS,
151 .boot_on = 1,
152 .state_mem = {
153 .disabled = 1,
154 },
155 },
156 .num_consumer_supplies = 1,
157 .consumer_supplies = &lp3974_buck2_consumer,
158 };
159
160 static struct regulator_init_data lp3974_buck3_data = {
161 .constraints = {
162 .name = "VCC_1.8V",
163 .min_uV = 1800000,
164 .max_uV = 1800000,
165 .apply_uV = 1,
166 .always_on = 1,
167 .state_mem = {
168 .enabled = 1,
169 },
170 },
171 .num_consumer_supplies = 1,
172 .consumer_supplies = &lp3974_buck3_consumer,
173 };
174
175 static struct regulator_init_data lp3974_buck4_data = {
176 .constraints = {
177 .name = "VMEM_1.2V",
178 .min_uV = 1200000,
179 .max_uV = 1200000,
180 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
181 .apply_uV = 1,
182 .state_mem = {
183 .disabled = 1,
184 },
185 },
186 };
187
188 static struct regulator_init_data lp3974_ldo2_data = {
189 .constraints = {
190 .name = "VALIVE_1.2V",
191 .min_uV = 1200000,
192 .max_uV = 1200000,
193 .apply_uV = 1,
194 .always_on = 1,
195 .state_mem = {
196 .enabled = 1,
197 },
198 },
199 };
200
201 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
202 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
203 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
204 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
205 };
206
207 static struct regulator_init_data lp3974_ldo3_data = {
208 .constraints = {
209 .name = "VUSB+MIPI_1.1V",
210 .min_uV = 1100000,
211 .max_uV = 1100000,
212 .apply_uV = 1,
213 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
214 .state_mem = {
215 .disabled = 1,
216 },
217 },
218 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
219 .consumer_supplies = lp3974_ldo3_consumer,
220 };
221
222 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
223 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
224 };
225
226 static struct regulator_init_data lp3974_ldo4_data = {
227 .constraints = {
228 .name = "VADC_3.3V",
229 .min_uV = 3300000,
230 .max_uV = 3300000,
231 .apply_uV = 1,
232 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
233 .state_mem = {
234 .disabled = 1,
235 },
236 },
237 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
238 .consumer_supplies = lp3974_ldo4_consumer,
239 };
240
241 static struct regulator_init_data lp3974_ldo5_data = {
242 .constraints = {
243 .name = "VTF_2.8V",
244 .min_uV = 2800000,
245 .max_uV = 2800000,
246 .apply_uV = 1,
247 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
248 .state_mem = {
249 .disabled = 1,
250 },
251 },
252 };
253
254 static struct regulator_init_data lp3974_ldo6_data = {
255 .constraints = {
256 .name = "LDO6",
257 .min_uV = 2000000,
258 .max_uV = 2000000,
259 .apply_uV = 1,
260 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
261 .state_mem = {
262 .disabled = 1,
263 },
264 },
265 };
266
267 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
268 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
269 };
270
271 static struct regulator_init_data lp3974_ldo7_data = {
272 .constraints = {
273 .name = "VLCD+VMIPI_1.8V",
274 .min_uV = 1800000,
275 .max_uV = 1800000,
276 .apply_uV = 1,
277 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
278 .state_mem = {
279 .disabled = 1,
280 },
281 },
282 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
283 .consumer_supplies = lp3974_ldo7_consumer,
284 };
285
286 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
287 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
288 };
289
290 static struct regulator_init_data lp3974_ldo8_data = {
291 .constraints = {
292 .name = "VUSB+VDAC_3.3V",
293 .min_uV = 3300000,
294 .max_uV = 3300000,
295 .apply_uV = 1,
296 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
297 .state_mem = {
298 .disabled = 1,
299 },
300 },
301 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
302 .consumer_supplies = lp3974_ldo8_consumer,
303 };
304
305 static struct regulator_init_data lp3974_ldo9_data = {
306 .constraints = {
307 .name = "VCC_2.8V",
308 .min_uV = 2800000,
309 .max_uV = 2800000,
310 .apply_uV = 1,
311 .always_on = 1,
312 .state_mem = {
313 .enabled = 1,
314 },
315 },
316 };
317
318 static struct regulator_init_data lp3974_ldo10_data = {
319 .constraints = {
320 .name = "VPLL_1.1V",
321 .min_uV = 1100000,
322 .max_uV = 1100000,
323 .boot_on = 1,
324 .apply_uV = 1,
325 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
326 .state_mem = {
327 .disabled = 1,
328 },
329 },
330 };
331
332 static struct regulator_consumer_supply lp3974_ldo11_consumer =
333 REGULATOR_SUPPLY("dig_28", "0-001f");
334
335 static struct regulator_init_data lp3974_ldo11_data = {
336 .constraints = {
337 .name = "CAM_AF_3.3V",
338 .min_uV = 3300000,
339 .max_uV = 3300000,
340 .apply_uV = 1,
341 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
342 .state_mem = {
343 .disabled = 1,
344 },
345 },
346 .num_consumer_supplies = 1,
347 .consumer_supplies = &lp3974_ldo11_consumer,
348 };
349
350 static struct regulator_init_data lp3974_ldo12_data = {
351 .constraints = {
352 .name = "PS_2.8V",
353 .min_uV = 2800000,
354 .max_uV = 2800000,
355 .apply_uV = 1,
356 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
357 .state_mem = {
358 .disabled = 1,
359 },
360 },
361 };
362
363 static struct regulator_init_data lp3974_ldo13_data = {
364 .constraints = {
365 .name = "VHIC_1.2V",
366 .min_uV = 1200000,
367 .max_uV = 1200000,
368 .apply_uV = 1,
369 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
370 .state_mem = {
371 .disabled = 1,
372 },
373 },
374 };
375
376 static struct regulator_consumer_supply lp3974_ldo14_consumer =
377 REGULATOR_SUPPLY("dig_18", "0-001f");
378
379 static struct regulator_init_data lp3974_ldo14_data = {
380 .constraints = {
381 .name = "CAM_I_HOST_1.8V",
382 .min_uV = 1800000,
383 .max_uV = 1800000,
384 .apply_uV = 1,
385 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
386 .state_mem = {
387 .disabled = 1,
388 },
389 },
390 .num_consumer_supplies = 1,
391 .consumer_supplies = &lp3974_ldo14_consumer,
392 };
393
394
395 static struct regulator_consumer_supply lp3974_ldo15_consumer =
396 REGULATOR_SUPPLY("dig_12", "0-001f");
397
398 static struct regulator_init_data lp3974_ldo15_data = {
399 .constraints = {
400 .name = "CAM_S_DIG+FM33_CORE_1.2V",
401 .min_uV = 1200000,
402 .max_uV = 1200000,
403 .apply_uV = 1,
404 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
405 .state_mem = {
406 .disabled = 1,
407 },
408 },
409 .num_consumer_supplies = 1,
410 .consumer_supplies = &lp3974_ldo15_consumer,
411 };
412
413 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
414 REGULATOR_SUPPLY("a_sensor", "0-001f"),
415 };
416
417 static struct regulator_init_data lp3974_ldo16_data = {
418 .constraints = {
419 .name = "CAM_S_ANA_2.8V",
420 .min_uV = 2800000,
421 .max_uV = 2800000,
422 .apply_uV = 1,
423 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
424 .state_mem = {
425 .disabled = 1,
426 },
427 },
428 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
429 .consumer_supplies = lp3974_ldo16_consumer,
430 };
431
432 static struct regulator_init_data lp3974_ldo17_data = {
433 .constraints = {
434 .name = "VCC_3.0V_LCD",
435 .min_uV = 3000000,
436 .max_uV = 3000000,
437 .apply_uV = 1,
438 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
439 .boot_on = 1,
440 .state_mem = {
441 .disabled = 1,
442 },
443 },
444 };
445
446 static struct regulator_init_data lp3974_32khz_ap_data = {
447 .constraints = {
448 .name = "32KHz AP",
449 .always_on = 1,
450 .state_mem = {
451 .enabled = 1,
452 },
453 },
454 };
455
456 static struct regulator_init_data lp3974_32khz_cp_data = {
457 .constraints = {
458 .name = "32KHz CP",
459 .state_mem = {
460 .disabled = 1,
461 },
462 },
463 };
464
465 static struct regulator_init_data lp3974_vichg_data = {
466 .constraints = {
467 .name = "VICHG",
468 .state_mem = {
469 .disabled = 1,
470 },
471 },
472 };
473
474 static struct regulator_init_data lp3974_esafeout1_data = {
475 .constraints = {
476 .name = "SAFEOUT1",
477 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
478 .state_mem = {
479 .enabled = 1,
480 },
481 },
482 };
483
484 static struct regulator_init_data lp3974_esafeout2_data = {
485 .constraints = {
486 .name = "SAFEOUT2",
487 .boot_on = 1,
488 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
489 .state_mem = {
490 .enabled = 1,
491 },
492 },
493 };
494
495 static struct max8998_regulator_data lp3974_regulators[] = {
496 { MAX8998_LDO2, &lp3974_ldo2_data },
497 { MAX8998_LDO3, &lp3974_ldo3_data },
498 { MAX8998_LDO4, &lp3974_ldo4_data },
499 { MAX8998_LDO5, &lp3974_ldo5_data },
500 { MAX8998_LDO6, &lp3974_ldo6_data },
501 { MAX8998_LDO7, &lp3974_ldo7_data },
502 { MAX8998_LDO8, &lp3974_ldo8_data },
503 { MAX8998_LDO9, &lp3974_ldo9_data },
504 { MAX8998_LDO10, &lp3974_ldo10_data },
505 { MAX8998_LDO11, &lp3974_ldo11_data },
506 { MAX8998_LDO12, &lp3974_ldo12_data },
507 { MAX8998_LDO13, &lp3974_ldo13_data },
508 { MAX8998_LDO14, &lp3974_ldo14_data },
509 { MAX8998_LDO15, &lp3974_ldo15_data },
510 { MAX8998_LDO16, &lp3974_ldo16_data },
511 { MAX8998_LDO17, &lp3974_ldo17_data },
512 { MAX8998_BUCK1, &lp3974_buck1_data },
513 { MAX8998_BUCK2, &lp3974_buck2_data },
514 { MAX8998_BUCK3, &lp3974_buck3_data },
515 { MAX8998_BUCK4, &lp3974_buck4_data },
516 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
517 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
518 { MAX8998_ENVICHG, &lp3974_vichg_data },
519 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
520 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
521 };
522
523 static struct max8998_platform_data universal_lp3974_pdata = {
524 .num_regulators = ARRAY_SIZE(lp3974_regulators),
525 .regulators = lp3974_regulators,
526 .buck1_voltage1 = 1100000, /* INT */
527 .buck1_voltage2 = 1000000,
528 .buck1_voltage3 = 1100000,
529 .buck1_voltage4 = 1000000,
530 .buck1_set1 = EXYNOS4_GPX0(5),
531 .buck1_set2 = EXYNOS4_GPX0(6),
532 .buck2_voltage1 = 1200000, /* G3D */
533 .buck2_voltage2 = 1100000,
534 .buck1_default_idx = 0,
535 .buck2_set3 = EXYNOS4_GPE2(0),
536 .buck2_default_idx = 0,
537 .wakeup = true,
538 };
539
540
541 enum fixed_regulator_id {
542 FIXED_REG_ID_MMC0,
543 FIXED_REG_ID_HDMI_5V,
544 FIXED_REG_ID_CAM_S_IF,
545 FIXED_REG_ID_CAM_I_CORE,
546 FIXED_REG_ID_CAM_VT_DIO,
547 };
548
549 static struct regulator_consumer_supply hdmi_fixed_consumer =
550 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
551
552 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
553 .constraints = {
554 .name = "HDMI_5V",
555 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
556 },
557 .num_consumer_supplies = 1,
558 .consumer_supplies = &hdmi_fixed_consumer,
559 };
560
561 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
562 .supply_name = "HDMI_EN1",
563 .microvolts = 5000000,
564 .gpio = EXYNOS4_GPE0(1),
565 .enable_high = true,
566 .init_data = &hdmi_fixed_voltage_init_data,
567 };
568
569 static struct platform_device hdmi_fixed_voltage = {
570 .name = "reg-fixed-voltage",
571 .id = FIXED_REG_ID_HDMI_5V,
572 .dev = {
573 .platform_data = &hdmi_fixed_voltage_config,
574 },
575 };
576
577 /* GPIO I2C 5 (PMIC) */
578 static struct i2c_board_info i2c5_devs[] __initdata = {
579 {
580 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
581 .platform_data = &universal_max8952_pdata,
582 }, {
583 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
584 .platform_data = &universal_lp3974_pdata,
585 },
586 };
587
588 /* I2C3 (TSP) */
589 static struct mxt_platform_data qt602240_platform_data = {
590 .x_line = 19,
591 .y_line = 11,
592 .x_size = 800,
593 .y_size = 480,
594 .blen = 0x11,
595 .threshold = 0x28,
596 .voltage = 2800000, /* 2.8V */
597 .orient = MXT_DIAGONAL,
598 };
599
600 static struct i2c_board_info i2c3_devs[] __initdata = {
601 {
602 I2C_BOARD_INFO("qt602240_ts", 0x4a),
603 .platform_data = &qt602240_platform_data,
604 },
605 };
606
607 static void __init universal_tsp_init(void)
608 {
609 int gpio;
610
611 /* TSP_LDO_ON: XMDMADDR_11 */
612 gpio = EXYNOS4_GPE2(3);
613 gpio_request(gpio, "TSP_LDO_ON");
614 gpio_direction_output(gpio, 1);
615 gpio_export(gpio, 0);
616
617 /* TSP_INT: XMDMADDR_7 */
618 gpio = EXYNOS4_GPE1(7);
619 gpio_request(gpio, "TSP_INT");
620
621 s5p_register_gpio_interrupt(gpio);
622 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
623 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
624 i2c3_devs[0].irq = gpio_to_irq(gpio);
625 }
626
627
628 /* GPIO I2C 12 (3 Touchkey) */
629 static uint32_t touchkey_keymap[] = {
630 /* MCS_KEY_MAP(value, keycode) */
631 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
632 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
633 };
634
635 static struct mcs_platform_data touchkey_data = {
636 .keymap = touchkey_keymap,
637 .keymap_size = ARRAY_SIZE(touchkey_keymap),
638 .key_maxval = 2,
639 };
640
641 /* GPIO I2C 3_TOUCH 2.8V */
642 #define I2C_GPIO_BUS_12 12
643 static struct i2c_gpio_platform_data i2c_gpio12_data = {
644 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
645 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
646 };
647
648 static struct platform_device i2c_gpio12 = {
649 .name = "i2c-gpio",
650 .id = I2C_GPIO_BUS_12,
651 .dev = {
652 .platform_data = &i2c_gpio12_data,
653 },
654 };
655
656 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
657 {
658 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
659 .platform_data = &touchkey_data,
660 },
661 };
662
663 static void __init universal_touchkey_init(void)
664 {
665 int gpio;
666
667 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
668 gpio_request(gpio, "3_TOUCH_INT");
669 s5p_register_gpio_interrupt(gpio);
670 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
671 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
672
673 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
674 gpio_request(gpio, "3_TOUCH_EN");
675 gpio_direction_output(gpio, 1);
676 }
677
678 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
679 .frequency = 300 * 1000,
680 .sda_delay = 200,
681 };
682
683 /* GPIO KEYS */
684 static struct gpio_keys_button universal_gpio_keys_tables[] = {
685 {
686 .code = KEY_VOLUMEUP,
687 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
688 .desc = "gpio-keys: KEY_VOLUMEUP",
689 .type = EV_KEY,
690 .active_low = 1,
691 .debounce_interval = 1,
692 }, {
693 .code = KEY_VOLUMEDOWN,
694 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
695 .desc = "gpio-keys: KEY_VOLUMEDOWN",
696 .type = EV_KEY,
697 .active_low = 1,
698 .debounce_interval = 1,
699 }, {
700 .code = KEY_CONFIG,
701 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
702 .desc = "gpio-keys: KEY_CONFIG",
703 .type = EV_KEY,
704 .active_low = 1,
705 .debounce_interval = 1,
706 }, {
707 .code = KEY_CAMERA,
708 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
709 .desc = "gpio-keys: KEY_CAMERA",
710 .type = EV_KEY,
711 .active_low = 1,
712 .debounce_interval = 1,
713 }, {
714 .code = KEY_OK,
715 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
716 .desc = "gpio-keys: KEY_OK",
717 .type = EV_KEY,
718 .active_low = 1,
719 .debounce_interval = 1,
720 },
721 };
722
723 static struct gpio_keys_platform_data universal_gpio_keys_data = {
724 .buttons = universal_gpio_keys_tables,
725 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
726 };
727
728 static struct platform_device universal_gpio_keys = {
729 .name = "gpio-keys",
730 .dev = {
731 .platform_data = &universal_gpio_keys_data,
732 },
733 };
734
735 /* eMMC */
736 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
737 .max_width = 8,
738 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
739 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
740 MMC_CAP_DISABLE),
741 .cd_type = S3C_SDHCI_CD_PERMANENT,
742 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
743 };
744
745 static struct regulator_consumer_supply mmc0_supplies[] = {
746 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
747 };
748
749 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
750 .constraints = {
751 .name = "VMEM_VDD_2.8V",
752 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
753 },
754 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
755 .consumer_supplies = mmc0_supplies,
756 };
757
758 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
759 .supply_name = "MASSMEMORY_EN",
760 .microvolts = 2800000,
761 .gpio = EXYNOS4_GPE1(3),
762 .enable_high = true,
763 .init_data = &mmc0_fixed_voltage_init_data,
764 };
765
766 static struct platform_device mmc0_fixed_voltage = {
767 .name = "reg-fixed-voltage",
768 .id = FIXED_REG_ID_MMC0,
769 .dev = {
770 .platform_data = &mmc0_fixed_voltage_config,
771 },
772 };
773
774 /* SD */
775 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
776 .max_width = 4,
777 .host_caps = MMC_CAP_4_BIT_DATA |
778 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
779 MMC_CAP_DISABLE,
780 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
781 .ext_cd_gpio_invert = 1,
782 .cd_type = S3C_SDHCI_CD_GPIO,
783 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
784 };
785
786 /* WiFi */
787 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
788 .max_width = 4,
789 .host_caps = MMC_CAP_4_BIT_DATA |
790 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
791 MMC_CAP_DISABLE,
792 .cd_type = S3C_SDHCI_CD_EXTERNAL,
793 };
794
795 static void __init universal_sdhci_init(void)
796 {
797 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
798 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
799 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
800 }
801
802 /* I2C1 */
803 static struct i2c_board_info i2c1_devs[] __initdata = {
804 /* Gyro, To be updated */
805 };
806
807 /* Frame Buffer */
808 static struct s3c_fb_pd_win universal_fb_win0 = {
809 .win_mode = {
810 .left_margin = 16,
811 .right_margin = 16,
812 .upper_margin = 2,
813 .lower_margin = 28,
814 .hsync_len = 2,
815 .vsync_len = 1,
816 .xres = 480,
817 .yres = 800,
818 .refresh = 55,
819 },
820 .max_bpp = 32,
821 .default_bpp = 16,
822 };
823
824 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
825 .win[0] = &universal_fb_win0,
826 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
827 VIDCON0_CLKSEL_LCD,
828 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
829 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
830 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
831 };
832
833 static struct regulator_consumer_supply cam_i_core_supply =
834 REGULATOR_SUPPLY("core", "0-001f");
835
836 static struct regulator_init_data cam_i_core_reg_init_data = {
837 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
838 .num_consumer_supplies = 1,
839 .consumer_supplies = &cam_i_core_supply,
840 };
841
842 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
843 .supply_name = "CAM_I_CORE_1.2V",
844 .microvolts = 1200000,
845 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
846 .enable_high = 1,
847 .init_data = &cam_i_core_reg_init_data,
848 };
849
850 static struct platform_device cam_i_core_fixed_reg_dev = {
851 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
852 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
853 };
854
855 static struct regulator_consumer_supply cam_s_if_supply =
856 REGULATOR_SUPPLY("d_sensor", "0-001f");
857
858 static struct regulator_init_data cam_s_if_reg_init_data = {
859 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
860 .num_consumer_supplies = 1,
861 .consumer_supplies = &cam_s_if_supply,
862 };
863
864 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
865 .supply_name = "CAM_S_IF_1.8V",
866 .microvolts = 1800000,
867 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
868 .enable_high = 1,
869 .init_data = &cam_s_if_reg_init_data,
870 };
871
872 static struct platform_device cam_s_if_fixed_reg_dev = {
873 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
874 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
875 };
876
877 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
878 .clk_rate = 166000000UL,
879 .lanes = 2,
880 .alignment = 32,
881 .hs_settle = 12,
882 .phy_enable = s5p_csis_phy_enable,
883 };
884
885 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
886 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
887 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
888
889 static int m5mols_set_power(struct device *dev, int on)
890 {
891 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
892 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
893 return 0;
894 }
895
896 static struct m5mols_platform_data m5mols_platdata = {
897 .gpio_reset = GPIO_CAM_MEGA_nRST,
898 .reset_polarity = 0,
899 .set_power = m5mols_set_power,
900 };
901
902 static struct i2c_board_info m5mols_board_info = {
903 I2C_BOARD_INFO("M5MOLS", 0x1F),
904 .platform_data = &m5mols_platdata,
905 };
906
907 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
908 {
909 .mux_id = 0,
910 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
911 V4L2_MBUS_VSYNC_ACTIVE_LOW,
912 .bus_type = FIMC_MIPI_CSI2,
913 .board_info = &m5mols_board_info,
914 .i2c_bus_num = 0,
915 .clk_frequency = 21600000UL,
916 .csi_data_align = 32,
917 },
918 };
919
920 static struct s5p_platform_fimc fimc_md_platdata = {
921 .isp_info = universal_camera_sensors,
922 .num_clients = ARRAY_SIZE(universal_camera_sensors),
923 };
924
925 static struct gpio universal_camera_gpios[] = {
926 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
927 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
928 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
929 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
930 };
931
932 static void universal_camera_init(void)
933 {
934 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
935 &s5p_device_mipi_csis0);
936 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
937 &s5p_device_fimc_md);
938
939 if (gpio_request_array(universal_camera_gpios,
940 ARRAY_SIZE(universal_camera_gpios))) {
941 pr_err("%s: GPIO request failed\n", __func__);
942 return;
943 }
944
945 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
946 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
947 else
948 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
949
950 /* Free GPIOs controlled directly by the sensor drivers. */
951 gpio_free(GPIO_CAM_MEGA_nRST);
952 gpio_free(GPIO_CAM_8M_ISP_INT);
953
954 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
955 pr_err("Camera port A setup failed\n");
956 }
957
958 static struct platform_device *universal_devices[] __initdata = {
959 /* Samsung Platform Devices */
960 &s5p_device_mipi_csis0,
961 &s5p_device_fimc0,
962 &s5p_device_fimc1,
963 &s5p_device_fimc2,
964 &s5p_device_fimc3,
965 &mmc0_fixed_voltage,
966 &s3c_device_hsmmc0,
967 &s3c_device_hsmmc2,
968 &s3c_device_hsmmc3,
969 &s3c_device_i2c0,
970 &s3c_device_i2c3,
971 &s3c_device_i2c5,
972 &s5p_device_i2c_hdmiphy,
973 &hdmi_fixed_voltage,
974 &exynos4_device_pd[PD_TV],
975 &s5p_device_hdmi,
976 &s5p_device_sdo,
977 &s5p_device_mixer,
978
979 /* Universal Devices */
980 &i2c_gpio12,
981 &universal_gpio_keys,
982 &s5p_device_onenand,
983 &s5p_device_fimd0,
984 &s5p_device_mfc,
985 &s5p_device_mfc_l,
986 &s5p_device_mfc_r,
987 &exynos4_device_pd[PD_MFC],
988 &exynos4_device_pd[PD_LCD0],
989 &exynos4_device_pd[PD_CAM],
990 &cam_i_core_fixed_reg_dev,
991 &cam_s_if_fixed_reg_dev,
992 &s5p_device_fimc_md,
993 };
994
995 static void __init universal_map_io(void)
996 {
997 exynos_init_io(NULL, 0);
998 s3c24xx_init_clocks(24000000);
999 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1000 }
1001
1002 void s5p_tv_setup(void)
1003 {
1004 /* direct HPD to HDMI chip */
1005 gpio_request(EXYNOS4_GPX3(7), "hpd-plug");
1006
1007 gpio_direction_input(EXYNOS4_GPX3(7));
1008 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1009 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1010
1011 /* setup dependencies between TV devices */
1012 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
1013 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
1014 }
1015
1016 static void __init universal_reserve(void)
1017 {
1018 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1019 }
1020
1021 static void __init universal_machine_init(void)
1022 {
1023 universal_sdhci_init();
1024 s5p_tv_setup();
1025
1026 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1027 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1028
1029 universal_tsp_init();
1030 s3c_i2c3_set_platdata(NULL);
1031 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1032
1033 s3c_i2c5_set_platdata(NULL);
1034 s5p_i2c_hdmiphy_set_platdata(NULL);
1035 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1036
1037 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1038
1039 universal_touchkey_init();
1040 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1041 ARRAY_SIZE(i2c_gpio12_devs));
1042
1043 universal_camera_init();
1044
1045 /* Last */
1046 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1047
1048 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
1049 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
1050
1051 s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1052 s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1053 s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1054 s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1055 s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1056 }
1057
1058 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1059 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1060 .atag_offset = 0x100,
1061 .init_irq = exynos4_init_irq,
1062 .map_io = universal_map_io,
1063 .handle_irq = gic_handle_irq,
1064 .init_machine = universal_machine_init,
1065 .timer = &exynos4_timer,
1066 .reserve = &universal_reserve,
1067 .restart = exynos4_restart,
1068 MACHINE_END