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1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/mfd/max8998.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/max8952.h>
22 #include <linux/mmc/host.h>
23 #include <linux/i2c-gpio.h>
24 #include <linux/i2c/mcs.h>
25 #include <linux/i2c/atmel_mxt_ts.h>
26
27 #include <asm/mach/arch.h>
28 #include <asm/hardware/gic.h>
29 #include <asm/mach-types.h>
30
31 #include <plat/regs-serial.h>
32 #include <plat/clock.h>
33 #include <plat/cpu.h>
34 #include <plat/devs.h>
35 #include <plat/iic.h>
36 #include <plat/gpio-cfg.h>
37 #include <plat/fb.h>
38 #include <plat/mfc.h>
39 #include <plat/sdhci.h>
40 #include <plat/pd.h>
41 #include <plat/regs-fb-v4.h>
42 #include <plat/fimc-core.h>
43 #include <plat/camport.h>
44 #include <plat/mipi_csis.h>
45
46 #include <mach/map.h>
47
48 #include <media/v4l2-mediabus.h>
49 #include <media/s5p_fimc.h>
50 #include <media/m5mols.h>
51 #include <media/s5k6aa.h>
52
53 #include "common.h"
54
55 /* Following are default values for UCON, ULCON and UFCON UART registers */
56 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
57 S3C2410_UCON_RXILEVEL | \
58 S3C2410_UCON_TXIRQMODE | \
59 S3C2410_UCON_RXIRQMODE | \
60 S3C2410_UCON_RXFIFO_TOI | \
61 S3C2443_UCON_RXERR_IRQEN)
62
63 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
64
65 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
66 S5PV210_UFCON_TXTRIG256 | \
67 S5PV210_UFCON_RXTRIG256)
68
69 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
70 [0] = {
71 .hwport = 0,
72 .ucon = UNIVERSAL_UCON_DEFAULT,
73 .ulcon = UNIVERSAL_ULCON_DEFAULT,
74 .ufcon = UNIVERSAL_UFCON_DEFAULT,
75 },
76 [1] = {
77 .hwport = 1,
78 .ucon = UNIVERSAL_UCON_DEFAULT,
79 .ulcon = UNIVERSAL_ULCON_DEFAULT,
80 .ufcon = UNIVERSAL_UFCON_DEFAULT,
81 },
82 [2] = {
83 .hwport = 2,
84 .ucon = UNIVERSAL_UCON_DEFAULT,
85 .ulcon = UNIVERSAL_ULCON_DEFAULT,
86 .ufcon = UNIVERSAL_UFCON_DEFAULT,
87 },
88 [3] = {
89 .hwport = 3,
90 .ucon = UNIVERSAL_UCON_DEFAULT,
91 .ulcon = UNIVERSAL_ULCON_DEFAULT,
92 .ufcon = UNIVERSAL_UFCON_DEFAULT,
93 },
94 };
95
96 static struct regulator_consumer_supply max8952_consumer =
97 REGULATOR_SUPPLY("vdd_arm", NULL);
98
99 static struct max8952_platform_data universal_max8952_pdata __initdata = {
100 .gpio_vid0 = EXYNOS4_GPX0(3),
101 .gpio_vid1 = EXYNOS4_GPX0(4),
102 .gpio_en = -1, /* Not controllable, set "Always High" */
103 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
104 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
105 .sync_freq = 0, /* default: fastest */
106 .ramp_speed = 0, /* default: fastest */
107
108 .reg_data = {
109 .constraints = {
110 .name = "VARM_1.2V",
111 .min_uV = 770000,
112 .max_uV = 1400000,
113 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
114 .always_on = 1,
115 .boot_on = 1,
116 },
117 .num_consumer_supplies = 1,
118 .consumer_supplies = &max8952_consumer,
119 },
120 };
121
122 static struct regulator_consumer_supply lp3974_buck1_consumer =
123 REGULATOR_SUPPLY("vdd_int", NULL);
124
125 static struct regulator_consumer_supply lp3974_buck2_consumer =
126 REGULATOR_SUPPLY("vddg3d", NULL);
127
128 static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
129 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
130 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
131 };
132
133 static struct regulator_init_data lp3974_buck1_data = {
134 .constraints = {
135 .name = "VINT_1.1V",
136 .min_uV = 750000,
137 .max_uV = 1500000,
138 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
139 REGULATOR_CHANGE_STATUS,
140 .boot_on = 1,
141 .state_mem = {
142 .disabled = 1,
143 },
144 },
145 .num_consumer_supplies = 1,
146 .consumer_supplies = &lp3974_buck1_consumer,
147 };
148
149 static struct regulator_init_data lp3974_buck2_data = {
150 .constraints = {
151 .name = "VG3D_1.1V",
152 .min_uV = 750000,
153 .max_uV = 1500000,
154 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
155 REGULATOR_CHANGE_STATUS,
156 .boot_on = 1,
157 .state_mem = {
158 .disabled = 1,
159 },
160 },
161 .num_consumer_supplies = 1,
162 .consumer_supplies = &lp3974_buck2_consumer,
163 };
164
165 static struct regulator_init_data lp3974_buck3_data = {
166 .constraints = {
167 .name = "VCC_1.8V",
168 .min_uV = 1800000,
169 .max_uV = 1800000,
170 .apply_uV = 1,
171 .always_on = 1,
172 .state_mem = {
173 .enabled = 1,
174 },
175 },
176 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
177 .consumer_supplies = lp3974_buck3_consumer,
178 };
179
180 static struct regulator_init_data lp3974_buck4_data = {
181 .constraints = {
182 .name = "VMEM_1.2V",
183 .min_uV = 1200000,
184 .max_uV = 1200000,
185 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
186 .apply_uV = 1,
187 .state_mem = {
188 .disabled = 1,
189 },
190 },
191 };
192
193 static struct regulator_init_data lp3974_ldo2_data = {
194 .constraints = {
195 .name = "VALIVE_1.2V",
196 .min_uV = 1200000,
197 .max_uV = 1200000,
198 .apply_uV = 1,
199 .always_on = 1,
200 .state_mem = {
201 .enabled = 1,
202 },
203 },
204 };
205
206 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
207 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
208 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
209 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
210 };
211
212 static struct regulator_init_data lp3974_ldo3_data = {
213 .constraints = {
214 .name = "VUSB+MIPI_1.1V",
215 .min_uV = 1100000,
216 .max_uV = 1100000,
217 .apply_uV = 1,
218 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
219 .state_mem = {
220 .disabled = 1,
221 },
222 },
223 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
224 .consumer_supplies = lp3974_ldo3_consumer,
225 };
226
227 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
228 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
229 };
230
231 static struct regulator_init_data lp3974_ldo4_data = {
232 .constraints = {
233 .name = "VADC_3.3V",
234 .min_uV = 3300000,
235 .max_uV = 3300000,
236 .apply_uV = 1,
237 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
238 .state_mem = {
239 .disabled = 1,
240 },
241 },
242 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
243 .consumer_supplies = lp3974_ldo4_consumer,
244 };
245
246 static struct regulator_init_data lp3974_ldo5_data = {
247 .constraints = {
248 .name = "VTF_2.8V",
249 .min_uV = 2800000,
250 .max_uV = 2800000,
251 .apply_uV = 1,
252 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
253 .state_mem = {
254 .disabled = 1,
255 },
256 },
257 };
258
259 static struct regulator_init_data lp3974_ldo6_data = {
260 .constraints = {
261 .name = "LDO6",
262 .min_uV = 2000000,
263 .max_uV = 2000000,
264 .apply_uV = 1,
265 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
266 .state_mem = {
267 .disabled = 1,
268 },
269 },
270 };
271
272 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
273 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
274 };
275
276 static struct regulator_init_data lp3974_ldo7_data = {
277 .constraints = {
278 .name = "VLCD+VMIPI_1.8V",
279 .min_uV = 1800000,
280 .max_uV = 1800000,
281 .apply_uV = 1,
282 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
283 .state_mem = {
284 .disabled = 1,
285 },
286 },
287 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
288 .consumer_supplies = lp3974_ldo7_consumer,
289 };
290
291 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
292 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
293 };
294
295 static struct regulator_init_data lp3974_ldo8_data = {
296 .constraints = {
297 .name = "VUSB+VDAC_3.3V",
298 .min_uV = 3300000,
299 .max_uV = 3300000,
300 .apply_uV = 1,
301 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
302 .state_mem = {
303 .disabled = 1,
304 },
305 },
306 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
307 .consumer_supplies = lp3974_ldo8_consumer,
308 };
309
310 static struct regulator_consumer_supply lp3974_ldo9_consumer =
311 REGULATOR_SUPPLY("vddio", "0-003c");
312
313 static struct regulator_init_data lp3974_ldo9_data = {
314 .constraints = {
315 .name = "VCC_2.8V",
316 .min_uV = 2800000,
317 .max_uV = 2800000,
318 .apply_uV = 1,
319 .always_on = 1,
320 .state_mem = {
321 .enabled = 1,
322 },
323 },
324 .num_consumer_supplies = 1,
325 .consumer_supplies = &lp3974_ldo9_consumer,
326 };
327
328 static struct regulator_init_data lp3974_ldo10_data = {
329 .constraints = {
330 .name = "VPLL_1.1V",
331 .min_uV = 1100000,
332 .max_uV = 1100000,
333 .boot_on = 1,
334 .apply_uV = 1,
335 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
336 .state_mem = {
337 .disabled = 1,
338 },
339 },
340 };
341
342 static struct regulator_consumer_supply lp3974_ldo11_consumer =
343 REGULATOR_SUPPLY("dig_28", "0-001f");
344
345 static struct regulator_init_data lp3974_ldo11_data = {
346 .constraints = {
347 .name = "CAM_AF_3.3V",
348 .min_uV = 3300000,
349 .max_uV = 3300000,
350 .apply_uV = 1,
351 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
352 .state_mem = {
353 .disabled = 1,
354 },
355 },
356 .num_consumer_supplies = 1,
357 .consumer_supplies = &lp3974_ldo11_consumer,
358 };
359
360 static struct regulator_init_data lp3974_ldo12_data = {
361 .constraints = {
362 .name = "PS_2.8V",
363 .min_uV = 2800000,
364 .max_uV = 2800000,
365 .apply_uV = 1,
366 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
367 .state_mem = {
368 .disabled = 1,
369 },
370 },
371 };
372
373 static struct regulator_init_data lp3974_ldo13_data = {
374 .constraints = {
375 .name = "VHIC_1.2V",
376 .min_uV = 1200000,
377 .max_uV = 1200000,
378 .apply_uV = 1,
379 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
380 .state_mem = {
381 .disabled = 1,
382 },
383 },
384 };
385
386 static struct regulator_consumer_supply lp3974_ldo14_consumer =
387 REGULATOR_SUPPLY("dig_18", "0-001f");
388
389 static struct regulator_init_data lp3974_ldo14_data = {
390 .constraints = {
391 .name = "CAM_I_HOST_1.8V",
392 .min_uV = 1800000,
393 .max_uV = 1800000,
394 .apply_uV = 1,
395 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
396 .state_mem = {
397 .disabled = 1,
398 },
399 },
400 .num_consumer_supplies = 1,
401 .consumer_supplies = &lp3974_ldo14_consumer,
402 };
403
404
405 static struct regulator_consumer_supply lp3974_ldo15_consumer =
406 REGULATOR_SUPPLY("dig_12", "0-001f");
407
408 static struct regulator_init_data lp3974_ldo15_data = {
409 .constraints = {
410 .name = "CAM_S_DIG+FM33_CORE_1.2V",
411 .min_uV = 1200000,
412 .max_uV = 1200000,
413 .apply_uV = 1,
414 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
415 .state_mem = {
416 .disabled = 1,
417 },
418 },
419 .num_consumer_supplies = 1,
420 .consumer_supplies = &lp3974_ldo15_consumer,
421 };
422
423 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
424 REGULATOR_SUPPLY("vdda", "0-003c"),
425 REGULATOR_SUPPLY("a_sensor", "0-001f"),
426 };
427
428 static struct regulator_init_data lp3974_ldo16_data = {
429 .constraints = {
430 .name = "CAM_S_ANA_2.8V",
431 .min_uV = 2800000,
432 .max_uV = 2800000,
433 .apply_uV = 1,
434 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
435 .state_mem = {
436 .disabled = 1,
437 },
438 },
439 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
440 .consumer_supplies = lp3974_ldo16_consumer,
441 };
442
443 static struct regulator_init_data lp3974_ldo17_data = {
444 .constraints = {
445 .name = "VCC_3.0V_LCD",
446 .min_uV = 3000000,
447 .max_uV = 3000000,
448 .apply_uV = 1,
449 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
450 .boot_on = 1,
451 .state_mem = {
452 .disabled = 1,
453 },
454 },
455 };
456
457 static struct regulator_init_data lp3974_32khz_ap_data = {
458 .constraints = {
459 .name = "32KHz AP",
460 .always_on = 1,
461 .state_mem = {
462 .enabled = 1,
463 },
464 },
465 };
466
467 static struct regulator_init_data lp3974_32khz_cp_data = {
468 .constraints = {
469 .name = "32KHz CP",
470 .state_mem = {
471 .disabled = 1,
472 },
473 },
474 };
475
476 static struct regulator_init_data lp3974_vichg_data = {
477 .constraints = {
478 .name = "VICHG",
479 .state_mem = {
480 .disabled = 1,
481 },
482 },
483 };
484
485 static struct regulator_init_data lp3974_esafeout1_data = {
486 .constraints = {
487 .name = "SAFEOUT1",
488 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
489 .state_mem = {
490 .enabled = 1,
491 },
492 },
493 };
494
495 static struct regulator_init_data lp3974_esafeout2_data = {
496 .constraints = {
497 .name = "SAFEOUT2",
498 .boot_on = 1,
499 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
500 .state_mem = {
501 .enabled = 1,
502 },
503 },
504 };
505
506 static struct max8998_regulator_data lp3974_regulators[] = {
507 { MAX8998_LDO2, &lp3974_ldo2_data },
508 { MAX8998_LDO3, &lp3974_ldo3_data },
509 { MAX8998_LDO4, &lp3974_ldo4_data },
510 { MAX8998_LDO5, &lp3974_ldo5_data },
511 { MAX8998_LDO6, &lp3974_ldo6_data },
512 { MAX8998_LDO7, &lp3974_ldo7_data },
513 { MAX8998_LDO8, &lp3974_ldo8_data },
514 { MAX8998_LDO9, &lp3974_ldo9_data },
515 { MAX8998_LDO10, &lp3974_ldo10_data },
516 { MAX8998_LDO11, &lp3974_ldo11_data },
517 { MAX8998_LDO12, &lp3974_ldo12_data },
518 { MAX8998_LDO13, &lp3974_ldo13_data },
519 { MAX8998_LDO14, &lp3974_ldo14_data },
520 { MAX8998_LDO15, &lp3974_ldo15_data },
521 { MAX8998_LDO16, &lp3974_ldo16_data },
522 { MAX8998_LDO17, &lp3974_ldo17_data },
523 { MAX8998_BUCK1, &lp3974_buck1_data },
524 { MAX8998_BUCK2, &lp3974_buck2_data },
525 { MAX8998_BUCK3, &lp3974_buck3_data },
526 { MAX8998_BUCK4, &lp3974_buck4_data },
527 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
528 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
529 { MAX8998_ENVICHG, &lp3974_vichg_data },
530 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
531 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
532 };
533
534 static struct max8998_platform_data universal_lp3974_pdata = {
535 .num_regulators = ARRAY_SIZE(lp3974_regulators),
536 .regulators = lp3974_regulators,
537 .buck1_voltage1 = 1100000, /* INT */
538 .buck1_voltage2 = 1000000,
539 .buck1_voltage3 = 1100000,
540 .buck1_voltage4 = 1000000,
541 .buck1_set1 = EXYNOS4_GPX0(5),
542 .buck1_set2 = EXYNOS4_GPX0(6),
543 .buck2_voltage1 = 1200000, /* G3D */
544 .buck2_voltage2 = 1100000,
545 .buck1_default_idx = 0,
546 .buck2_set3 = EXYNOS4_GPE2(0),
547 .buck2_default_idx = 0,
548 .wakeup = true,
549 };
550
551
552 enum fixed_regulator_id {
553 FIXED_REG_ID_MMC0,
554 FIXED_REG_ID_HDMI_5V,
555 FIXED_REG_ID_CAM_S_IF,
556 FIXED_REG_ID_CAM_I_CORE,
557 FIXED_REG_ID_CAM_VT_DIO,
558 };
559
560 static struct regulator_consumer_supply hdmi_fixed_consumer =
561 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
562
563 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
564 .constraints = {
565 .name = "HDMI_5V",
566 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
567 },
568 .num_consumer_supplies = 1,
569 .consumer_supplies = &hdmi_fixed_consumer,
570 };
571
572 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
573 .supply_name = "HDMI_EN1",
574 .microvolts = 5000000,
575 .gpio = EXYNOS4_GPE0(1),
576 .enable_high = true,
577 .init_data = &hdmi_fixed_voltage_init_data,
578 };
579
580 static struct platform_device hdmi_fixed_voltage = {
581 .name = "reg-fixed-voltage",
582 .id = FIXED_REG_ID_HDMI_5V,
583 .dev = {
584 .platform_data = &hdmi_fixed_voltage_config,
585 },
586 };
587
588 /* GPIO I2C 5 (PMIC) */
589 static struct i2c_board_info i2c5_devs[] __initdata = {
590 {
591 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
592 .platform_data = &universal_max8952_pdata,
593 }, {
594 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
595 .platform_data = &universal_lp3974_pdata,
596 },
597 };
598
599 /* I2C3 (TSP) */
600 static struct mxt_platform_data qt602240_platform_data = {
601 .x_line = 19,
602 .y_line = 11,
603 .x_size = 800,
604 .y_size = 480,
605 .blen = 0x11,
606 .threshold = 0x28,
607 .voltage = 2800000, /* 2.8V */
608 .orient = MXT_DIAGONAL,
609 .irqflags = IRQF_TRIGGER_FALLING,
610 };
611
612 static struct i2c_board_info i2c3_devs[] __initdata = {
613 {
614 I2C_BOARD_INFO("qt602240_ts", 0x4a),
615 .platform_data = &qt602240_platform_data,
616 },
617 };
618
619 static void __init universal_tsp_init(void)
620 {
621 int gpio;
622
623 /* TSP_LDO_ON: XMDMADDR_11 */
624 gpio = EXYNOS4_GPE2(3);
625 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
626 gpio_export(gpio, 0);
627
628 /* TSP_INT: XMDMADDR_7 */
629 gpio = EXYNOS4_GPE1(7);
630 gpio_request(gpio, "TSP_INT");
631
632 s5p_register_gpio_interrupt(gpio);
633 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
634 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
635 i2c3_devs[0].irq = gpio_to_irq(gpio);
636 }
637
638
639 /* GPIO I2C 12 (3 Touchkey) */
640 static uint32_t touchkey_keymap[] = {
641 /* MCS_KEY_MAP(value, keycode) */
642 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
643 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
644 };
645
646 static struct mcs_platform_data touchkey_data = {
647 .keymap = touchkey_keymap,
648 .keymap_size = ARRAY_SIZE(touchkey_keymap),
649 .key_maxval = 2,
650 };
651
652 /* GPIO I2C 3_TOUCH 2.8V */
653 #define I2C_GPIO_BUS_12 12
654 static struct i2c_gpio_platform_data i2c_gpio12_data = {
655 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
656 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
657 };
658
659 static struct platform_device i2c_gpio12 = {
660 .name = "i2c-gpio",
661 .id = I2C_GPIO_BUS_12,
662 .dev = {
663 .platform_data = &i2c_gpio12_data,
664 },
665 };
666
667 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
668 {
669 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
670 .platform_data = &touchkey_data,
671 },
672 };
673
674 static void __init universal_touchkey_init(void)
675 {
676 int gpio;
677
678 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
679 gpio_request(gpio, "3_TOUCH_INT");
680 s5p_register_gpio_interrupt(gpio);
681 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
682 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
683
684 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
685 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
686 }
687
688 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
689 .frequency = 300 * 1000,
690 .sda_delay = 200,
691 };
692
693 /* GPIO KEYS */
694 static struct gpio_keys_button universal_gpio_keys_tables[] = {
695 {
696 .code = KEY_VOLUMEUP,
697 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
698 .desc = "gpio-keys: KEY_VOLUMEUP",
699 .type = EV_KEY,
700 .active_low = 1,
701 .debounce_interval = 1,
702 }, {
703 .code = KEY_VOLUMEDOWN,
704 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
705 .desc = "gpio-keys: KEY_VOLUMEDOWN",
706 .type = EV_KEY,
707 .active_low = 1,
708 .debounce_interval = 1,
709 }, {
710 .code = KEY_CONFIG,
711 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
712 .desc = "gpio-keys: KEY_CONFIG",
713 .type = EV_KEY,
714 .active_low = 1,
715 .debounce_interval = 1,
716 }, {
717 .code = KEY_CAMERA,
718 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
719 .desc = "gpio-keys: KEY_CAMERA",
720 .type = EV_KEY,
721 .active_low = 1,
722 .debounce_interval = 1,
723 }, {
724 .code = KEY_OK,
725 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
726 .desc = "gpio-keys: KEY_OK",
727 .type = EV_KEY,
728 .active_low = 1,
729 .debounce_interval = 1,
730 },
731 };
732
733 static struct gpio_keys_platform_data universal_gpio_keys_data = {
734 .buttons = universal_gpio_keys_tables,
735 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
736 };
737
738 static struct platform_device universal_gpio_keys = {
739 .name = "gpio-keys",
740 .dev = {
741 .platform_data = &universal_gpio_keys_data,
742 },
743 };
744
745 /* eMMC */
746 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
747 .max_width = 8,
748 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
749 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
750 .cd_type = S3C_SDHCI_CD_PERMANENT,
751 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
752 };
753
754 static struct regulator_consumer_supply mmc0_supplies[] = {
755 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
756 };
757
758 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
759 .constraints = {
760 .name = "VMEM_VDD_2.8V",
761 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
762 },
763 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
764 .consumer_supplies = mmc0_supplies,
765 };
766
767 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
768 .supply_name = "MASSMEMORY_EN",
769 .microvolts = 2800000,
770 .gpio = EXYNOS4_GPE1(3),
771 .enable_high = true,
772 .init_data = &mmc0_fixed_voltage_init_data,
773 };
774
775 static struct platform_device mmc0_fixed_voltage = {
776 .name = "reg-fixed-voltage",
777 .id = FIXED_REG_ID_MMC0,
778 .dev = {
779 .platform_data = &mmc0_fixed_voltage_config,
780 },
781 };
782
783 /* SD */
784 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
785 .max_width = 4,
786 .host_caps = MMC_CAP_4_BIT_DATA |
787 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
788 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
789 .ext_cd_gpio_invert = 1,
790 .cd_type = S3C_SDHCI_CD_GPIO,
791 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
792 };
793
794 /* WiFi */
795 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
796 .max_width = 4,
797 .host_caps = MMC_CAP_4_BIT_DATA |
798 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
799 .cd_type = S3C_SDHCI_CD_EXTERNAL,
800 };
801
802 static void __init universal_sdhci_init(void)
803 {
804 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
805 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
806 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
807 }
808
809 /* I2C1 */
810 static struct i2c_board_info i2c1_devs[] __initdata = {
811 /* Gyro, To be updated */
812 };
813
814 /* Frame Buffer */
815 static struct s3c_fb_pd_win universal_fb_win0 = {
816 .max_bpp = 32,
817 .default_bpp = 16,
818 .xres = 480,
819 .yres = 800,
820 .virtual_x = 480,
821 .virtual_y = 2 * 800,
822 };
823
824 static struct fb_videomode universal_lcd_timing = {
825 .left_margin = 16,
826 .right_margin = 16,
827 .upper_margin = 2,
828 .lower_margin = 28,
829 .hsync_len = 2,
830 .vsync_len = 1,
831 .xres = 480,
832 .yres = 800,
833 .refresh = 55,
834 };
835
836 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
837 .win[0] = &universal_fb_win0,
838 .vtiming = &universal_lcd_timing,
839 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
840 VIDCON0_CLKSEL_LCD,
841 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
842 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
843 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
844 };
845
846 static struct regulator_consumer_supply cam_vt_dio_supply =
847 REGULATOR_SUPPLY("vdd_core", "0-003c");
848
849 static struct regulator_init_data cam_vt_dio_reg_init_data = {
850 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
851 .num_consumer_supplies = 1,
852 .consumer_supplies = &cam_vt_dio_supply,
853 };
854
855 static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
856 .supply_name = "CAM_VT_D_IO",
857 .microvolts = 2800000,
858 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
859 .enable_high = 1,
860 .init_data = &cam_vt_dio_reg_init_data,
861 };
862
863 static struct platform_device cam_vt_dio_fixed_reg_dev = {
864 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
865 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
866 };
867
868 static struct regulator_consumer_supply cam_i_core_supply =
869 REGULATOR_SUPPLY("core", "0-001f");
870
871 static struct regulator_init_data cam_i_core_reg_init_data = {
872 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
873 .num_consumer_supplies = 1,
874 .consumer_supplies = &cam_i_core_supply,
875 };
876
877 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
878 .supply_name = "CAM_I_CORE_1.2V",
879 .microvolts = 1200000,
880 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
881 .enable_high = 1,
882 .init_data = &cam_i_core_reg_init_data,
883 };
884
885 static struct platform_device cam_i_core_fixed_reg_dev = {
886 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
887 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
888 };
889
890 static struct regulator_consumer_supply cam_s_if_supply =
891 REGULATOR_SUPPLY("d_sensor", "0-001f");
892
893 static struct regulator_init_data cam_s_if_reg_init_data = {
894 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
895 .num_consumer_supplies = 1,
896 .consumer_supplies = &cam_s_if_supply,
897 };
898
899 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
900 .supply_name = "CAM_S_IF_1.8V",
901 .microvolts = 1800000,
902 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
903 .enable_high = 1,
904 .init_data = &cam_s_if_reg_init_data,
905 };
906
907 static struct platform_device cam_s_if_fixed_reg_dev = {
908 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
909 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
910 };
911
912 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
913 .clk_rate = 166000000UL,
914 .lanes = 2,
915 .alignment = 32,
916 .hs_settle = 12,
917 .phy_enable = s5p_csis_phy_enable,
918 };
919
920 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
921 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
922 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
923 #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
924 #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
925
926 static int s5k6aa_set_power(int on)
927 {
928 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
929 return 0;
930 }
931
932 static struct s5k6aa_platform_data s5k6aa_platdata = {
933 .mclk_frequency = 21600000UL,
934 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
935 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
936 .bus_type = V4L2_MBUS_PARALLEL,
937 .horiz_flip = 1,
938 .set_power = s5k6aa_set_power,
939 };
940
941 static struct i2c_board_info s5k6aa_board_info = {
942 I2C_BOARD_INFO("S5K6AA", 0x3C),
943 .platform_data = &s5k6aa_platdata,
944 };
945
946 static int m5mols_set_power(struct device *dev, int on)
947 {
948 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
949 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
950 return 0;
951 }
952
953 static struct m5mols_platform_data m5mols_platdata = {
954 .gpio_reset = GPIO_CAM_MEGA_nRST,
955 .reset_polarity = 0,
956 .set_power = m5mols_set_power,
957 };
958
959 static struct i2c_board_info m5mols_board_info = {
960 I2C_BOARD_INFO("M5MOLS", 0x1F),
961 .platform_data = &m5mols_platdata,
962 };
963
964 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
965 {
966 .mux_id = 0,
967 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
968 V4L2_MBUS_VSYNC_ACTIVE_LOW,
969 .bus_type = FIMC_ITU_601,
970 .board_info = &s5k6aa_board_info,
971 .i2c_bus_num = 0,
972 .clk_frequency = 24000000UL,
973 }, {
974 .mux_id = 0,
975 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
976 V4L2_MBUS_VSYNC_ACTIVE_LOW,
977 .bus_type = FIMC_MIPI_CSI2,
978 .board_info = &m5mols_board_info,
979 .i2c_bus_num = 0,
980 .clk_frequency = 24000000UL,
981 .csi_data_align = 32,
982 },
983 };
984
985 static struct s5p_platform_fimc fimc_md_platdata = {
986 .isp_info = universal_camera_sensors,
987 .num_clients = ARRAY_SIZE(universal_camera_sensors),
988 };
989
990 static struct gpio universal_camera_gpios[] = {
991 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
992 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
993 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
994 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
995 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
996 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
997 };
998
999 static void __init universal_camera_init(void)
1000 {
1001 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1002 &s5p_device_mipi_csis0);
1003 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1004 &s5p_device_fimc_md);
1005
1006 if (gpio_request_array(universal_camera_gpios,
1007 ARRAY_SIZE(universal_camera_gpios))) {
1008 pr_err("%s: GPIO request failed\n", __func__);
1009 return;
1010 }
1011
1012 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1013 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1014 else
1015 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1016
1017 /* Free GPIOs controlled directly by the sensor drivers. */
1018 gpio_free(GPIO_CAM_MEGA_nRST);
1019 gpio_free(GPIO_CAM_8M_ISP_INT);
1020 gpio_free(GPIO_CAM_VGA_NRST);
1021 gpio_free(GPIO_CAM_VGA_NSTBY);
1022
1023 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1024 pr_err("Camera port A setup failed\n");
1025 }
1026
1027 static struct platform_device *universal_devices[] __initdata = {
1028 /* Samsung Platform Devices */
1029 &s5p_device_mipi_csis0,
1030 &s5p_device_fimc0,
1031 &s5p_device_fimc1,
1032 &s5p_device_fimc2,
1033 &s5p_device_fimc3,
1034 &s5p_device_g2d,
1035 &mmc0_fixed_voltage,
1036 &s3c_device_hsmmc0,
1037 &s3c_device_hsmmc2,
1038 &s3c_device_hsmmc3,
1039 &s3c_device_i2c0,
1040 &s3c_device_i2c3,
1041 &s3c_device_i2c5,
1042 &s5p_device_i2c_hdmiphy,
1043 &hdmi_fixed_voltage,
1044 &s5p_device_hdmi,
1045 &s5p_device_sdo,
1046 &s5p_device_mixer,
1047
1048 /* Universal Devices */
1049 &i2c_gpio12,
1050 &universal_gpio_keys,
1051 &s5p_device_onenand,
1052 &s5p_device_fimd0,
1053 &s5p_device_jpeg,
1054 &s5p_device_mfc,
1055 &s5p_device_mfc_l,
1056 &s5p_device_mfc_r,
1057 &cam_vt_dio_fixed_reg_dev,
1058 &cam_i_core_fixed_reg_dev,
1059 &cam_s_if_fixed_reg_dev,
1060 &s5p_device_fimc_md,
1061 };
1062
1063 static void __init universal_map_io(void)
1064 {
1065 clk_xusbxti.rate = 24000000;
1066 exynos_init_io(NULL, 0);
1067 s3c24xx_init_clocks(24000000);
1068 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1069 }
1070
1071 static void s5p_tv_setup(void)
1072 {
1073 /* direct HPD to HDMI chip */
1074 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1075 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1076 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1077 }
1078
1079 static void __init universal_reserve(void)
1080 {
1081 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1082 }
1083
1084 static void __init universal_machine_init(void)
1085 {
1086 universal_sdhci_init();
1087 s5p_tv_setup();
1088
1089 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1090 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1091
1092 universal_tsp_init();
1093 s3c_i2c3_set_platdata(NULL);
1094 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1095
1096 s3c_i2c5_set_platdata(NULL);
1097 s5p_i2c_hdmiphy_set_platdata(NULL);
1098 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1099
1100 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1101
1102 universal_touchkey_init();
1103 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1104 ARRAY_SIZE(i2c_gpio12_devs));
1105
1106 universal_camera_init();
1107
1108 /* Last */
1109 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1110 }
1111
1112 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1113 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1114 .atag_offset = 0x100,
1115 .init_irq = exynos4_init_irq,
1116 .map_io = universal_map_io,
1117 .handle_irq = gic_handle_irq,
1118 .init_machine = universal_machine_init,
1119 .timer = &exynos4_timer,
1120 .reserve = &universal_reserve,
1121 .restart = exynos4_restart,
1122 MACHINE_END