3 * Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
5 * based on code for MX31ADS,
6 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
8 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 #include <linux/gpio.h>
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/serial_8250.h>
25 #include <linux/smsc911x.h>
26 #include <linux/types.h>
27 #include <linux/regulator/machine.h>
28 #include <linux/regulator/fixed.h>
31 #include <asm/mach-types.h>
32 #include <asm/memory.h>
33 #include <asm/setup.h>
34 #include <asm/mach/arch.h>
35 #include <asm/mach/irq.h>
36 #include <asm/mach/map.h>
37 #include <asm/mach/time.h>
39 #include <mach/hardware.h>
42 #include "devices-imx31.h"
43 #include "iomux-mx3.h"
45 #define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
46 IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
47 IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \
51 * KZM-ARM11-01 Board Control Registers on FPGA
53 #define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
54 #define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
55 #define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
56 #define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
57 #define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
58 #define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
59 #define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
60 #define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
63 * External UART for touch panel on FPGA
65 #define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
67 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
69 * KZM-ARM11-01 has an external UART on FPGA
71 static struct plat_serial8250_port serial_platform_data
[] = {
73 .membase
= KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550
),
74 .mapbase
= KZM_ARM11_16550
,
75 /* irq number is run-time assigned */
76 .irqflags
= IRQ_TYPE_EDGE_RISING
,
80 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
|
86 static struct resource serial8250_resources
[] = {
88 .start
= KZM_ARM11_16550
,
89 .end
= KZM_ARM11_16550
+ 0x10,
90 .flags
= IORESOURCE_MEM
,
93 /* irq number is run-time assigned */
94 .flags
= IORESOURCE_IRQ
,
98 static struct platform_device serial_device
= {
100 .id
= PLAT8250_DEV_PLATFORM
,
102 .platform_data
= serial_platform_data
,
104 .num_resources
= ARRAY_SIZE(serial8250_resources
),
105 .resource
= serial8250_resources
,
108 static int __init
kzm_init_ext_uart(void)
113 * GPIO 1-1: external UART interrupt line
115 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1
, IOMUX_CONFIG_GPIO
));
116 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1
), "ext-uart-int");
117 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1
));
120 * Unmask UART interrupt
122 tmp
= __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1
));
124 __raw_writeb(tmp
, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1
));
126 serial_platform_data
[0].irq
=
127 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1
));
128 serial8250_resources
[1].start
=
129 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1
));
130 serial8250_resources
[1].end
=
131 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1
));
133 return platform_device_register(&serial_device
);
136 static inline int kzm_init_ext_uart(void)
145 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
146 static struct smsc911x_platform_config kzm_smsc9118_config
= {
147 .phy_interface
= PHY_INTERFACE_MODE_MII
,
148 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
,
149 .irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
,
150 .flags
= SMSC911X_USE_32BIT
| SMSC911X_SAVE_MAC_ADDRESS
,
153 static struct resource kzm_smsc9118_resources
[] = {
155 .start
= MX31_CS5_BASE_ADDR
,
156 .end
= MX31_CS5_BASE_ADDR
+ SZ_128K
- 1,
157 .flags
= IORESOURCE_MEM
,
160 /* irq number is run-time assigned */
161 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHEDGE
,
165 static struct platform_device kzm_smsc9118_device
= {
168 .num_resources
= ARRAY_SIZE(kzm_smsc9118_resources
),
169 .resource
= kzm_smsc9118_resources
,
171 .platform_data
= &kzm_smsc9118_config
,
175 static struct regulator_consumer_supply dummy_supplies
[] = {
176 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
177 REGULATOR_SUPPLY("vddvario", "smsc911x"),
180 static int __init
kzm_init_smsc9118(void)
183 * GPIO 1-2: SMSC9118 interrupt line
185 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2
, IOMUX_CONFIG_GPIO
));
186 gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2
), "smsc9118-int");
187 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2
));
189 regulator_register_fixed(0, dummy_supplies
, ARRAY_SIZE(dummy_supplies
));
191 kzm_smsc9118_resources
[1].start
=
192 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2
));
193 kzm_smsc9118_resources
[1].end
=
194 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2
));
196 return platform_device_register(&kzm_smsc9118_device
);
199 static inline int kzm_init_smsc9118(void)
205 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
206 static const struct imxuart_platform_data uart_pdata __initconst
= {
207 .flags
= IMXUART_HAVE_RTSCTS
,
210 static void __init
kzm_init_imx_uart(void)
212 imx31_add_imx_uart0(&uart_pdata
);
213 imx31_add_imx_uart1(&uart_pdata
);
216 static inline void kzm_init_imx_uart(void)
221 static int kzm_pins
[] __initdata
= {
226 MX31_PIN_DCD_DCE1__DCD_DCE1
,
227 MX31_PIN_RI_DCE1__RI_DCE1
,
228 MX31_PIN_DSR_DCE1__DSR_DCE1
,
229 MX31_PIN_DTR_DCE1__DTR_DCE1
,
234 MX31_PIN_DCD_DTE1__DCD_DTE2
,
235 MX31_PIN_RI_DTE1__RI_DTE2
,
236 MX31_PIN_DSR_DTE1__DSR_DTE2
,
237 MX31_PIN_DTR_DTE1__DTR_DTE2
,
241 * Board specific initialization.
243 static void __init
kzm_board_init(void)
247 mxc_iomux_setup_multiple_pins(kzm_pins
,
248 ARRAY_SIZE(kzm_pins
), "kzm");
253 pr_info("Clock input source is 26MHz\n");
257 * This structure defines static mappings for the kzm-arm11-01 board.
259 static struct map_desc kzm_io_desc
[] __initdata
= {
261 .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT
,
262 .pfn
= __phys_to_pfn(MX31_CS4_BASE_ADDR
),
263 .length
= MX31_CS4_SIZE
,
267 .virtual = (unsigned long)MX31_CS5_BASE_ADDR_VIRT
,
268 .pfn
= __phys_to_pfn(MX31_CS5_BASE_ADDR
),
269 .length
= MX31_CS5_SIZE
,
275 * Set up static virtual mappings.
277 static void __init
kzm_map_io(void)
280 iotable_init(kzm_io_desc
, ARRAY_SIZE(kzm_io_desc
));
283 static void __init
kzm_timer_init(void)
285 mx31_clocks_init(26000000);
288 static struct sys_timer kzm_timer
= {
289 .init
= kzm_timer_init
,
292 MACHINE_START(KZM_ARM11_01
, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
293 .atag_offset
= 0x100,
294 .map_io
= kzm_map_io
,
295 .init_early
= imx31_init_early
,
296 .init_irq
= mx31_init_irq
,
297 .handle_irq
= imx31_handle_irq
,
299 .init_machine
= kzm_board_init
,
300 .restart
= mxc_restart
,