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Merge branch 'next/devel' of git://git.linaro.org/people/arnd/arm-soc
[mirror_ubuntu-jammy-kernel.git] / arch / arm / mach-imx / mach-pca100.c
1 /*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/i2c.h>
23 #include <linux/i2c/at24.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/eeprom.h>
27 #include <linux/irq.h>
28 #include <linux/delay.h>
29 #include <linux/gpio.h>
30 #include <linux/usb/otg.h>
31 #include <linux/usb/ulpi.h>
32
33 #include <asm/mach/arch.h>
34 #include <asm/mach-types.h>
35 #include <mach/common.h>
36 #include <mach/hardware.h>
37 #include <mach/iomux-mx27.h>
38 #include <asm/mach/time.h>
39 #include <mach/audmux.h>
40 #include <mach/irqs.h>
41 #include <mach/ulpi.h>
42
43 #include "devices-imx27.h"
44
45 #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
46 #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
47 #define SPI1_SS0 (GPIO_PORTD + 28)
48 #define SPI1_SS1 (GPIO_PORTD + 27)
49 #define SD2_CD (GPIO_PORTC + 29)
50
51 static const int pca100_pins[] __initconst = {
52 /* UART1 */
53 PE12_PF_UART1_TXD,
54 PE13_PF_UART1_RXD,
55 PE14_PF_UART1_CTS,
56 PE15_PF_UART1_RTS,
57 /* SDHC */
58 PB4_PF_SD2_D0,
59 PB5_PF_SD2_D1,
60 PB6_PF_SD2_D2,
61 PB7_PF_SD2_D3,
62 PB8_PF_SD2_CMD,
63 PB9_PF_SD2_CLK,
64 SD2_CD | GPIO_GPIO | GPIO_IN,
65 /* FEC */
66 PD0_AIN_FEC_TXD0,
67 PD1_AIN_FEC_TXD1,
68 PD2_AIN_FEC_TXD2,
69 PD3_AIN_FEC_TXD3,
70 PD4_AOUT_FEC_RX_ER,
71 PD5_AOUT_FEC_RXD1,
72 PD6_AOUT_FEC_RXD2,
73 PD7_AOUT_FEC_RXD3,
74 PD8_AF_FEC_MDIO,
75 PD9_AIN_FEC_MDC,
76 PD10_AOUT_FEC_CRS,
77 PD11_AOUT_FEC_TX_CLK,
78 PD12_AOUT_FEC_RXD0,
79 PD13_AOUT_FEC_RX_DV,
80 PD14_AOUT_FEC_RX_CLK,
81 PD15_AOUT_FEC_COL,
82 PD16_AIN_FEC_TX_ER,
83 PF23_AIN_FEC_TX_EN,
84 /* SSI1 */
85 PC20_PF_SSI1_FS,
86 PC21_PF_SSI1_RXD,
87 PC22_PF_SSI1_TXD,
88 PC23_PF_SSI1_CLK,
89 /* onboard I2C */
90 PC5_PF_I2C2_SDA,
91 PC6_PF_I2C2_SCL,
92 /* external I2C */
93 PD17_PF_I2C_DATA,
94 PD18_PF_I2C_CLK,
95 /* SPI1 */
96 PD25_PF_CSPI1_RDY,
97 PD29_PF_CSPI1_SCLK,
98 PD30_PF_CSPI1_MISO,
99 PD31_PF_CSPI1_MOSI,
100 /* OTG */
101 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
102 PC7_PF_USBOTG_DATA5,
103 PC8_PF_USBOTG_DATA6,
104 PC9_PF_USBOTG_DATA0,
105 PC10_PF_USBOTG_DATA2,
106 PC11_PF_USBOTG_DATA1,
107 PC12_PF_USBOTG_DATA4,
108 PC13_PF_USBOTG_DATA3,
109 PE0_PF_USBOTG_NXT,
110 PE1_PF_USBOTG_STP,
111 PE2_PF_USBOTG_DIR,
112 PE24_PF_USBOTG_CLK,
113 PE25_PF_USBOTG_DATA7,
114 /* USBH2 */
115 USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
116 PA0_PF_USBH2_CLK,
117 PA1_PF_USBH2_DIR,
118 PA2_PF_USBH2_DATA7,
119 PA3_PF_USBH2_NXT,
120 PA4_PF_USBH2_STP,
121 PD19_AF_USBH2_DATA4,
122 PD20_AF_USBH2_DATA3,
123 PD21_AF_USBH2_DATA6,
124 PD22_AF_USBH2_DATA0,
125 PD23_AF_USBH2_DATA2,
126 PD24_AF_USBH2_DATA1,
127 PD26_AF_USBH2_DATA5,
128 /* display */
129 PA5_PF_LSCLK,
130 PA6_PF_LD0,
131 PA7_PF_LD1,
132 PA8_PF_LD2,
133 PA9_PF_LD3,
134 PA10_PF_LD4,
135 PA11_PF_LD5,
136 PA12_PF_LD6,
137 PA13_PF_LD7,
138 PA14_PF_LD8,
139 PA15_PF_LD9,
140 PA16_PF_LD10,
141 PA17_PF_LD11,
142 PA18_PF_LD12,
143 PA19_PF_LD13,
144 PA20_PF_LD14,
145 PA21_PF_LD15,
146 PA22_PF_LD16,
147 PA23_PF_LD17,
148 PA26_PF_PS,
149 PA28_PF_HSYNC,
150 PA29_PF_VSYNC,
151 PA31_PF_OE_ACD,
152 /* free GPIO */
153 GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
154 GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
155 GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
156 };
157
158 static const struct imxuart_platform_data uart_pdata __initconst = {
159 .flags = IMXUART_HAVE_RTSCTS,
160 };
161
162 static const struct mxc_nand_platform_data
163 pca100_nand_board_info __initconst = {
164 .width = 1,
165 .hw_ecc = 1,
166 };
167
168 static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
169 .bitrate = 100000,
170 };
171
172 static struct at24_platform_data board_eeprom = {
173 .byte_len = 4096,
174 .page_size = 32,
175 .flags = AT24_FLAG_ADDR16,
176 };
177
178 static struct i2c_board_info pca100_i2c_devices[] = {
179 {
180 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
181 .platform_data = &board_eeprom,
182 }, {
183 I2C_BOARD_INFO("pcf8563", 0x51),
184 }, {
185 I2C_BOARD_INFO("lm75", 0x4a),
186 }
187 };
188
189 static struct spi_eeprom at25320 = {
190 .name = "at25320an",
191 .byte_len = 4096,
192 .page_size = 32,
193 .flags = EE_ADDR2,
194 };
195
196 static struct spi_board_info pca100_spi_board_info[] __initdata = {
197 {
198 .modalias = "at25",
199 .max_speed_hz = 30000,
200 .bus_num = 0,
201 .chip_select = 1,
202 .platform_data = &at25320,
203 },
204 };
205
206 static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
207
208 static const struct spi_imx_master pca100_spi0_data __initconst = {
209 .chipselect = pca100_spi_cs,
210 .num_chipselect = ARRAY_SIZE(pca100_spi_cs),
211 };
212
213 static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
214 {
215 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
216 gpio_set_value(GPIO_PORTC + 20, 1);
217 udelay(2);
218 gpio_set_value(GPIO_PORTC + 20, 0);
219 mxc_gpio_mode(PC20_PF_SSI1_FS);
220 msleep(2);
221 }
222
223 static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
224 {
225 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
226 gpio_set_value(GPIO_PORTC + 20, 0);
227 mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
228 gpio_set_value(GPIO_PORTC + 22, 0);
229 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
230 gpio_set_value(GPIO_PORTC + 28, 0);
231 udelay(10);
232 gpio_set_value(GPIO_PORTC + 28, 1);
233 mxc_gpio_mode(PC20_PF_SSI1_FS);
234 mxc_gpio_mode(PC22_PF_SSI1_TXD);
235 msleep(2);
236 }
237
238 static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
239 .ac97_reset = pca100_ac97_cold_reset,
240 .ac97_warm_reset = pca100_ac97_warm_reset,
241 .flags = IMX_SSI_USE_AC97,
242 };
243
244 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
245 void *data)
246 {
247 int ret;
248
249 ret = request_irq(IRQ_GPIOC(29), detect_irq,
250 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
251 "imx-mmc-detect", data);
252 if (ret)
253 printk(KERN_ERR
254 "pca100: Failed to reuest irq for sd/mmc detection\n");
255
256 return ret;
257 }
258
259 static void pca100_sdhc2_exit(struct device *dev, void *data)
260 {
261 free_irq(IRQ_GPIOC(29), data);
262 }
263
264 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
265 .init = pca100_sdhc2_init,
266 .exit = pca100_sdhc2_exit,
267 };
268
269 static int otg_phy_init(struct platform_device *pdev)
270 {
271 gpio_set_value(OTG_PHY_CS_GPIO, 0);
272
273 mdelay(10);
274
275 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
276 }
277
278 static struct mxc_usbh_platform_data otg_pdata __initdata = {
279 .init = otg_phy_init,
280 .portsc = MXC_EHCI_MODE_ULPI,
281 };
282
283 static int usbh2_phy_init(struct platform_device *pdev)
284 {
285 gpio_set_value(USBH2_PHY_CS_GPIO, 0);
286
287 mdelay(10);
288
289 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
290 }
291
292 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
293 .init = usbh2_phy_init,
294 .portsc = MXC_EHCI_MODE_ULPI,
295 };
296
297 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
298 .operating_mode = FSL_USB2_DR_DEVICE,
299 .phy_mode = FSL_USB2_PHY_ULPI,
300 };
301
302 static int otg_mode_host;
303
304 static int __init pca100_otg_mode(char *options)
305 {
306 if (!strcmp(options, "host"))
307 otg_mode_host = 1;
308 else if (!strcmp(options, "device"))
309 otg_mode_host = 0;
310 else
311 pr_info("otg_mode neither \"host\" nor \"device\". "
312 "Defaulting to device\n");
313 return 0;
314 }
315 __setup("otg_mode=", pca100_otg_mode);
316
317 /* framebuffer info */
318 static struct imx_fb_videomode pca100_fb_modes[] = {
319 {
320 .mode = {
321 .name = "EMERGING-ETV570G0DHU",
322 .refresh = 60,
323 .xres = 640,
324 .yres = 480,
325 .pixclock = 39722, /* in ps (25.175 MHz) */
326 .hsync_len = 30,
327 .left_margin = 114,
328 .right_margin = 16,
329 .vsync_len = 3,
330 .upper_margin = 32,
331 .lower_margin = 0,
332 },
333 /*
334 * TFT
335 * Pixel pol active high
336 * HSYNC active low
337 * VSYNC active low
338 * use HSYNC for ACD count
339 * line clock disable while idle
340 * always enable line clock even if no data
341 */
342 .pcr = 0xf0c08080,
343 .bpp = 16,
344 },
345 };
346
347 static const struct imx_fb_platform_data pca100_fb_data __initconst = {
348 .mode = pca100_fb_modes,
349 .num_modes = ARRAY_SIZE(pca100_fb_modes),
350
351 .pwmr = 0x00A903FF,
352 .lscr1 = 0x00120300,
353 .dmacr = 0x00020010,
354 };
355
356 static void __init pca100_init(void)
357 {
358 int ret;
359
360 imx27_soc_init();
361
362 /* SSI unit */
363 mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
364 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
365 MXC_AUDMUX_V1_PCR_TFCSEL(3) |
366 MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
367 MXC_AUDMUX_V1_PCR_RXDSEL(3));
368 mxc_audmux_v1_configure_port(3,
369 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
370 MXC_AUDMUX_V1_PCR_TFCSEL(0) |
371 MXC_AUDMUX_V1_PCR_TFSDIR |
372 MXC_AUDMUX_V1_PCR_RXDSEL(0));
373
374 ret = mxc_gpio_setup_multiple_pins(pca100_pins,
375 ARRAY_SIZE(pca100_pins), "PCA100");
376 if (ret)
377 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
378
379 imx27_add_imx_ssi(0, &pca100_ssi_pdata);
380
381 imx27_add_imx_uart0(&uart_pdata);
382
383 imx27_add_mxc_mmc(1, &sdhc_pdata);
384
385 imx27_add_mxc_nand(&pca100_nand_board_info);
386
387 /* only the i2c master 1 is used on this CPU card */
388 i2c_register_board_info(1, pca100_i2c_devices,
389 ARRAY_SIZE(pca100_i2c_devices));
390
391 imx27_add_imx_i2c(1, &pca100_i2c1_data);
392
393 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
394 mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
395 spi_register_board_info(pca100_spi_board_info,
396 ARRAY_SIZE(pca100_spi_board_info));
397 imx27_add_spi_imx0(&pca100_spi0_data);
398
399 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
400 gpio_direction_output(OTG_PHY_CS_GPIO, 1);
401 gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
402 gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
403
404 if (otg_mode_host) {
405 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
406 ULPI_OTG_DRVVBUS_EXT);
407
408 if (otg_pdata.otg)
409 imx27_add_mxc_ehci_otg(&otg_pdata);
410 } else {
411 gpio_set_value(OTG_PHY_CS_GPIO, 0);
412 imx27_add_fsl_usb2_udc(&otg_device_pdata);
413 }
414
415 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
416 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
417
418 if (usbh2_pdata.otg)
419 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
420
421 imx27_add_imx_fb(&pca100_fb_data);
422
423 imx27_add_fec(NULL);
424 imx27_add_imx2_wdt(NULL);
425 imx27_add_mxc_w1(NULL);
426 }
427
428 static void __init pca100_timer_init(void)
429 {
430 mx27_clocks_init(26000000);
431 }
432
433 static struct sys_timer pca100_timer = {
434 .init = pca100_timer_init,
435 };
436
437 MACHINE_START(PCA100, "phyCARD-i.MX27")
438 .atag_offset = 0x100,
439 .map_io = mx27_map_io,
440 .init_early = imx27_init_early,
441 .init_irq = mx27_init_irq,
442 .handle_irq = imx27_handle_irq,
443 .init_machine = pca100_init,
444 .timer = &pca100_timer,
445 MACHINE_END