arch/arm/mach-imx/mxc.h

   1 /*
   2  * Copyright 2004-2007, 2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17  * MA 02110-1301, USA.
  18  */
  19
  20 #ifndef __ASM_ARCH_MXC_H__
  21 #define __ASM_ARCH_MXC_H__
  22
  23 #include <linux/types.h>
  24
  25 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
  26 #error "Do not include directly."
  27 #endif
  28
  29 #define MXC_CPU_MX1             1
  30 #define MXC_CPU_MX21            21
  31 #define MXC_CPU_MX25            25
  32 #define MXC_CPU_MX27            27
  33 #define MXC_CPU_MX31            31
  34 #define MXC_CPU_MX35            35
  35 #define MXC_CPU_MX51            51
  36 #define MXC_CPU_MX53            53
  37 #define MXC_CPU_IMX6SL          0x60
  38 #define MXC_CPU_IMX6DL          0x61
  39 #define MXC_CPU_IMX6SX          0x62
  40 #define MXC_CPU_IMX6Q           0x63
  41
  42 #define IMX_CHIP_REVISION_1_0           0x10
  43 #define IMX_CHIP_REVISION_1_1           0x11
  44 #define IMX_CHIP_REVISION_1_2           0x12
  45 #define IMX_CHIP_REVISION_1_3           0x13
  46 #define IMX_CHIP_REVISION_1_4           0x14
  47 #define IMX_CHIP_REVISION_1_5           0x15
  48 #define IMX_CHIP_REVISION_2_0           0x20
  49 #define IMX_CHIP_REVISION_2_1           0x21
  50 #define IMX_CHIP_REVISION_2_2           0x22
  51 #define IMX_CHIP_REVISION_2_3           0x23
  52 #define IMX_CHIP_REVISION_3_0           0x30
  53 #define IMX_CHIP_REVISION_3_1           0x31
  54 #define IMX_CHIP_REVISION_3_2           0x32
  55 #define IMX_CHIP_REVISION_3_3           0x33
  56 #define IMX_CHIP_REVISION_UNKNOWN       0xff
  57
  58 #ifndef __ASSEMBLY__
  59 extern unsigned int __mxc_cpu_type;
  60 #endif
  61
  62 #ifdef CONFIG_SOC_IMX1
  63 # ifdef mxc_cpu_type
  64 #  undef mxc_cpu_type
  65 #  define mxc_cpu_type __mxc_cpu_type
  66 # else
  67 #  define mxc_cpu_type MXC_CPU_MX1
  68 # endif
  69 # define cpu_is_mx1()           (mxc_cpu_type == MXC_CPU_MX1)
  70 #else
  71 # define cpu_is_mx1()           (0)
  72 #endif
  73
  74 #ifdef CONFIG_SOC_IMX21
  75 # ifdef mxc_cpu_type
  76 #  undef mxc_cpu_type
  77 #  define mxc_cpu_type __mxc_cpu_type
  78 # else
  79 #  define mxc_cpu_type MXC_CPU_MX21
  80 # endif
  81 # define cpu_is_mx21()          (mxc_cpu_type == MXC_CPU_MX21)
  82 #else
  83 # define cpu_is_mx21()          (0)
  84 #endif
  85
  86 #ifdef CONFIG_SOC_IMX25
  87 # ifdef mxc_cpu_type
  88 #  undef mxc_cpu_type
  89 #  define mxc_cpu_type __mxc_cpu_type
  90 # else
  91 #  define mxc_cpu_type MXC_CPU_MX25
  92 # endif
  93 # define cpu_is_mx25()          (mxc_cpu_type == MXC_CPU_MX25)
  94 #else
  95 # define cpu_is_mx25()          (0)
  96 #endif
  97
  98 #ifdef CONFIG_SOC_IMX27
  99 # ifdef mxc_cpu_type
 100 #  undef mxc_cpu_type
 101 #  define mxc_cpu_type __mxc_cpu_type
 102 # else
 103 #  define mxc_cpu_type MXC_CPU_MX27
 104 # endif
 105 # define cpu_is_mx27()          (mxc_cpu_type == MXC_CPU_MX27)
 106 #else
 107 # define cpu_is_mx27()          (0)
 108 #endif
 109
 110 #ifdef CONFIG_SOC_IMX31
 111 # ifdef mxc_cpu_type
 112 #  undef mxc_cpu_type
 113 #  define mxc_cpu_type __mxc_cpu_type
 114 # else
 115 #  define mxc_cpu_type MXC_CPU_MX31
 116 # endif
 117 # define cpu_is_mx31()          (mxc_cpu_type == MXC_CPU_MX31)
 118 #else
 119 # define cpu_is_mx31()          (0)
 120 #endif
 121
 122 #ifdef CONFIG_SOC_IMX35
 123 # ifdef mxc_cpu_type
 124 #  undef mxc_cpu_type
 125 #  define mxc_cpu_type __mxc_cpu_type
 126 # else
 127 #  define mxc_cpu_type MXC_CPU_MX35
 128 # endif
 129 # define cpu_is_mx35()          (mxc_cpu_type == MXC_CPU_MX35)
 130 #else
 131 # define cpu_is_mx35()          (0)
 132 #endif
 133
 134 #ifdef CONFIG_SOC_IMX51
 135 # ifdef mxc_cpu_type
 136 #  undef mxc_cpu_type
 137 #  define mxc_cpu_type __mxc_cpu_type
 138 # else
 139 #  define mxc_cpu_type MXC_CPU_MX51
 140 # endif
 141 # define cpu_is_mx51()          (mxc_cpu_type == MXC_CPU_MX51)
 142 #else
 143 # define cpu_is_mx51()          (0)
 144 #endif
 145
 146 #ifdef CONFIG_SOC_IMX53
 147 # ifdef mxc_cpu_type
 148 #  undef mxc_cpu_type
 149 #  define mxc_cpu_type __mxc_cpu_type
 150 # else
 151 #  define mxc_cpu_type MXC_CPU_MX53
 152 # endif
 153 # define cpu_is_mx53()          (mxc_cpu_type == MXC_CPU_MX53)
 154 #else
 155 # define cpu_is_mx53()          (0)
 156 #endif
 157
 158 #ifndef __ASSEMBLY__
 159 #ifdef CONFIG_SOC_IMX6SL
 160 static inline bool cpu_is_imx6sl(void)
 161 {
 162         return __mxc_cpu_type == MXC_CPU_IMX6SL;
 163 }
 164 #else
 165 static inline bool cpu_is_imx6sl(void)
 166 {
 167         return false;
 168 }
 169 #endif
 170
 171 static inline bool cpu_is_imx6dl(void)
 172 {
 173         return __mxc_cpu_type == MXC_CPU_IMX6DL;
 174 }
 175
 176 static inline bool cpu_is_imx6sx(void)
 177 {
 178         return __mxc_cpu_type == MXC_CPU_IMX6SX;
 179 }
 180
 181 static inline bool cpu_is_imx6q(void)
 182 {
 183         return __mxc_cpu_type == MXC_CPU_IMX6Q;
 184 }
 185
 186 struct cpu_op {
 187         u32 cpu_rate;
 188 };
 189
 190 int tzic_enable_wake(void);
 191
 192 extern struct cpu_op *(*get_cpu_op)(int *op);
 193 #endif
 194
 195 #define cpu_is_mx3()    (cpu_is_mx31() || cpu_is_mx35())
 196 #define cpu_is_mx2()    (cpu_is_mx21() || cpu_is_mx27())
 197
 198 #endif /*  __ASM_ARCH_MXC_H__ */