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1 /*
2 * arch/arm/mach-iop3xx/iq80321-pci.c
3 *
4 * PCI support for the Intel IQ80321 reference board
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright (C) 2004 Intel Corp.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14 #include <linux/kernel.h>
15 #include <linux/pci.h>
16 #include <linux/init.h>
17
18 #include <asm/hardware.h>
19 #include <asm/irq.h>
20 #include <asm/mach/pci.h>
21 #include <asm/mach-types.h>
22
23 /*
24 * The following macro is used to lookup irqs in a standard table
25 * format for those systems that do not already have PCI
26 * interrupts properly routed. We assume 1 <= pin <= 4
27 */
28 #define PCI_IRQ_TABLE_LOOKUP(minid,maxid) \
29 ({ int _ctl_ = -1; \
30 unsigned int _idsel = idsel - minid; \
31 if (_idsel <= maxid) \
32 _ctl_ = pci_irq_table[_idsel][pin-1]; \
33 _ctl_; })
34
35 #define INTA IRQ_IQ31244_INTA
36 #define INTB IRQ_IQ31244_INTB
37 #define INTC IRQ_IQ31244_INTC
38 #define INTD IRQ_IQ31244_INTD
39
40 #define INTE IRQ_IQ31244_I82546
41
42 static inline int __init
43 iq31244_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
44 {
45 static int pci_irq_table[][4] = {
46 /*
47 * PCI IDSEL/INTPIN->INTLINE
48 * A B C D
49 */
50 #ifdef CONFIG_ARCH_EP80219
51 {INTB, INTB, INTB, INTB}, /* CFlash */
52 {INTE, INTE, INTE, INTE}, /* 82551 Pro 100 */
53 {INTD, INTD, INTD, INTD}, /* PCI-X Slot */
54 {INTC, INTC, INTC, INTC}, /* SATA */
55 #else
56 {INTB, INTB, INTB, INTB}, /* CFlash */
57 {INTC, INTC, INTC, INTC}, /* SATA */
58 {INTD, INTD, INTD, INTD}, /* PCI-X Slot */
59 {INTE, INTE, INTE, INTE}, /* 82546 GigE */
60 #endif // CONFIG_ARCH_EP80219
61 };
62
63 BUG_ON(pin < 1 || pin > 4);
64
65 return PCI_IRQ_TABLE_LOOKUP(0, 7);
66 }
67
68 static int iq31244_setup(int nr, struct pci_sys_data *sys)
69 {
70 struct resource *res;
71
72 if(nr != 0)
73 return 0;
74
75 res = kmalloc(sizeof(struct resource) * 2, GFP_KERNEL);
76 if (!res)
77 panic("PCI: unable to alloc resources");
78
79 memset(res, 0, sizeof(struct resource) * 2);
80
81 res[0].start = IOP321_PCI_LOWER_IO_VA;
82 res[0].end = IOP321_PCI_UPPER_IO_VA;
83 res[0].name = "IQ31244 PCI I/O Space";
84 res[0].flags = IORESOURCE_IO;
85
86 res[1].start = IOP321_PCI_LOWER_MEM_PA;
87 res[1].end = IOP321_PCI_UPPER_MEM_PA;
88 res[1].name = "IQ31244 PCI Memory Space";
89 res[1].flags = IORESOURCE_MEM;
90
91 request_resource(&ioport_resource, &res[0]);
92 request_resource(&iomem_resource, &res[1]);
93
94 sys->mem_offset = IOP321_PCI_MEM_OFFSET;
95 sys->io_offset = IOP321_PCI_IO_OFFSET;
96
97 sys->resource[0] = &res[0];
98 sys->resource[1] = &res[1];
99 sys->resource[2] = NULL;
100
101 return 1;
102 }
103
104 static void iq31244_preinit(void)
105 {
106 iop321_init();
107 }
108
109 static struct hw_pci iq31244_pci __initdata = {
110 .swizzle = pci_std_swizzle,
111 .nr_controllers = 1,
112 .setup = iq31244_setup,
113 .scan = iop321_scan_bus,
114 .preinit = iq31244_preinit,
115 .map_irq = iq31244_map_irq
116 };
117
118 static int __init iq31244_pci_init(void)
119 {
120 if (machine_is_iq31244())
121 pci_common_init(&iq31244_pci);
122 return 0;
123 }
124
125 subsys_initcall(iq31244_pci_init);
126
127
128
129