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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * arch/arm/mach-ixp4xx/nas100d-setup.c
4 *
5 * NAS 100d board-setup
6 *
7 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
8 *
9 * based on ixdp425-setup.c:
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
11 * based on nas100d-power.c:
12 * Copyright (C) 2005 Tower Technologies
13 * based on nas100d-io.c
14 * Copyright (C) 2004 Karen Spearel
15 *
16 * Author: Alessandro Zummo <a.zummo@towertech.it>
17 * Author: Rod Whitby <rod@whitby.id.au>
18 * Maintainers: http://www.nslu2-linux.org/
19 *
20 */
21 #include <linux/gpio.h>
22 #include <linux/if_ether.h>
23 #include <linux/irq.h>
24 #include <linux/jiffies.h>
25 #include <linux/timer.h>
26 #include <linux/serial.h>
27 #include <linux/serial_8250.h>
28 #include <linux/leds.h>
29 #include <linux/reboot.h>
30 #include <linux/i2c.h>
31 #include <linux/i2c-gpio.h>
32 #include <linux/io.h>
33 #include <asm/mach-types.h>
34 #include <asm/mach/arch.h>
35 #include <asm/mach/flash.h>
36
37 #define NAS100D_SDA_PIN 5
38 #define NAS100D_SCL_PIN 6
39
40 /* Buttons */
41 #define NAS100D_PB_GPIO 14 /* power button */
42 #define NAS100D_RB_GPIO 4 /* reset button */
43
44 /* Power control */
45 #define NAS100D_PO_GPIO 12 /* power off */
46
47 /* LEDs */
48 #define NAS100D_LED_WLAN_GPIO 0
49 #define NAS100D_LED_DISK_GPIO 3
50 #define NAS100D_LED_PWR_GPIO 15
51
52 static struct flash_platform_data nas100d_flash_data = {
53 .map_name = "cfi_probe",
54 .width = 2,
55 };
56
57 static struct resource nas100d_flash_resource = {
58 .flags = IORESOURCE_MEM,
59 };
60
61 static struct platform_device nas100d_flash = {
62 .name = "IXP4XX-Flash",
63 .id = 0,
64 .dev.platform_data = &nas100d_flash_data,
65 .num_resources = 1,
66 .resource = &nas100d_flash_resource,
67 };
68
69 static struct i2c_board_info __initdata nas100d_i2c_board_info [] = {
70 {
71 I2C_BOARD_INFO("pcf8563", 0x51),
72 },
73 };
74
75 static struct gpio_led nas100d_led_pins[] = {
76 {
77 .name = "nas100d:green:wlan",
78 .gpio = NAS100D_LED_WLAN_GPIO,
79 .active_low = true,
80 },
81 {
82 .name = "nas100d:blue:power", /* (off=flashing) */
83 .gpio = NAS100D_LED_PWR_GPIO,
84 .active_low = true,
85 },
86 {
87 .name = "nas100d:yellow:disk",
88 .gpio = NAS100D_LED_DISK_GPIO,
89 .active_low = true,
90 },
91 };
92
93 static struct gpio_led_platform_data nas100d_led_data = {
94 .num_leds = ARRAY_SIZE(nas100d_led_pins),
95 .leds = nas100d_led_pins,
96 };
97
98 static struct platform_device nas100d_leds = {
99 .name = "leds-gpio",
100 .id = -1,
101 .dev.platform_data = &nas100d_led_data,
102 };
103
104 static struct i2c_gpio_platform_data nas100d_i2c_gpio_data = {
105 .sda_pin = NAS100D_SDA_PIN,
106 .scl_pin = NAS100D_SCL_PIN,
107 };
108
109 static struct platform_device nas100d_i2c_gpio = {
110 .name = "i2c-gpio",
111 .id = 0,
112 .dev = {
113 .platform_data = &nas100d_i2c_gpio_data,
114 },
115 };
116
117 static struct resource nas100d_uart_resources[] = {
118 {
119 .start = IXP4XX_UART1_BASE_PHYS,
120 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
121 .flags = IORESOURCE_MEM,
122 },
123 {
124 .start = IXP4XX_UART2_BASE_PHYS,
125 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
126 .flags = IORESOURCE_MEM,
127 }
128 };
129
130 static struct plat_serial8250_port nas100d_uart_data[] = {
131 {
132 .mapbase = IXP4XX_UART1_BASE_PHYS,
133 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
134 .irq = IRQ_IXP4XX_UART1,
135 .flags = UPF_BOOT_AUTOCONF,
136 .iotype = UPIO_MEM,
137 .regshift = 2,
138 .uartclk = IXP4XX_UART_XTAL,
139 },
140 {
141 .mapbase = IXP4XX_UART2_BASE_PHYS,
142 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
143 .irq = IRQ_IXP4XX_UART2,
144 .flags = UPF_BOOT_AUTOCONF,
145 .iotype = UPIO_MEM,
146 .regshift = 2,
147 .uartclk = IXP4XX_UART_XTAL,
148 },
149 { }
150 };
151
152 static struct platform_device nas100d_uart = {
153 .name = "serial8250",
154 .id = PLAT8250_DEV_PLATFORM,
155 .dev.platform_data = nas100d_uart_data,
156 .num_resources = 2,
157 .resource = nas100d_uart_resources,
158 };
159
160 /* Built-in 10/100 Ethernet MAC interfaces */
161 static struct eth_plat_info nas100d_plat_eth[] = {
162 {
163 .phy = 0,
164 .rxq = 3,
165 .txreadyq = 20,
166 }
167 };
168
169 static struct platform_device nas100d_eth[] = {
170 {
171 .name = "ixp4xx_eth",
172 .id = IXP4XX_ETH_NPEB,
173 .dev.platform_data = nas100d_plat_eth,
174 }
175 };
176
177 static struct platform_device *nas100d_devices[] __initdata = {
178 &nas100d_i2c_gpio,
179 &nas100d_flash,
180 &nas100d_leds,
181 &nas100d_eth[0],
182 };
183
184 static void nas100d_power_off(void)
185 {
186 /* This causes the box to drop the power and go dead. */
187
188 /* enable the pwr cntl gpio and assert power off */
189 gpio_direction_output(NAS100D_PO_GPIO, 1);
190 }
191
192 /* This is used to make sure the power-button pusher is serious. The button
193 * must be held until the value of this counter reaches zero.
194 */
195 static int power_button_countdown;
196
197 /* Must hold the button down for at least this many counts to be processed */
198 #define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
199
200 static void nas100d_power_handler(unsigned long data);
201 static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler, 0, 0);
202
203 static void nas100d_power_handler(unsigned long data)
204 {
205 /* This routine is called twice per second to check the
206 * state of the power button.
207 */
208
209 if (gpio_get_value(NAS100D_PB_GPIO)) {
210
211 /* IO Pin is 1 (button pushed) */
212 if (power_button_countdown > 0)
213 power_button_countdown--;
214
215 } else {
216
217 /* Done on button release, to allow for auto-power-on mods. */
218 if (power_button_countdown == 0) {
219 /* Signal init to do the ctrlaltdel action,
220 * this will bypass init if it hasn't started
221 * and do a kernel_restart.
222 */
223 ctrl_alt_del();
224
225 /* Change the state of the power LED to "blink" */
226 gpio_set_value(NAS100D_LED_PWR_GPIO, 0);
227 } else {
228 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
229 }
230 }
231
232 mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
233 }
234
235 static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
236 {
237 /* This is the paper-clip reset, it shuts the machine down directly. */
238 machine_power_off();
239
240 return IRQ_HANDLED;
241 }
242
243 static int __init nas100d_gpio_init(void)
244 {
245 if (!machine_is_nas100d())
246 return 0;
247
248 /*
249 * The power button on the Iomega NAS100d is on GPIO 14, but
250 * it cannot handle interrupts on that GPIO line. So we'll
251 * have to poll it with a kernel timer.
252 */
253
254 /* Request the power off GPIO */
255 gpio_request(NAS100D_PO_GPIO, "power off");
256
257 /* Make sure that the power button GPIO is set up as an input */
258 gpio_request(NAS100D_PB_GPIO, "power button");
259 gpio_direction_input(NAS100D_PB_GPIO);
260
261 /* Set the initial value for the power button IRQ handler */
262 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
263
264 mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
265
266 return 0;
267 }
268 device_initcall(nas100d_gpio_init);
269
270 static void __init nas100d_init(void)
271 {
272 uint8_t __iomem *f;
273 int i;
274
275 ixp4xx_sys_init();
276
277 /* gpio 14 and 15 are _not_ clocks */
278 *IXP4XX_GPIO_GPCLKR = 0;
279
280 nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
281 nas100d_flash_resource.end =
282 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
283
284 i2c_register_board_info(0, nas100d_i2c_board_info,
285 ARRAY_SIZE(nas100d_i2c_board_info));
286
287 /*
288 * This is only useful on a modified machine, but it is valuable
289 * to have it first in order to see debug messages, and so that
290 * it does *not* get removed if platform_add_devices fails!
291 */
292 (void)platform_device_register(&nas100d_uart);
293
294 platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
295
296 pm_power_off = nas100d_power_off;
297
298 if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler,
299 IRQF_TRIGGER_LOW, "NAS100D reset button", NULL) < 0) {
300
301 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
302 gpio_to_irq(NAS100D_RB_GPIO));
303 }
304
305 /*
306 * Map in a portion of the flash and read the MAC address.
307 * Since it is stored in BE in the flash itself, we need to
308 * byteswap it if we're in LE mode.
309 */
310 f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
311 if (f) {
312 for (i = 0; i < 6; i++)
313 #ifdef __ARMEB__
314 nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i);
315 #else
316 nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3));
317 #endif
318 iounmap(f);
319 }
320 printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
321 nas100d_plat_eth[0].hwaddr);
322
323 }
324
325 MACHINE_START(NAS100D, "Iomega NAS 100d")
326 /* Maintainer: www.nslu2-linux.org */
327 .atag_offset = 0x100,
328 .map_io = ixp4xx_map_io,
329 .init_early = ixp4xx_init_early,
330 .init_irq = ixp4xx_init_irq,
331 .init_time = ixp4xx_timer_init,
332 .init_machine = nas100d_init,
333 #if defined(CONFIG_PCI)
334 .dma_zone_size = SZ_64M,
335 #endif
336 .restart = ixp4xx_restart,
337 MACHINE_END